PWR-82331 AND PWR-82333
Make sure the next
Card you purchase
has...
®
SMART POWER 3-PHASE
MOTOR DRIVES
FEATURES
•
Small Size (3.0" x 2.1" x 0.39")
•
+200 V and +500 V Capability
•
30 A Current Capability
•
High-Efficiency MOSFET or IGBT
Drive Stage
•
Direct Drive from Commutation Logic
•
Six Step Trapezoidal or Sinusoidal
Drive
•
Four Quadrant Operation
•
0.85° C/W
θ
J
c Max
•
Military Processing Available
DESCRIPTION
The PWR-82331 and PWR-82333 are 30 A, 3-phase motor drive
hybrids.The PWR-82331 has a +200 V rating and uses MOSFETs in the
output stage while the PWR-82333 has a +500 V rating and an IGBT
output stage. Both types have individual fast recovery diodes internally
connected across the output drive transistors to clamp inductive flyback.
These Smart Power Motor Drives have CMOS Schmitt Trigger inputs for
high noise immunity. High- and low-side input logic signals are XOR’d in
each phase to prevent simultaneous turn-on of in-line transistors, thus
eliminating a shoot through condition. The internal logic controls the
high- and low-side gate drives for each phase and can operate from +5
to +15 V logic levels. The internal power supply provides a constant volt-
age source to the floating high-side gate drives, and constant output per-
formance for switching frequencies from dc to 50 kHz.
APPLICATIONS
These hybrids are an excellent choice for high-performance, high-reli-
ability motor drives for Military and Aerospace servo-amps and speed
controls. Among the many applications are robotics; electro-mechan-
ical valve assemblies; actuator systems for flight control surfaces on
military and commercial aircraft; antenna and radar positioning; fan
and blower motors for environmental conditioning; thrust and vector
position control of mini-subs, drones, and RPV’s; compressor motors
for cryogenic coolers; and high power inverters.
The PWR-82331/82333 hybrids are ideal for harsh military environments
where shock, vibration, and temperature extremes are evident, such as
missile applications where fin actuator systems control missile direction.
FOR MORE INFORMATION CONTACT:
Data Device Corporation
105 Wilbur Place
Bohemia, New York 11716
631-567-5600 Fax: 631-567-7358
www.ddc-web.com
Technical Support:
1-800-DDC-5757 ext. 7771
©
1998, 1999 Data Device Corporation
Data Device Corporation
www.ddc-web.com
DIGITAL
CONTROL
AND
PROTECTION
CIRCUITRY
2
PWR-82331 and PWR-82333
P-02/05-0
FIGURE 1. PWR-82331/82333 BLOCK DIAGRAM
TABLE 1. PWR-82331 AND PWR-82333 ABSOLUTE MAXIMUM RATINGS
(TC = +25°C UNLESS OTHERWISE SPECIFIED)
PARAMETER
SUPPLY VOLTAGE
BIAS VOLTAGE
LOGIC POWER-IN VOLTAGE
INPUT LOGIC VOLTAGE
OUTPUT CURRENT
Continuous
Pulsed
OPERATING FREQUENCY
CASE OPERATING TEMPERATURE
CASE STORAGE TEMPERATURE RANGE
GND - VSS DIFFERENTIAL VOLTAGE
SYMBOL
V
CC
V
B
V
LPI
V
U
, V
L
, V
Sd
I
O
I
OP
fo
T
C
T
CS
PWR-82331
200
50
18
V
LPI
+ 0.5
30
50
50
-55 to +125
-55 to +150
±3
PWR-82333
500
50
18
V
LPI
+ 0.5
30
50
25
-55 to +125
-55 to +150
±3
UNITS
V
V
V
V
A
A
kHz
°C
°C
Vdc-peak
TABLE 2. PWR-82331 AND PWR-82333 SPECIFICATIONS
(TC = +25°C UNLESS OTHERWISE SPECIFIED)
PARAMETER
OUTPUT
Output Current Continuous (see FIG.’s 15 & 19)
Supply Voltage
Output On-Resistance (each FET)(see FIG. 14A)
Output Voltage drop (each IGBT) (see FIG. 14B)
Instant Forward Voltage (flyback diode) (see FIG.’s 13A/B
Reverse Recovery Time (flyback diode)
Reverse Leakage Current at TC = +25°C
Reverse Leakage Current at TC = +125°C
BIAS SUPPLY
Input Bias Voltage (T
C
= -55°C to +125°C)
Quiescent Bias Current (see note 4)(see FIG. 16)
Bias Current (T
C
= -55°C to +125°C)(see FIG.’s 17 & 18)
In-rush Current (T
C
= -55°C to +125°C)
Logic power Input Current
INPUT SIGNALS (SEE FIG. 7)
Positive Trigger Threshold Voltage
Negative Trigger Threshold Voltage
Hysteresis Voltage
Positive Trigger Threshold Voltage
Negative Trigger Threshold Voltage
Hysteresis Voltage
SWITCHING CHARACTERISTICS (SEE FIG. 2)
Upper Drive:
Turn-on propagation delay
Turn-off propagation delay
Shut-down propagation delay
Turn-on Rise Time
Turn-off Fall Time
Lower Drive:
Turn-on propagation delay
Turn-off propagation delay
Shut-down propagation delay
Turn-on Rise Time
Turn-off Fall Time
SWITCHING CHARACTERISTICS (SEE FIG. 2)
Upper Drive:
Turn-on propagation delay
Turn-off propagation delay
Shut-down propagation delay
Turn-on Rise Time
Turn-off Fall Time
SYMBOL
I
O
V
CC
R
ON
V
CE
(
SAT
)
V
F
trr
Ir
Ir
Vb
Ibq
Ib
Iir
I
LPI
V
P
V
N
V
H
V
P
V
N
V
H
TEST
CONDITIONS
PWR-82331
MIN
TYP MAX
30
140
0.1
1.15
50
10
1
14
Vb = 28 V
Vb=28 V, see note 5
Vb = 28 V
see note 6
Pin Connections
Pin 15 &16 connect.
Pin 15 &16 connect.
Pin 15 &16 connect
See note 6
See note 6
See note 6
Test 1 Conditions
Pin 15 &16 connect.
+15 V Logic
Io=30 A peak
PWR-82331,
V
CC
= 140 V
PWR-82333,
V
CC
= 270 V
32
35
65
1.4
2
12.9
2.1
1.6
0.9
0.3
10.8
4.3
3.6
2.1
1.6
0.9
0.3
35
50
14
32
65
1.4
2
12.9
10.8
4.3
3.6
PWR-82333
MIN
TYP MAX
30
350
3.8
1.70
50
10
1
50
UNITS
A
V
ohm
V
V
nsec
µA
mA
V
mA
mA
A
mA
V
V
V
V
V
V
see note 1
I
O
=30 A
I
O
=30 A
I
OP
=30 A, see note 2
If=1 A, Ir=1 A
see note 3
see note 3
28
270
td(on)
td(off)
t
Sd
tr
tf
840
1020
800
125
125
810
860
810
100
150
nsec
nsec
nsec
nsec
nsec
td(on)
td(off)
t
Sd
tr
tf
850
1000
800
125
125
800
870
770
100
150
nsec
nsec
nsec
nsec
nsec
td(on)
td(off)
t
Sd
tr
tf
Test 2 Conditions
see note 6
+5 V, Io=30 A peak
PWR-82331,
Vcc = 140 V
PWR-82333,
V
CC
= 270 V
1090
1315
1100
125
125
1050
1150
850
100
150
nsec
nsec
nsec
nsec
nsec
Data Device Corporation
www.ddc-web.com
3
PWR-82331 and PWR-82333
P-02/05-0
TABLE 2. PWR-82331 AND PWR-82333 SPECIFICATIONS (CONT'D)
(TC = +25°C UNLESS OTHERWISE SPECIFIED)
PARAMETER
SWITCHING CHARACTERISTICS (CONT’D)
Lower Drive:
Turn-on Propagation delay
Turn-off Propagation delay
Shut-down propagation delay (see FIG. 10)
Turn-on Rise Time
Turn-off Fall Time
DEAD TIME
MINIMUM PULSE WIDTH
THERMAL
Maximum Thermal Resistance
Maximum Lead Soldering Temperature (Note 7)
Junction Temperature Range
Case Operating Temperature
Case Storage Temperature
WEIGHT
SYMBOL
TEST
CONDITIONS
Test 2
Conditions
see note 6
+5 V, Io=30 A peak
PWR-82331,
Vcc=140 V
PWR-82333, 270 V
400
150
each transistor
θjc
Ts
Tj
Tco
Tcs
0.85
250
150
125
150
4.9
(140)
0.85
250
150
125
150
4.9
(140)
°C/W
°C
°C
°C
°C
oz
(g)
MIN
PWR-82331
TYP
MAX
MIN
PWR-82333
TYP
MAX
UNIT
td(on)
td(off)
tsd
tr
tf
tdt
tpw
1125
1290
1100
125
125
500
150
1050
1150
850
100
150
nsec
nsec
nsec
nsec
nsec
nsec
nsec
-55
-55
-55
-55
-55
-55
Notes:
1. For Hi-Rel applications, derating per MIL-S-19500 should be observed. (Derate Vcc to 70%.)
2. Pulse width
≤
300 ms, duty cycle
≤
2%.
3. For PWR-82331, Vcc = 140 V, VU, VL = Logic ‘0’ and for PWR-82333, Vcc = 350 V, VU, VL = Logic ‘0.’
4. VU, VL = Logic ‘0’ on pins 17, 18, 20, 21, 24 and 25.
5. For PWR-82331, fo = 30 kHz and for PWR-82333, fo = 10 kHz.
6. Pin 16 connected to external +5 V supply.
7. Solder 1/8” from case for 5 seconds maximum.
INTRODUCTION
The 3-phase PWR-82331 and PWR-82333 are 30 A motor drive
hybrids rated at +200 V and +500 V respectively. The PWR-
82331 uses a MOSFET output stage and the PWR-82333 has
an IGBT output stage for high speed, high current, and high effi-
ciency operation. The PWR-82333 also offers high-voltage per-
formance of an IGBT for use in +270 V systems. These motor dri-
ves are ideal for use in high-performance motion control sys-
tems, servo amplifiers, and motor speed control designs.
Furthermore, multi-axis systems requiring multiple drive stages
can benefit from the small size of these power drives.
The PWR-82331/82333 can be driven directly from the commu-
tation logic, DSP, or a custom ASIC that supplies digital signals
to control the upper and lower transistors of each phase. These
highly integrated drive stages have Schmitt trigger digital inputs
that control the high and low side of each phase. Digital protec-
tion of each phase eliminates an in-line firing condition by pre-
venting simultaneous turn-on of both the upper and lower tran-
sistors. The logic controls the high- and low-side gate drivers.
Operation from +5 to +15 V logic levels can be programmed by
applying the appropriate voltage to pin 16 (VLPI). The PWR-
82331/82333 has a ground referenced low-side gate drive. An
internal dc-dc converter supplies a floating output to each side of
the three high-side drives. This provides a continuous high-side
gate drive even during the motor stall. Pin 15 (VLPO) supplies a
+15 V output, which can be used to power the internal logic when
system usage requires +15 V logic. The high- and low-side gate
drivers control the N-channel MOSFET or IGBT output stage.
The MOSFETs used in the PWR-82331 allow output switching
up to 50 kHz, while the high-speed IGBTs in the PWR-82333 can
switch at 25 kHz. A flyback diode parallels each output transistor
and controls the regenerative energy produced by the motor.
These fast recovery diodes have faster reverse switching times
than the intrinsic body diode of the MOSFETs used in the PWR-
82331. They also protect the IGBTs used in the PWR-82333
from exceeding their emitter-to-collector breakdown voltage.
Use of a copper case and solder attachment of the output tran-
sistors achieves a low thermal resistance of 0.85° C/W maxi-
mum. Care should be taken to adequately heatsink these motor
drives to maintain a case temperature of 125°C. Junction tem-
peratures should not exceed 150°C. The PWR-82331/82333 do
not have internal short-circuit or overcurrent protection. For pro-
tection of the output transistors, these features must be added
externally to the hybrid.
PWR-82331 and PWR-82333
P-02/05-0
10%
(REFERENCE TABLE 2. ALSO.)
FIGURE 2. INPUT/OUTPUT TIMING RELATIONSHIPS
Data Device Corporation
www.ddc-web.com
4
BIAS VOLTAGES
The PWR-82331/82333 motor drive hybrids require only a single
power supply for operation. The hybrid generates three indepen-
dent floating supplies, eliminating the need for external bias volt-
ages for each phase.
In order for the internal power supply to generate these voltages,
the input bias voltage (Vb) must be from +15 to +50 Vdc. In most
avionic systems this can be accomplished by connecting the Vb
pin to the MIL-STD-704D, +28 Volt bus. See FIGURE 3A.
If the system bus voltage is greater than +50 Vdc (and a lower
voltage is not available), then the Vb pin and Vz pin can be tied
together with an external power resistor (Rb) and connected
from these pins to the system power bus. (See FIGURE 3B).
See FIGURES 4 and 5 for bias resistor characteristics.
If additional power dissipation in Rb is a concern, FIGURE 3C
shows a more efficient design, using a low-power resistor (RT)
and an additional transistor. To determine the proper resistor to
use, refer to FIGURE 6.
If there is another voltage available in the system in the +15 to
+50 Vdc range, then this voltage can be directly connected to the
Vb pin of the hybrid.
In any case, a 0.01 mF decoupling capacitor (Cb) must be
connected between Vb (pin 12) and GND.
≤
CC
≤
FIGURE 3. CONNECTION TO BUS VOLTAGE TO DEVELOP PROPER INPUT BIAS VOLTAGE
50
CC
FIGURE 4A. PWR-82331
FIGURE 4B. PWR-82333
FIGURE 4. BIAS RESISTOR VALUE (Rb) VS. BUS VOLTAGE (VCC)
Data Device Corporation
www.ddc-web.com
5
PWR-82331 and PWR-82333
P-02/05-0
瑞萨MCU/MPU
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
