MP5006
The Future of Analog IC Technology
5V, 1A- 5A Programmable Current
Limit Switch with Slew Rate Control and
Auto Enable
FEATURES
•
•
•
•
•
•
•
•
•
•
•
Integrated 44mΩ Power FET
Enable/Fault Pin
Adjustable Slew Rate for Output Voltage
Adjustable Current Limit
Automatic Startup/Retry after Thermal
Protection
Over Voltage Limit
Hot Swap
PC Cards
Laptops
SSD
HDD
“MPS” and “The Future of Analog IC Technology” are Registered Trademarks
of Monolithic Power Systems, Inc.
DESCRIPTION
The MP5006 is a protection device designed to
protect circuitry on the output (V
OUT
) from
transients on input (V
IN
). It also protects V
IN
from
undesired shorts and transients coming from the
load.
At start up, inrush current is controlled by limiting
the slew rate at the V
OUT
. The slew rate is
controlled by a small capacitor at the dv/dt pin.
The dv/dt pin has an internal circuit that allows
the customer to float this pin (no connect) and
still receive a 1.1ms ramp time at the V
OUT
.
The max load at the output (V
OUT
) is current
limited. This is accomplished by utilizing a sense
FET topology. The magnitude of the current limit
is controlled by an external resistor connected
between the I
LIMIT
pins.
An internal charge pump drives the gate of the
power device, allowing a very low on-resistance
DMOS power FET of just 0.044Ω.
V
OUT
is protected from V
IN
being too low or too
high. Under Voltage Lockout (UVLO) assures
that the input is above the minimum operating
threshold, before the power device is turned on.
If V
IN
goes above the high output threshold, the
output voltage will be limited.
APPLICATIONS
TYPICAL APPLICATION
VIN
11
6
+ILIMIT
VIN
VOUT
VOUT
VOUT
VOUT
5
4
VOUT
RLimit
7
-ILIMIT
8
MP5006
Enable/Fault
EN
3
2
Cdv/dt
(Optinal)
9
dv/dt
10
GND
VOUT
1
MP5006 Rev.0.92
12/27/2013
www.MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
1
MP5006 – 5V, 1A- 5A PROGRAMMABLE CURRENT LIMIT SWITCH WITH AUTO ENABLE
ORDERING INFORMATION
Part Number*
MP5006EQ
Package
QFN10 (3x3)
Top Marking
8M
Free Air Temperature (T
A
)
–20°C to +85°C
* For Tape & Reel, add suffix –Z (e.g. MP5006EQ–Z).
For RoHS Compliant Packaging, add suffix –LF (e.g. MP5006EQ–LF–Z)
PACKAGE REFERENCE
TOP VIEW
VOUT
VOUT
VOUT
VOUT
VOUT
1
2
3
4
5
EXPOSED
PAD
VIN
10 GND
9
8
7
6
dv/dt
ENABLE/FAULT
-ILIMIT
+ILIMIT
ABSOLUTE MAXIMUM RATINGS
(1)
V
IN
, V
OUT
, +I
LIMIT
, -I
LIMIT
.................................. 22V
dv/dt, ENABLE/FAULT .................................. 6V
Junction Temperature..................... –20°C to +150°C
(2)
Continuous Power Dissipation (T
A
=+25
o
C)
…………………………………………………2.5W
Storage Temperature.............. –65°C to +155°C
Thermal Resistance
…….
.θ
JA
θ
JC
QFN10 ....................................50 ...... 12 ...
°C/W
(3)
Recommended Operating Conditions
Input Voltage Operating Range ......... 4V to 10V
Operating Junct. Temp (T
J
)....... –20°C to +125°C
Notes:
1) Exceeding these ratings may damage the device.
2) The maximum allowable power dissipation is a function of the
maximum junction temperature T
J
(MAX)
，
the junction-to-
ambient thermal resistance
θ
JA
，and
the ambient temperature
T
A,
the maximum allowable power dissipation at any ambient
temperature is calculated using: P
D
(MAX)=(T
J
(MAX)-T
A
)/
θ
JA
.
Exceeding the maximum allowable power dissipation will
cause excessive die temperature, and the regulator will go
into thermal shutdown. Internal thermal shutdown circuitry
protects the device from permanent damage.
o
Reduce 0.2 Watts for every 10 C ambient temperature
increasing
3) Measured on JESD51-7 4-layer board.
MP5006 Rev.0.92
12/27/2013
www.MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
2
MP5006 – 5V, 1A- 5A PROGRAMMABLE CURRENT LIMIT SWITCH WITH AUTO ENABLE
ELECTRICAL CHARACTERISTICS
V
IN
=5V, R
LIMIT
=24Ω, C
OUT
=10
μ
F, T
J
=25°C, unless otherwise noted.
Parameters
Power FET
Delay Time
ON Resistance
Off State Output Voltage
Symbol
Condition
Enabling
of
chip
to
I
D
=100mA with a 12
Ω
resistive load
T
J
=25
°C
T
J
=80
°C, Note 4
V
IN
=18Vdc, Enable=0V,
R
L
=500Ω
0.5 in
2
pad, Note 4,
T
J
=25
°C
minimum copper, T
J
=80
°C
Thermal Shutdown
Shutdown Temperature
Under/Over Voltage Protection
Output Clamping Voltage
Under Voltage Lockout
Under Voltage Lockout (UVLO)
Hysteresis
Current Limit
Hold Current
Trip Current
dv/dt Circuit
Rise Time
Enable/Fault
Low Level Input Voltage
High Level Input Voltage
High State Maximum Voltage
Low Level Input Current (Sink)
Maximum Fanout for Fault Signal
Maximum Voltage on Enable Pin
Total Device
Bias Current
Minimum
UVLO
Operating
Voltage
for
V
MAX
I
BIAS
V
MIN
T
SD
V
CLAMP
V
UVLO
V
HYST
I
LIM-SS
I
LIM-OL
T
r
V
IL
V
IH
V
I (MAX)
I
IL
R
LIMIT
=24Ω, Note 4
R
LIMIT
=24Ω, Note 4
Float dv/dt pin, Note 5
Output Disabled
Output Enabled
V
ENABLE
=0V
Total number of chips that
can be connected for
simultaneous shutdown
Note 6
Device Operational
Thermal Shutdown
Enable<0.5V
1.2
2.3
0.64
Note 4
Over Voltage Protection
V
IN
=8V
Turn on,
Voltage going high
5
3.2
Min
Typ
Max
Units
t
DLY
R
DSon
V
OFF
0.2
44
95
82
120
4.2
ms
mΩ
mV
Continuous Current
I
D
A
2.3
175
5.4
3.6
0.2
1.55
3
1.1
1.9
3.7
2.0
0.5
2.5
4.8
-60
-80
5
V
IN
1.5
1
2.0
3.0
5.9
4.0
°C
V
V
V
A
A
ms
V
V
V
μA
Units
V
mA
V
Notes:
4) Guaranteed by design.
5) Measured from 10% to 90%.
6) Maximum Input Voltage to be
≤
6V if V
IN
> 6V. Maximum Input Voltage to be V
IN
if V
IN
≤
6V.
MP5006 Rev.0.92
12/27/2013
www.MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
3
MP5006 – 5V, 1A- 5A PROGRAMMABLE CURRENT LIMIT SWITCH WITH AUTO ENABLE
PIN FUNCTIONS
Pin #
1-5
6
7
8
Description
This pin is the V
OUT
of the internal power FET and the output terminal of the IC.
A resistor between these pins sets the overload and short circuit current limit levels.
A resistor between these pins sets the overload and short circuit current limit levels.
The Enable/Fault pin is a bi-directional interface. It can be used to enable the output
of the device by floating the pin, or disable the chip by pulling it to ground (using an
Enable/Fault
open drain or open collector device). If a thermal fault occurs, the voltage on this pin
will drive to ground, automatically.
The internal dv/dt circuit controls the slew rate of the output voltage at turn on. It has
an internal capacitor that allows it to ramp up over the period of 1.1ms. An external
dv/dt
capacitor can be added to this pin to increase the ramp time. If an additional time
delay is not required, this pin should be left open.
GND
Negative Input Voltage to the Device. This is used as the internal reference for the IC.
VIN
Positive input voltage to the device (Exposed Pad).
Name
VOUT
+ILIMIT
-ILIMIT
9
10
11
MP5006 Rev.0.92
12/27/2013
www.MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
4
MP5006 – 5V, 1A- 5A PROGRAMMABLE CURRENT LIMIT SWITCH WITH AUTO ENABLE
TYPICAL PERFORMANCE CHARACTERISTICS
V
IN
=5V, V
EN
=3.3V, R
LIMIT
=24Ω, C
OUT
=10
μF
, C
dv/dt
=1
nF
, T
A
=25°C, unless otherwise noted.
Supply Current,Output Enabled Supply Current,Output Disabled Static Drain-Source On-State
vs.Input Voltage
Resistance vs. Input Voltage
vs.Input Voltage
No load, EN floating
1. 85
1
V
EN
=0V
61
59
0.98
0.96
0.94
0.92
0.9
3.5
57
55
53
51
49
47
4
4.5
5
5.5
45
I
OUT
=1A
S UP P L Y C UR R E NT (mA )
1. 8
1. 75
1. 7
1. 65
4
4.5
5
5.5
S UP P L Y C UR R E NT (mA)
3.5
INP UT VO L T AG E (V)
INP UT V OL T AG E (V )
4
4.5
5
INPUT VOLTAGE (V)
5.5
INPUT TO OUTPUT VOLTAGE(mV)
140
120
100
80
60
40
20
0
0
0 .5
1
1 .5
2
2 .5
V
IN
=5.5V
V
IN
=4V
V
IN
=4.5V
V
IN
=5V
3 .1
1.8
H O LD C U R R EN T(A )
TRIP CURRENT(A)
3
2 .9
2 .8
2 .7
2.6
3 .5
1.7
1.6
1.5
4
4 .5
5
5 .5
1.4
3 .5
4
4 .5
5
5 .5
LOAD CURRENT(A)
INPUT VOLTAGE(V)
INPUT VOLTAGE(V)
Current Limit Response
vs. Peak Current
TRIP CURRENT & HOLD CURRENT(A)
16
Trip and Hold Current
vs. R
LIMIT
6
5
4
3
2
1
0
0
Hold Current
20
40
60
80
100 120
Trip Current
No Cout
RESPONSE TIME(us)
12
8
4
3
6
9
12 15 18 21 24
PEAK CURRENT(A)
MP5006 Rev.0.92
12/27/2013
www.MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
5
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