HIP6004
Data Sheet
March 2000
File Number
4275.2
Buck and Synchronous-Rectifier (PWM)
Controller and Output Voltage Monitor
The HIP6004 provides complete control and protection for a
DC-DC converter optimized for high-performance
microprocessor applications. It is designed to drive two
N-Channel MOSFETs in a synchronous-rectified buck
topology. The HIP6004 integrates all of the control, output
adjustment, monitoring and protection functions into a single
package.
The output voltage of the converter is easily adjusted and
precisely regulated. The HIP6004 includes a 5-input
digital-to-analog converter (DAC) that adjusts the output
voltage from 2.1V
DC
to 3.5V
DC
in 0.1V increments and from
1.3V
DC
to 2.1V
DC
in 0.05V steps. The precision reference
and voltage-mode regulator hold the selected output voltage
to within
±1%
over temperature and line voltage variations.
The HIP6004 provides simple, single feedback loop,
voltage-mode control with fast transient response. It includes
a 200kHz free-running triangle-wave oscillator that is
adjustable from below 50kHz to over 1MHz. The error
amplifier features a 15MHz gain-bandwidth product and
6V/µs slew rate which enables high converter bandwidth for
fast transient performance. The resulting PWM duty ratio
ranges from 0% to 100%.
The HIP6004 monitors the output voltage with a window
comparator that tracks the DAC output and issues a Power
Good signal when the output is within
±10%.
The HIP6004
protects against over-current conditions by inhibiting PWM
operation. Built-in over-voltage protection triggers an
external SCR to crowbar the input supply. The HIP6004
monitors the current by using the r
DS(ON)
of the upper
MOSFET which eliminates the need for a current sensing
resistor.
Features
• Drives Two N-Channel MOSFETs
• Operates from +5V or +12V Input
• Simple Single-Loop Control Design
- Voltage-Mode PWM Control
• Fast Transient Response
- High-Bandwidth Error Amplifier
- Full 0% to 100% Duty Ratio
• Excellent Output Voltage Regulation
-
±1%
Over Line Voltage and Temperature
• 5-Bit Digital-to-Analog Output Voltage Selection
- Wide Range . . . . . . . . . . . . . . . . . . . 1.3V
DC
to 3.5V
DC
- 0.1V Binary Steps . . . . . . . . . . . . . . . 2.1V
DC
to 3.5V
DC
- 0.05V Binary Step. . . . . . . . . . . . . . . 1.3V
DC
to 2.1V
DC
• Power-Good Output Voltage Monitor
• Over-Voltage and Over-Current Fault Monitors
- Does Not Require Extra Current Sensing Element,
Uses MOSFETs r
DS(ON)
• Small Converter Size
- Constant Frequency Operation
- 200kHz Free-Running Oscillator Programmable from
50kHz to over 1MHz
Applications
• Power Supply for Pentium®, Pentium Pro, PowerPC™ and
Alpha™ Microprocessors
• High-Power 5V to 3.xV DC-DC Regulators
• Low-Voltage Distributed Power Supplies
Pinout
HIP6004
(SOIC)
TOP VIEW
VSEN
OCSET
SS
VID0
VID1
VID2
VID3
VID4
COMP
1
2
3
4
5
6
7
8
9
20 RT
19 OVP
18 VCC
17 LGATE
16 PGND
15 BOOT
14 UGATE
13 PHASE
12 PGOOD
11 GND
Ordering Information
PART NUMBER
HIP6004CB
TEMP.
RANGE (
o
C)
0 to 70
PACKAGE
20 Ld SOIC
PKG.
NO.
M20.3
This data sheet describes a pre-released product
.
Alpha Micro™ is a trademark of Digital Computer Equipment Corporation.
Pentium® is a registered trademark of Intel Corporation.
PowerPC™ is a registered trademark of IBM.
FB 10
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
|
Copyright
©
Intersil Corporation 2000
HIP6004
Typical Application
+12V
VCC
PGOOD
SS
OVP
RT
VID0
VID1
VID2
VID3
VID4
FB
MONITOR AND
PROTECTION
OCSET
EN
BOOT
V
IN
= +5V or +12V
OSC
UGATE
PHASE
+V
OUT
HIP6004
D/A
+
+
-
LGATE
PGND
VSEN
GND
-
COMP
Block Diagram
VCC
VSEN
110%
+
POWER-ON
RESET (POR)
-
-
PGOOD
90%
+
115%
+
OVER-
VOLTAGE
10µA
OVP
SOFT-
START
OVER-
CURRENT
4V
SS
BOOT
UGATE
PHASE
VID0
VID1
VID2
VID3
VID4
FB
COMP
GND
RT
OSCILLATOR
D/A
CONVERTER
(DAC)
DACOUT
+
PWM
COMPARATOR
GATE
INHIBIT CONTROL
LOGIC
PWM
LGATE
PGND
-
-
+
OCSET
REFERENCE
200µA
-
+
-
ERROR
AMP
2
HIP6004
Absolute Maximum Ratings
Supply Voltage, V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +15V
Boot Voltage, V
BOOT
- V
PHASE
. . . . . . . . . . . . . . . . . . . . . . . . +15V
Input, Output or I/O Voltage . . . . . . . . . . . GND -0.3V to VCC +0.3V
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 2
Thermal Information
Thermal Resistance (Typical, Note 1)
θ
JA
(
o
C/W)
SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
118
Maximum Junction Temperature (Plastic Package) . . . . . . . .150
o
C
Maximum Storage Temperature Range . . . . . . . . . . -65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300
o
C
(SOIC - Lead Tips Only)
Operating Conditions
Supply Voltage, V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . +12V
±10%
Ambient Temperature Range . . . . . . . . . . . . . . . . . . . . . 0
o
C to 70
o
C
Junction Temperature Range . . . . . . . . . . . . . . . . . . . . 0
o
C to 125
o
C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1.
θ
JA
is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief 379 for details.
Electrical Specifications
PARAMETER
VCC SUPPLY CURRENT
Nominal Supply
POWER-ON RESET
Rising VCC Threshold
Falling VCC Threshold
Rising V
OCSET
Threshold
OSCILLATOR
Free Running Frequency
Total Variation
Ramp Amplitude
REFERENCE AND DAC
DACOUT Voltage Accuracy
ERROR AMPLIFIER
DC Gain
Gain-Bandwidth Product
Slew Rate
GATE DRIVERS
Upper Gate Source
Upper Gate Sink
Lower Gate Source
Lower Gate Sink
PROTECTION
Recommended Operating Conditions, Unless Otherwise Noted
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
I
CC
UGATE and LGATE Open
-
5
-
mA
V
OCSET
= 4.5V
V
OCSET
= 4.5V
-
8.2
-
-
-
1.26
10.4
-
-
V
V
V
RT = OPEN
6kΩ < RT to GND < 200kΩ
∆V
OSC
RT = Open
185
-15
-
200
-
1.9
215
+15
-
kHz
%
V
P-P
-1.0
-
+1.0
%
-
GBW
SR
COMP = 10pF
-
-
88
15
6
-
-
-
dB
MHz
V/µs
I
UGATE
R
UGATE
I
LGATE
R
LGATE
V
BOOT
- V
PHASE
= 12V, V
UGATE
= 6V
I
LGATE
= 0.3A
VCC = 12V, V
LGATE
= 6V
I
LGATE
= 0.3A
350
-
300
-
500
5.5
450
3.5
-
10
-
6.5
mA
Ω
mA
Ω
Over-Voltage Trip (V
SEN
/DACOUT)
OCSET Current Source
OVP Sourcing Current
Soft Start Current
POWER GOOD
Upper Threshold (V
SEN
/ DACOUT)
Lower Threshold (V
SEN
/ DACOUT)
Hysteresis (VSEN / DACOUT)
PGOOD Voltage Low
V
PGOOD
VSEN Rising
VSEN Falling
Upper and Lower Threshold
I
PGOOD
= -5mA
I
OCSET
I
OVP
I
SS
V
OCSET
= 4.5V
DC
V
SEN
= 5.5V, V
OVP
= 0V
-
170
60
-
115
200
-
10
120
230
-
-
%
µA
mA
µA
106
89
-
-
-
-
2
0.5
111
94
-
-
%
%
%
V
3
HIP6004
Typical Performance Curves
80
70
1000
RESISTANCE (kΩ)
R
T
PULLUP
TO +12V
I
CC
(mA)
60
C
UPPER
= C
LOWER
= C
GATE
50
40
C
GATE
= 1000pF
30
10
R
T
PULLDOWN TO V
SS
10
10
100
SWITCHING FREQUENCY (kHz)
1000
0
100
200
20
C
GATE
= 10pF
C
GATE
= 3300pF
100
300
400
500
600
700
800
SWITCHING FREQUENCY (kHz)
900
1000
FIGURE 1. R
T
RESISTANCE vs FREQUENCY
FIGURE 2. BIAS SUPPLY CURRENT vs FREQUENCY
Functional Pin Description
VSEN
OCSET
SS
VID0
VID1
VID2
VID3
VID4
COMP
1
2
3
4
5
6
7
8
9
20 RT
19 OVP
18 VCC
17 LGATE
16 PGND
15 BOOT
14 UGATE
13 PHASE
12 PGOOD
11 GND
VID0-4 (Pins 4-8)
VID0-4 are the input pins to the 5-bit DAC. The states of
these five pins program the internal voltage reference
(DACOUT). The level of DACOUT sets the converter output
voltage. It also sets the PGOOD and OVP thresholds. Table
1 specifies DACOUT for the 32 combinations of DAC inputs.
COMP (Pin 9) and FB (Pin 10)
COMP and FB are the available external pins of the error
amplifier. The FB pin is the inverting input of the error
amplifier and the COMP pin is the error amplifier output.
These pins are used to compensate the voltage-control
feedback loop of the converter.
FB 10
GND (Pin 11)
VSEN (Pin 1)
This pin is connected to the converters output voltage. The
PGOOD and OVP comparator circuits use this signal to
report output voltage status and for overvoltage protection.
Signal ground for the IC. All voltage levels are measured with
respect to this pin.
PGOOD (Pin 12)
PGOOD is an open collector output used to indicate the
status of the converter output voltage. This pin is pulled low
when the converter output is not within
±10%
of the
DACOUT reference voltage.
OCSET (Pin 2)
Connect a resistor (R
OCSET
) from this pin to the drain of the
upper MOSFET. R
OCSET
, an internal 200µA current source
(I
OCS
), and the upper MOSFET on-resistance (r
DS(ON)
) set
the converter over-current (OC) trip point according to the
following equation:
I
OCS
•
R
OCSET
I
PEAK
= -------------------------------------------
-
r
DS
(
ON
)
PHASE (Pin 13)
Connect the PHASE pin to the upper MOSFET source. This
pin is used to monitor the voltage drop across the MOSFET
for over-current protection. This pin also provides the return
path for the upper gate drive.
UGATE (Pin 14)
Connect UGATE to the upper MOSFET gate. This pin
provides the gate drive for the upper MOSFET.
An over-current trip cycles the soft-start function.
SS (Pin 3)
Connect a capacitor from this pin to ground. This capacitor,
along with an internal 10µA current source, sets the soft-
start interval of the converter.
BOOT (Pin 15)
This pin provides bias voltage to the upper MOSFET driver.
A bootstrap circuit may be used to create a BOOT voltage
suitable to drive a standard N-Channel MOSFET.
4
HIP6004
PGND (Pin 16)
This is the power ground connection. Tie the lower MOSFET
source to this pin.
increasing width that charge the output capacitor(s). This
interval of increasing pulse width continues to t
2
. With sufficient
output voltage, the clamp on the reference input controls the
output voltage. This is the interval between t
2
and t
3
in Figure 3.
At t
3
the SS voltage exceeds the DACOUT voltage and the
output voltage is in regulation. This method provides a rapid
and controlled output voltage rise. The PGOOD signal toggles
‘high’ when the output voltage (VSEN pin) is within
±5%
of
DACOUT. The 2% hysteresis built into the power good
comparators prevents PGOOD oscillation due to nominal
output voltage ripple.
LGATE (Pin 17)
Connect LGATE to the lower MOSFET gate. This pin
provides the gate drive for the lower MOSFET.
VCC (Pin 18)
Provide a 12V bias supply for the chip to this pin.
OVP (Pin 19)
The OVP pin can be used to drive an external SCR in the
event of an overvoltage condition.
RT (Pin 20)
This pin provides oscillator switching frequency adjustment.
By placing a resistor (R
T
) from this pin to GND, the nominal
200kHz switching frequency is increased according to the
following equation:
5
•
10
Fs
≈
200kHz
+ --------------------
-
R
T
(
kΩ
)
6
0V
PGOOD
(2V/DIV.)
SOFT-START
(1V/DIV.)
OUTPUT
VOLTAGE
(1V/DIV.)
0V
0V
t
1
t
2
TIME (5ms/DIV.)
t
3
(R
T
to GND)
Conversely, connecting a pull-up resistor (R
T
) from this pin
to VCC reduces the switching frequency according to the
following equation:
4
•
10
Fs
≈
200kHz
– --------------------
-
R
T
(
kΩ
)
7
(R
T
to 12V)
FIGURE 3. SOFT START INTERVAL
Functional Description
Initialization
The HIP6004 automatically initializes upon receipt of power.
Special sequencing of the input supplies is not necessary.
The Power-On Reset (POR) function continually monitors
the input supply voltages. The POR monitors the bias
voltage at the VCC pin and the input voltage (V
IN
) on the
OCSET pin. The level on OCSET is equal to V
IN
less a fixed
voltage drop (see over-current protection). The POR function
initiates soft start operation after both input supply voltages
exceed their POR thresholds. For operation with a single
+12V power source, V
IN
and V
CC
are equivalent and the
+12V power source must exceed the rising V
CC
threshold
before POR initiates operation.
Over-Current Protection
The over-current function protects the converter from a
shorted output by using the upper MOSFETs on-resistance,
r
DS(ON)
to monitor the current. This method enhances the
converter’s efficiency and reduces cost by eliminating a
current sensing resistor.
SOFT-START
OUTPUT INDUCTOR
4V
2V
0V
15A
10A
5A
0A
Soft Start
The POR function initiates the soft start sequence. An internal
10µA current source charges an external capacitor (C
SS
) on
the SS pin to 4V. Soft start clamps the error amplifier output
(COMP pin) and reference input (+ terminal of error amp) to the
SS pin voltage. Figure 3 shows the soft start interval with
C
SS
= 0.1µF. Initially the clamp on the error amplifier (COMP
pin) controls the converter’s output voltage. At t
1
in Figure 3, the
SS voltage reaches the valley of the oscillator’s triangle wave.
The oscillator’s triangular waveform is compared to the ramping
error amplifier voltage. This generates PHASE pulses of
TIME (20ms/DIV.)
FIGURE 4. OVER-CURRENT OPERATION
The over-current function cycles the soft-start function in a
hiccup mode to provide fault protection. A resistor (R
OCSET
)
programs the over-current trip level. An internal 200µA current
sink develops a voltage across R
OCSET
that is referenced to
V
IN
. When the voltage across the upper MOSFET (also
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