H8/3637 Series
H8/3637, H8/3636, H8/3635
Hardware Manual
ADE-602-152
Rev. 1.0
8/1/98
Hitachi, Ltd.
MC-Setsu
Notice
When using this document, keep the following in mind:
1. This document may, wholly or partially, be subject to change without notice.
2. All rights are reserved: No one is permitted to reproduce or duplicate, in any form, the whole
or part of this document without Hitachi’s permission.
3. Hitachi will not be held responsible for any damage to the user that may result from accidents
or any other reasons during operation of the user’s unit according to this document.
4. Circuitry and other examples described herein are meant merely to indicate the characteristics
and performance of Hitachi’s semiconductor products. Hitachi assumes no responsibility for
any intellectual property claims or other problems that may result from applications based on
the examples described herein.
5. No license is granted by implication or otherwise under any patents or other rights of any third
party or Hitachi, Ltd.
6. MEDICAL APPLICATIONS: Hitachi’s products are not authorized for use in MEDICAL
APPLICATIONS without the written consent of the appropriate officer of Hitachi’s sales
company. Such use includes, but is not limited to, use in life support systems. Buyers of
Hitachi’s products are requested to notify the relevant Hitachi sales offices when planning to
use the products in MEDICAL APPLICATIONS.
Preface
The H8/300L Series of single-chip microcomputers has a high-speed H8/300L CPU core, with
many necessary peripheral system functions on-chip. The H8/300L CPU instruction set is
compatible with the H8/300 CPU.
On-chip peripheral functions of the H8/3637 Series include a high-precision DTMF generator for
tone dialing, a 14-bit PWM, five types of timers, two serial communication interface channels, and
an A/D converter.
This manual describes the hardware of the H8/3637 Series. For details on the H8/3637 Series
instruction set, refer to the
H8/300L Series Programming Manual.
Contents
Section 1
1.1
1.2
1.3
Overview
...........................................................................................................
Overview............................................................................................................................
Internal Block Diagram .....................................................................................................
Pin Arrangement and Functions ........................................................................................
1.3.1 Pin Arrangement ..................................................................................................
1.3.2 Pin Functions........................................................................................................
1
1
5
6
6
8
Section 2
2.1
CPU
..................................................................................................................... 13
13
13
14
14
15
15
15
17
17
18
19
20
20
22
26
28
30
31
31
33
37
39
40
42
42
43
44
44
46
46
46
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2.2
2.3
2.4
2.5
2.6
2.7
Overview ...........................................................................................................................
2.1.1 Features ................................................................................................................
2.1.2 Address Space ......................................................................................................
2.1.3 Register Configuration .........................................................................................
Register Descriptions.........................................................................................................
2.2.1 General Registers..................................................................................................
2.2.2 Control Registers..................................................................................................
2.2.3 Initial Register Values ..........................................................................................
Data Formats......................................................................................................................
2.3.1 Data Formats in General Registers.......................................................................
2.3.2 Memory Data Formats..........................................................................................
Addressing Modes .............................................................................................................
2.4.1 Addressing Modes................................................................................................
2.4.2 Effective Address Calculation..............................................................................
Instruction Set....................................................................................................................
2.5.1 Data Transfer Instructions ....................................................................................
2.5.2 Arithmetic Operations ..........................................................................................
2.5.3 Logic Operations ..................................................................................................
2.5.4 Shift Operations....................................................................................................
2.5.5 Bit Manipulations .................................................................................................
2.5.6 Branching Instructions..........................................................................................
2.5.7 System Control Instructions .................................................................................
2.5.8 Block Data Transfer Instruction ...........................................................................
Basic Operational Timing..................................................................................................
2.6.1 Access to On-Chip Memory (RAM, ROM) .........................................................
2.6.2 Access to On-Chip Peripheral Modules ...............................................................
CPU States .........................................................................................................................
2.7.1 Overview ..............................................................................................................
2.7.2 Program Execution State ......................................................................................
2.7.3 Program Halt State ...............................................................................................
2.7.4 Exception-Handling State ....................................................................................
2.8
2.9
Memory Map ..................................................................................................................... 47
Application Notes.............................................................................................................. 48
2.9.1 Notes on Data Access........................................................................................... 48
2.9.2 Notes on Bit Manipulation ................................................................................... 50
2.9.3 Notes on Use of the EEPMOV Instruction .......................................................... 56
Section 3
3.1
3.2
Exception Handling
........................................................................................ 57
57
57
57
57
58
59
59
61
69
70
70
75
76
76
76
3.3
3.4
Overview............................................................................................................................
Reset ..................................................................................................................................
3.2.1 Overview ..............................................................................................................
3.2.2 Reset Sequence.....................................................................................................
3.2.3 Interrupt Immediately after Reset ........................................................................
Interrupts............................................................................................................................
3.3.1 Overview ..............................................................................................................
3.3.2 Interrupt Control Registers ...................................................................................
3.3.3 External Interrupts................................................................................................
3.3.4 Internal Interrupts .................................................................................................
3.3.5 Interrupt Operations..............................................................................................
3.3.6 Interrupt Response Time ......................................................................................
Application Notes..............................................................................................................
3.4.1 Notes on Stack Area Use......................................................................................
3.4.2 Notes on Rewriting Port Mode Registers.............................................................
Section 4
4.1
Clock Pulse Generators
................................................................................. 79
79
79
79
80
83
84
84
4.2
4.3
4.4
4.5
Overview............................................................................................................................
4.1.1 Block Diagram......................................................................................................
4.1.2 System Clock and Subclock .................................................................................
System Clock Generator....................................................................................................
Subclock Generator ...........................................................................................................
Prescalers ...........................................................................................................................
Note on Oscillators ............................................................................................................
Section 5
5.1
5.2
Power-Down Modes
...................................................................................... 87
5.3
Overview............................................................................................................................ 87
5.1.1 System Control Registers ..................................................................................... 90
Sleep Mode........................................................................................................................ 93
5.2.1 Transition to Sleep Mode ..................................................................................... 93
5.2.2 Clearing Sleep Mode ............................................................................................ 93
Standby Mode.................................................................................................................... 94
5.3.1 Transition to Standby Mode ................................................................................. 94
5.3.2 Clearing Standby Mode........................................................................................ 94
5.3.3 Oscillator Settling Time after Standby Mode is Cleared...................................... 95
5.3.4 Transition to Standby Mode and Pin States ......................................................... 96
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