1CY 7C26 9
CY7C269
8K x 8 Registered
Diagnostic PROM
Features
• CMOS for optimum speed/power
• High speed (commercial and military)
— 15-ns address set-up
— 12-ns clock to output
• Low power
— 660 mW (commercial)
— 770 mW (military)
• On-chip edge-triggered registers
— Ideal for pipelined microprogrammed systems
• On-chip diagnostic shift register
— For serial observability and controllability of the out-
put register
• EPROM technology
— 100% programmable
— Reprogrammable (7C269W)
• 5V
±10%
V
CC
, commercial and military
• Capable of withstanding >2001V static discharge
• Slim 300-mil, 28-pin plastic or hermetic DIP
Functional Description
The CY7C269 is a 8K x 8 registered diagnostic PROM. It is
organized as 8,192 words by 8 bits wide, and has both a pipe-
line output register and an onboard diagnostic shift register.
The device features a programmable initialize byte that may
be loaded into the pipeline register with the initialize signal.
The programmable initialize byte is the 8,193rd byte in the
PROM, and may be programmed to any desired value.
Logic Block Diagram
A
12
A
11
A
10
A
9
A
8
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
Pin Configurations
CerDIP/Flatpack
Top View
ADDRESS
DECODER
ROW
DECODER
COLUMN
MULTIPLEXER
MODE
DIAGNOSTIC MUX
A
7
A
6
A
5
A
4
A
3
A
2
MODE
CLOCK
A
1
A
0
O
0
O
1
O
2
GND
S/L
8-BIT EDGE-
TRIGGERED
SHIFT REGISTER
CP
SDI
SDO
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
CC
A
8
A
9
A
10
A
11
A
12
E/E
S
, I
SDI
SDO
O
7
O
6
O
5
O
4
O
3
E/I
CONTROL
LOGIC
PROGRAMMABLE
INITIALIZE WORD
8-BIT
EDGE-TRIGGERED
PIPELINE REGISTER
C269–2
LCC/PLCC (Opaque Only)
Top View
4 3 2 1 28 27 26
25
5
24
6
23
7
22
8
21
9
20
10
19
11
12 1314151617 18
CLOCK
A
3
A
2
MODE
CLOCK
A
1
A
0
O
0
A
10
A
11
A
12
E/E
S
,I
SDI
SDO
O
7
O
7
O
6
O
5
O
4
O
3
O
2
O
1
O
0
C269–1
C269–3
Selection Guide
Minimum Address Set-Up Time (ns)
Maximum Clock to Output (ns)
Maximum Operating Current Commercial
(mA)
Military
7C269–15
15
12
120
140
7C269–25
25
15
120
140
7C269–40
40
20
100
7C269–50
50
25
80
120
Cypress Semiconductor Corporation
•
3901 North First Street
•
San Jose
• CA 95134 •
408-943-2600
December 1987 – Revised May 1993
CY7C269
Functional Description
(continued)
The CY7C269 is optimized for applications that require diag-
nostics in a minimum amount of board area. Packaged in 28
pins, it has 13 address signals (A
0
through A
12
), 8 data out
signals (O
0
through O
7
), E/I (Enable or Initialize), and CLOCK
(pipeline and diagnostic clock). Additional diagnostic signals
consist of MODE, SDI (shift in), and SDO (shift out). Normal
pipelined operation and diagnostic operation are mutually ex-
clusive.
When the MODE signal is LOW, the 7C269 operates in a nor-
mal pipelined mode. CLOCK functions as a pipeline clock,
loading the contents of the addressed memory location into
the pipeline register on each rising edge. The data will appear
on the outputs if they are enabled. One pin on the 7C269 is
programmed to perform either the Enable or the Initialize func-
tion. If the E/I pin is used for a INIT (asynchronous initialize)
function, the outputs are permanently enabled and the initial-
ize word is loaded into the pipeline register on a HIGH to LOW
transition of the INIT signal. The INIT LOW disables CLOCK
and must return high to re-enable CLOCK. If the E/I pin is used
for an enable signal, it may be programmed for either synchro-
nous or asynchronous operation.
When the MODE signal is HIGH, the 7C269 operates in the
diagnostic mode. The E/I signal becomes a secondary mode
signal designating whether to shift the diagnostic shift register
or to load either the diagnostic register or the pipeline register.
If E/I is HIGH, it shifts SDI into the least-significant location of
the diagnostic register and all bits one location toward the
most-significant location on each rising edge. The contents of
the most-significant location in the diagnostic register are
available on the SDO pin.
If the E/I signal is LOW, SDI becomes a direction signal, trans-
ferring the contents of the diagnostic register into the pipeline
register when SDI is LOW. When SDI is HIGH, the contents of
the output pins are transferred into the diagnostic register.
Both transfers occur on a LOW to HIGH transition of the
CLOCK. If the outputs are enabled, the contents of the pipeline
register are transferred into the diagnostic register. If the out-
puts are disabled, an external source of data may be loaded
into the diagnostic register. In this condition, the SDO signal is
internally driven to be the same as the SDI signal, thus prop-
agating the “direction of transfer information” to the next device
in the string.
Maximum Ratings
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Storage Temperature .................................–65
°
C to +150
°
C
Ambient Temperature with
Power Applied.............................................–55
°
C to +125
°
C
Supply Voltage to Ground Potential ............... –0.5V to +7.0V
DC Voltage Applied to Outputs
in High Z State ............................................... –0.5V to +7.0V
DC Input Voltage............................................ –3.0V to +7.0V
DC Program Voltage .....................................................13.0V
UV Exposure.................................................7258 Wsec/cm
2
Static Discharge Voltage............................................>2001V
(per MIL-STD-883, Method 3015)
Latch-Up Current ..................................................... >200 mA
Operating Range
Range
Commercial
Industrial
[1]
Military
[2]
Ambient
Temperature
0
°
C to +70
°
C
–40
°
C to +85
°
C
–55
°
C to +125
°
C
V
CC
5V
±
10%
5V
±
10%
5V
±
10%
Notes:
1. Contact a Cypress representative for industrial temperature range spec-
ifications.
2. T
A
is the “instant on” case temperature.
2
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