HD74BC573A
Octal D Type Transparent Latches With 3 State Outputs
REJ03D0287–0300Z
(Previous ADE-205-021A (Z))
Rev.3.00
Jul.16.2004
Description
The HD74BC573A provides high drivability and operation equal to or better than high speed bipolar standard logic IC
by using Bi-CMOS process. The device features low power dissipation that is about 1/5 of high speed bipolar logic IC,
when the frequency is 10 MHz. The device has eight D type latches with three state outputs in a 20 pin package. When
the latch enable input is high, the Q outputs will follow the D inputs. When the latch enable goes low, data at the D
inputs will be retained at the outputs until latch enable returns high again. When a high logic level is applied to the
output control input, all outputs go to a high impedance state, regardless of what signals are present at the other inputs
and the state of the storage elements.
Features
•
Input/Output are at high impedance state when power supply is off.
•
Built in input pull up circuit can make input pins be open, when not used.
•
TTL level input
•
Wide operating temperature range
Ta = –40 to + 85°C
•
Ordering Information
Part Name
HD74BC573AP
HD74BC573AFPEL
Package Type
DILP-20 pin
Package Code
DP-20N, -20NEV
P
FP
Package
Abbreviation
—
EL (2,000 pcs/reel)
Taping Abbreviation
(Quantity)
SOP-20 pin (JEITA) FP-20DAV
Note: Please consults the sales office for the above package availability.
Function Table
Output Control
L
L
L
H
H
L
X
Z
Q
0
:
:
:
:
:
H
H
L
X
Latch Enable
H
L
X
X
Data
H
L
Q
0
Z
Output Q
High leve
Low level
Immaterial
High impedance
Level of Q before the indicated steady input conditions were established
Rev.3.00, Jul.16.2004, page 1 of 8
HD74BC573A
Pin Arrangement
Output
Control
1D
2D
3D
4D
5D
6D
7D
8D
GND
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
CC
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
Latch
Enable
(Top view)
Absolute Maximum Ratings
Item
Supply voltage
Input diode current
Input voltage
Output voltage
Off state output voltage
Symbol
V
CC
I
IK
V
IN
V
OUT
V
OUT(off)
Rating
–0.5 to +7.0
±30
–0.5 to +7.5
–0.5 to +7.5
–0.5 to +5.5
Unit
V
mA
V
V
V
Storage temperature
Tstg
–65 to +150
°C
Note: 1. The absolute maximum ratings are values which must not individually be exceeded, and furthermore, no two
of which may be realized at the same time.
Recommended Operating Conditions
Item
Supply voltage
Input voltage
Output voltage
Operating temperature
Input rise/fall time*
1
Note:
Symbol
V
CC
V
IN
V
OUT
Topr
t
r
, t
f
4.5
0
0
–40
0
Min
5.0
—
—
—
—
Typ
5.5
V
CC
V
CC
85
8
Max
V
V
V
°C
ns/V
Unit
1. This item guarantees maximum limit when one input switches.
Waveform: Refer to test circuit of switching characteristics.
Rev.3.00, Jul.16.2004, page 2 of 8
HD74BC573A
Logic Diagram
Output
Control
1D
D
Q
CK
D
Q
CK
1Q
2D
2Q
7D
D
Q
CK
D
Q
CK
7Q
8D
Latch
Enable
8Q
Electrical Characteristics
(Ta = –40°C to +85°C)
Item
Input voltage
Output voltage
Symbol
V
IH
V
IL
V
OH
V
OL
Input diode voltage
Input current
V
IK
I
I
4.5
4.5
4.5
4.5
4.5
5.5
5.5
5.5
5.5
5.5
5.5
5.5
5.5
5.5
5.5
V
CC
(V)
Min
2.0
—
2.4
2.0
—
—
—
—
—
—
–100
—
—
—
—
—
—
Max
—
0.8
—
—
0.4
0.5
–1.2
–250
1.0
100
–225
50
–50
29.5
2.5
2.5
1.5
Unit
V
V
V
V
V
V
V
µA
µA
µA
mA
µA
µA
mA
mA
mA
mA
I
OH
= –3 mA
I
OH
= –15 mA
I
OL
= 24 mA
I
OL
= 48 mA
I
IN
= –18 mA
V
IN
= 0 V
V
IN
= 5.5 V
V
IN
= 7.0 V
V
IN
= 0 or 5.5 V
V
O
= 2.7 V
V
O
= 0.5 V
V
IN
= 0 or 5.5 V
All outputs is “L”
V
IN
= 0 or 5.5 V
All outputs is “H”
V
IN
= 0 or 5.5 V
All outputs is “Z”
V
IN
= 3.4 or 0.5 V
Test Conditions
Short circuit output current*
1
Off state output current
Supply current
I
OS
I
OZH
I
OZL
I
CCL
I
CCH
I
CCZ
I
CCT
*
2
Notes: 1. Not more than one output should be shorted at a time and duration of the short circuit should not exceed one
second.
2. When input by the TTL level, it shows I
CC
increase at per one input pin.
Rev.3.00, Jul.16.2004, page 3 of 8
HD74BC573A
Switching Test Method
(C
L
= 50 pF)
Ta = 25°C
V
CC
= 5.0 V
Item
Propagation
delay time
LE
→
Q
Output enable time
Output disable time
Setup time
Hold time
Pulse width
Input capacitanse
Output capacitance
Symbol
D
→
Q
t
PLH
t
PHL
t
PLH
t
PHL
t
ZH
t
ZL
t
HZ
t
LZ
t
S
(H)
t
S
(L)
t
h
(H)
t
h
(L)
t
w
C
IN
C
O
Min
3.0
3.0
3.0
3.0
3.0
3.0
3.0
3.0
2.0
2.0
2.0
2.0
6.0
3.0 (Typ)
15.0 (Typ)
Max
8.0
8.0
8.0
8.0
9.0
9.0
8.0
8.0
—
—
—
—
—
Ta = –40 to 85°C
V
CC
= 5.0 V ±10%
Min
3.0
3.0
3.0
3.0
3.0
3.0
3.0
3.0
2.0
2.0
2.0
2.0
6.0
—
—
Max
10.0
10.0
10.0
10.0
11.0
11.0
10.0
10.0
—
—
—
—
—
Unit
Test conditions
ns
See under figure
ns
ns
ns
ns
ns
ns
pF
pF
V
IN
= V
CC
or GND
V
O
= V
CC
or GND
Test Circuit
V
CC
OC
V
CC
Input
Pulse Generator
Z
out
= 50
Ω
Pulse Generator
Z
out
= 50
Ω
See Function Table
Output
Input
1D to 8D
1Q to 8Q
LE
C
L
=
50 pF
500
Ω
450
Ω
50
Ω
Scope
*2
OPEN
7V
Notes:
1. C
L
includes probe and jig capacitance.
2. OPEN: t
PLH
, t
PHL
, t
ZH
, t
HZ
, t
h
, t
S
, t
w
7 V: t
ZL
, t
LZ
Rev.3.00, Jul.16.2004, page 4 of 8
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