IRFR9220, IRFU9220
Data Sheet
January 2002
3.6A, 200V, 1.500 Ohm, P-Channel Power
MOSFETs
These are advanced power MOSFETs designed, tested, and
guaranteed to withstand a specific level of energy in the
avalanche breakdown mode of operation. These are
P-Channel enhancement-mode silicon gate power field-
effect transistors designed for applications such as switching
regulators, switching converters, motor drivers, relay drivers,
and drivers for high-power bipolar switching transistors
requiring high speed and low gate-drive power. These types
can be operated directly from integrated circuits.
Formerly developmental type TA17502.
Features
• 3.6A, 200V
• r
DS(ON)
= 1.500
Ω
• Temperature Compensating PSPICE
®
Model
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
• Related Literature
- TB334 “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
D
Ordering Information
PART NUMBER
IRFR9220
IRFU9220
PACKAGE
TO-252AA
TO-251AA
BRAND
IF9220
IF9220
G
NOTE: When ordering use the entire part number. Add the suffix 9A
to obtain the TO-252AA variant in tape and reel, e.g., IRFR92209A.
S
Packaging
JEDEC TO-251AA
SOURCE
DRAIN
GATE
GATE
SOURCE
DRAIN (FLANGE)
DRAIN (FLANGE)
JEDEC TO-252AA
©2002 Fairchild Semiconductor Corporation
IRFR9220, IRFU9220 Rev. B
IRFR9220, IRFU9220
Absolute Maximum Ratings
T
C
= 25
o
C, Unless Otherwise Specified
IRFR9220, IRFU9220
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DSS
Drain to Gate Voltage (R
GS
= 20k
Ω
) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DGR
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
GS
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I
D
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
DM
Single Pulse Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E
AS
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
D
Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
J
, T
STG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
L
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T
pkg
-200
-200
±
20
3.6
Refer to Peak Current Curve
Refer to UIS Curve
42
0.33
-55 to 150
300
260
UNITS
V
V
V
A
W
W/
o
C
o
C
o
C
o
C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. T
J
= 25
o
C to 125
o
C.
Electrical Specifications
PARAMETER
T
C
= 25
o
C, Unless Otherwise Specified
SYMBOL
BV
DSS
V
GS(TH)
I
DSS
I
GSS
r
DS(ON)
t
ON
t
d(ON)
t
r
t
d(OFF)
t
f
t
OFF
Q
g(TOT)
Q
gd
Q
gs
C
ISS
C
OSS
C
RSS
R
θ
JC
R
θ
JA
V
GS
= 0 to -10V
V
DD
= -160V,
I
D
= 3.9A,
R
L
= 41
Ω
I
G(REF)
= 1.45mA
TEST CONDITIONS
I
D
= 250
µ
A, V
GS
= 0V
V
GS
= V
DS
, I
D
= 250
µ
A
V
DS
= Rated BV
DSS
, V
GS
= 0V
V
DS
= 0.8 x Rated BV
DSS
, V
GS
= 0V, T
C
= 150
o
C
V
GS
=
±
20V
I
D
= 2.2A, V
GS
= -10V (Figure 9)
V
DD
= -100V, I
D
= 3.9A,
R
L
= 24
Ω
, V
GS
= -10V,
R
GS
= 18
Ω
(Figures 13, 16, 17)
MIN
-200
-2.0
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
TYP
-
-
-
-
-
-
-
8.8
27
7.3
19
-
20
11
3.3
550
110
33
-
-
MAX
-
-4.0
-25
-250
±
100
1.500
50
-
-
-
-
50
-
-
-
-
-
-
3.00
100
UNITS
V
V
µ
A
µ
A
nA
Ω
ns
ns
ns
ns
ns
ns
nC
nC
nC
pF
pF
pF
o
C/W
o
C/W
Drain to Source Breakdown Voltage
Gate to Threshold Voltage
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
Drain to Source On Resistance (Note 2)
Turn-On Time
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Turn-Off Time
Total Gate Charge
Gate to Drain Charge
Gate to Source Charge
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Thermal Resistance Junction to Case
Thermal Resistance Junction to Ambient
V
DS
= -25V, V
GS
= 0V, f = 1MHz
(Figure 12)
Source to Drain Diode Specifications
PARAMETER
Source to Drain Diode Voltage (Note 2)
Diode Reverse Recovery Time
Reverse Recovery Charge
NOTES:
2. Pulse test: pulse width
≤
300µs, duty cycle
≤
2%.
3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3).
SYMBOL
V
SD
t
rr
Q
RR
I
SD
= -3.6A
I
SD
= -3.6A, dI
SD
/dt = -100A/
µ
s
TEST CONDITIONS
MIN
-
-
TYP
-
150
0.97
MAX
-6.3
300
2.0
UNITS
V
ns
µ
C
©2002 Fairchild Semiconductor Corporation
IRFR9220, IRFU9220 Rev. B
IRFR9220, IRFU9220
Typical Performance Curves
1.2
POWER DISSIPATION MULTIPLIER
1.0
I
D
, DRAIN CURRENT (A)
-3
0.8
0.6
0.4
0.2
0
0
25
50
75
100
125
150
T
C
, CASE TEMPERATURE (
o
C)
0
Unless Otherwise Specified
-4
-2
-1
25
50
75
100
125
150
T
C
, CASE TEMPERATURE (
o
C)
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
Z
θ
JC
, TRANSIENT THERMAL IMPEDANCE
10
0.5
1
0.2
0.1
0.05
0.1
0.02
0.01
SINGLE PULSE
P
DM
t
1
t
2
NOTES:
DUTY FACTOR: D = t
1
/t
2
PEAK T
J
= P
DM
x Z
θ
JC
+ T
C
10
-3
10
-2
10
-1
t
1
, RECTANGULAR PULSE DURATION (s)
10
0
10
1
0.01
10
-5
10
-4
FIGURE 3. MAXIMUM TRANSIENT THERMAL IMPEDANCE
-10
I
D
, DRAIN CURRENT (A)
100µs
I
DM
, PEAK CURRENT CAPABILITY (A)
-20
-50
FOR TEMPERATURES ABOVE 25
o
C
DERATE PEAK CURRENT
CAPABILITY AS FOLLOWS:
V
GS
= -20V
150
–
T
C
I = I
----------------------
-
25
125
-10
V
GS
= -10V
1ms
-1
OPERATION IN THIS
AREA MAY BE
LIMITED BY r
DS(ON)
T
C
= 25
o
C
T
J
= MAX RATED
-0.1
-1
V
DSS
MAX = -200V
-500
10ms
100ms
DC
TRANSCONDUCTANCE
MAY LIMIT CURRENT
IN THIS REGION
-1
10
-5
10
-4
10
-3
10
-2
10
-1
t, PULSE WIDTH (s)
T
C
= 25
o
C
10
0
10
1
-10
-100
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA
FIGURE 5. PEAK CURRENT CAPABILITY
©2002 Fairchild Semiconductor Corporation
IRFR9220, IRFU9220 Rev. B
IRFR9220, IRFU9220
Typical Performance Curves
-10
I
AS
, AVALANCHE CURRENT (A)
Unless Otherwise Specified
(Continued)
-5
V
GS
= -8V
-4
V
GS
= -10V
V
GS
= -20V
-3
V
GS
= -6V
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
T
C
= 25
o
C
V
GS
= -5V
V
GS
= -4.5V
0
-1.5
-3.0
-4.5
-6.0
-7.5
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
V
GS
= -7V
STARTING T
J
= 25
o
C
STARTING T
J
= 150
o
C
I
D
, DRAIN CURRENT (A)
10
-2
If R = 0
t
AV
= (L) (I
AS
) / (1.3 RATED BV - V
DD
)
DSS
If R
≠
0
t
AV
= (L/R) ln [(I
AS
*R) / (1.3 RATED BV
DSS
- V
DD
) + 1]
-1
0.01
0.1
1
t
AV
, TIME IN AVALANCHE (ms)
-1
0
FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING
FIGURE 7. SATURATION CHARACTERISTICS
I
DS(ON)
, DRAIN TO SOURCE CURRENT (A)
-8
NORMALIZED DRAIN TO SOURCE
ON RESISTANCE
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
V
DD
= -15V
-6
-55
o
C
2.5
2.0
PULSE DURATION = 80µs
V
GS
= -10V
I
D
= -2.2A
25
o
C
1.5
-4
1.0
-2
150
o
C
0.5
0
0
-1
-2
-3
-4
-5
-6
-7
V
GS
, GATE TO SOURCE VOLTAGE (V)
0
-80
-40
0
40
80
120
160
T
J
, JUNCTION TEMPERATURE (
o
C)
FIGURE 8. TRANSFER CHARACTERISTICS
FIGURE 9. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
2.0
V
GS
= V
DS
, I
D
= 250µA
NORMALIZED DRAIN TO SOURCE
BREAKDOWN VOLTAGE
2.0
I
D
= 250µA
1.5
THRESHOLD VOLTAGE
NORMALIZED GATE
1.5
1.0
1.0
0.5
0.5
0
-80
-40
0
40
80
120
160
0
-80
-40
0
40
80
120
160
T
J
, JUNCTION TEMPERATURE (
o
C)
T
J
, JUNCTION TEMPERATURE (
o
C)
FIGURE 10. NORMALIZED GATE THRESHOLD VOLTAGE vs
TEMPERATURE
FIGURE 11. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs TEMPERATURE
©2002 Fairchild Semiconductor Corporation
IRFR9220, IRFU9220 Rev. B
IRFR9220, IRFU9220
Typical Performance Curves
700
600
C, CAPACITANCE (pF)
C
ISS
500
400
300
200
100
0
0
C
RSS
-5
-10
-15
-20
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
-25
V
GS
= 0V, f = 1MHz
C
ISS
= C
GS
+ C
GD
C
RSS
= C
GD
C
OSS
≈
C
DS
+ C
GD
C
OSS
Unless Otherwise Specified
(Continued)
-200
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
V
DD
= BV
DSS
-160
R
L
= 51Ω
I
G(REF)
= -1.45mA
V
GS
= -10V
0.75 BV
DSS
0.75 BV
DSS
0.50 BV
DSS
0.50 BV
DSS
0.25 BV
DSS
0.25 BV
DSS
-40
-8.0
-120
-6.0
-80
-4.0
-2.0
0
20
I
G(REF)
I
G(ACT)
t, TIME (µs)
80
I
G(REF)
I
G(ACT)
0.0
FIGURE 12. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
NOTE: Refer to Application Notes AN7254 and AN7260.
FIGURE 13. NORMALIZED SWITCHING WAVEFORMS FOR
CONSTANT GATE CURRENT
Test Circuits and Waveforms
V
DS
t
AV
L
VARY t
P
TO OBTAIN
REQUIRED PEAK I
AS
R
G
0
-
+
V
DD
V
DD
0V
V
GS
DUT
t
P
I
AS
0.01Ω
I
AS
t
P
BV
DSS
V
DS
FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 15. UNCLAMPED ENERGY WAVEFORMS
t
ON
t
d(ON)
t
r
t
OFF
t
d(OFF)
t
f
10%
10%
R
L
0
DUT
V
GS
R
G
-
V
DD
+
V
DS
V
GS
0
90%
90%
10%
50%
PULSE WIDTH
90%
50%
FIGURE 16. SWITCHING TIME TEST CIRCUIT
FIGURE 17. RESISTIVE SWITCHING WAVEFORMS
©2002 Fairchild Semiconductor Corporation
IRFR9220, IRFU9220 Rev. B
V
GS
, GATE TO SOURCE VOLTAGE (V)
V
DD
= BV
DSS
-10.0
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