Hitachi Single-Chip Microcomputer
H8S/2148 Series
H8S/2148
HD6432148S, HD6432148SW
H8S/2147
HD6432147S, HD6432147SW
H8S/2144 Series
H8S/2144
HD6432144S
H8S/2143
HD6432143S
H8S/2142
HD6432142
H8S/2148 F-ZTAT™
HD64F2148, HD64F2148V,
HD64F2148A, HD64F2148AV,
HD64F2147A, HD64F2147AV
H8S/2147N F-ZTAT™
HD64F2147N, HD64F2147NV
H8S/2144 F-ZTAT™
HD64F2144, HD64F2144V,
HD64F2144A, HD64F2144AV
H8S/2142 F-ZTAT™
HD64F2142R, HD64F2142RV
Hardware Manual
ADE-602-125B
Rev. 3.0
3/26/01
Hitachi, Ltd.
Cautions
1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s
patent, copyright, trademark, or other intellectual property rights for information contained in
this document. Hitachi bears no responsibility for problems that may arise with third party’s
rights, including intellectual property rights, in connection with use of the information
contained in this document.
2. Products and product specifications may be subject to change without notice. Confirm that you
have received the latest product standards or specifications before final design, purchase or
use.
3. Hitachi makes every attempt to ensure that its products are of high quality and reliability.
However, contact Hitachi’s sales office before using the product in an application that
demands especially high quality and reliability or where its failure or malfunction may directly
threaten human life or cause risk of bodily injury, such as aerospace, aeronautics, nuclear
power, combustion control, transportation, traffic, safety equipment or medical equipment for
life support.
4. Design your application so that the product is used within the ranges guaranteed by Hitachi
particularly for maximum rating, operating supply voltage range, heat radiation characteristics,
installation conditions and other characteristics. Hitachi bears no responsibility for failure or
damage when used beyond the guaranteed ranges. Even within the guaranteed ranges,
consider normally foreseeable failure rates or failure modes in semiconductor devices and
employ systemic measures such as fail-safes, so that the equipment incorporating Hitachi
product does not cause bodily injury, fire or other consequential damage due to operation of
the Hitachi product.
5. This product is not designed to be radiation resistant.
6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document
without written approval from Hitachi.
7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi
semiconductor products.
Preface
The H8S/2148 Series, H8S/2144 Series, and H8S/2147N comprise high-performance
microcomputers with a 32-bit H8S/2000 CPU core, and a set of on-chip supporting functions
required for system configuration.
The H8S/2000 CPU can execute basic instructions in one state, and is provided with sixteen
internal 16-bit general registers with a 32-bit configuration, and a concise and optimized
instruction set. The CPU can handle a 16-Mbyte linear address space (architecturally 4 Gbytes).
Programs based on the high-level language C can also be run efficiently.
Single-power-supply flash memory (F-ZTAT™*) and mask ROM versions are available,
providing a quick and flexible response to conditions from ramp-up through full-scale volume
production, even for applications with frequently changing specifications.
On-chip peripheral functions include a 16-bit free-running timer (FRT), 8-bit timer (TMR),
watchdog timer (WDT), two PWM timers (PWM and PWMX), a serial communication interface
(SCI, IrDA), PS/2-compatible keyboard buffer controller, host interface (HIF), D/A converter
(DAC), A/D converter (ADC), and I/O ports. An I
2
C bus interface (IIC) can also be incorporated
as an option.
An on-chip data transfer controller (DTC) is also provided, enabling high-speed data transfer
without CPU intervention.
The H8S/2148 Series has all the above on-chip supporting functions, and can also be provided
with an IIC module as an option. The H8S/2144 Series comprises reduced-function versions, with
fewer TMR channels, and no PWM, keyboard buffer controller, HIF, IIC, or DTC modules, and
the H8S/2147N with fewer TMR channels, no DTC and some other functions.
Use of the H8S/2148 Series, H8S/2144 Series, H8S/2147N enables compact, high-performance
systems to be implemented easily. The comprehensive PC-related interface functions and 16
×
8
matrix key-scan functions are ideal for applications such as notebook PC keyboard control and
intelligent battery and power supply control, while the various timer functions and their
interconnectability (timer connection), plus the interlinked operation of the I
2
C bus interface and
data transfer controller (DTC), in particular, make these devices ideal for use in PC monitors. In
addition, the combination of F-ZTAT™* and reduced-function versions is ideal for applications
such as CD-ROM drive units in which on-chip program memory is essential to meet performance
requirements, product start-up times are short, and program modifications may be necessary after
end-product assembly.
This manual describes the hardware of the H8S/2148 Series, H8S/2144 Series, and H8S/2147N.
Refer to the
H8S/2600 Series and H8S/2000 Series Programming Manual
for a detailed
description of the instruction set.
Note: * F-ZTAT™ (Flexible-ZTAT) is a trademark of Hitachi, Ltd.
On-Chip Supporting Modules
Series
Product names
Bus controller (BSC)
Data transfer controller (DTC)
8-bit PWM timer (PWM)
14-bit PWM timer (PWMX)
16-bit free-running timer (FRT)
8-bit timer (TMR)
Timer connection
Watchdog timer (WDT)
Serial communication interface (SCI)
I
2
C bus interface (IIC)
Keyboard buffer controller
(PS/2 compatible)
Host interface (HIF)
D/A converter
A/D converter
analog inputs
H8S/2148 Series
H8S/2148, 2147
H8S/2147N
H8S/2147N
H8S/2144 Series
H8S/2144, 2143,
2142
Available (16 bits) Available (16 bits) Available (16 bits)
Available
×16
×2
×1
×4
Available
×2
×3
×2
(option)
×3
×4
×2
×8
—
×16
×2
×1
×3
—
×2
×3
×2
×3
×4
×2
×8
×16
—
—
×2
×1
×3
—
×2
×3
—
—
—
×2
×8
×16
expansion A/D inputs
×16
Main Revisions and Additions in this Edition
Page
All pages of this
manual
3 to 5
1.1 Overview
Item
Revisions(See Manual for Details)
Amendment due to introduction of the H8S/2147N
Table 1.1 Overview
PWM, PS2, HIF, I/O, Memory, and Lineup: Amendment
due to introduction of the H8S/2147N
7
1.2 Internal Block Diagram
Figure 1.1(b) Internal Block Diagram of H8S/2147N
Added
10
16 to 19
1.3 Pin Arrangement and Functions
1.3.2 Pin Functions in Each Operating
Mode
1.3.3 Pin Functions
Figure 1.2(b) Pin Arrangement of H8S/2147N
Added
Table 1.2(b) H8S/2147N Pin Functions in Each Operating
Mode
Added
24
All pages of
section 2
90, 91
3.2.2 System Control
Register(SYSCR)
3.2.4 Serial Timer Control
Register(STCR)
3.5 Memory Map in Each Operating
Mode
Section 4
4.3 Interrupts
4.6 Notes on Use of the Stack
Table 1.3 Pin Functions
Description on VCL pin added
Note on TAS instruction added
Note on STM/LDM instruction added
Description on bit 7 and note on bit 6 added
Description on bit 7 to 5,1 and 0 amended
Figure 3.3
H8S/2147N added
Description amended
Fig 4.6 Operation when SP Value is Odd amended
stm32/stm8
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
