QP54AC646
QP SEMICONDUCTOR
April 10, 2012
QP54AC646
Octal Transceiver/Register with Three-State Outputs
General Description
The QP54AC646 consists of registered bus transceiver circuits, with outputs, D-type flip-flops and control circuitry
providing multiplexed transmission of data directly from the input bus or from the internal storage registers. Data on the
A or B bus will be loaded into the respective registers on the LOW-to-HIGH transition of the appropriate clock pin.
The QP54AC646 is available in three package types, a 24-pin 300-mil ceramic DIP, a 28-pin ceramic LCC, and a 24-pin
ceramic flatpack. Military grade product is manufactured in compliance with the latest revision of MIL-PRF-38535 QML,
making it ideally suited to military temperature applications demanding the highest level of performance and reliability.
Features
-
-
-
-
-
Independent registers for A and B buses
Multiplexed real-time and stored data transfers
Three-State outputs
Outputs source/sink 24 mA
Standard Microcircuit Drawing (SMD)
o
Available as SMD# 5962-89682
Connection Diagrams
Pin Assignment
for DIP and FP
Pin Assignment
for LCC
Pin Names
A
0
– A
7
B
0
– B
7
B
Description
Data Register A Inputs/Outputs
Data Register B Inputs/Outputs
Clock Pulse Inputs
Transmit/Receive Inputs
Output Enable Input
Direction Control Input
CPAB, CPBA
SAB, SBA
G
¯
DIR
e2v aerospace and defense, 2945 Oakmead Village Court, Santa Clara, CA 95051
•
Phone:
(408) 737-0992
•
Internet:
www.e2v.com/aero
QP54AC646
Logic Diagram
Data Handling Functions
Real Time Transfer
A-Bus to B-Bus
Real Time Transfer
B-Bus to A-Bus
Storage from
Bus to Register
Transfer from
Register to Bus
Function Table
Inputs
G
¯
H
H
H
L
L
L
L
L
L
L
L
Notes:
Data I/O
SAB
X
X
X
L
L
H
H
X
X
X
x
SBA
X
X
X
X
X
X
X
L
L
H
H
Output
Input
Input
Output
Input
Input
A
0
– A
7
B
0
– B
7
B
Function
Isolation
Clock A
n
Data into A Register
Clock B
n
Data into B Register
A
n
to B
n
—Real Time (Transparent Mode)
Clock A
n
Data into A Register
A Register to B
n
(Stored Mode)
Clock A
n
Data into A Register and Output to B
n
B
n
to A
n
—Real Time (Transparent Mode)
Clock B
n
Data into B Register
B Register to A
n
(Stored Mode)
Clock B
n
Data into B Register and Output to A
n
DIR
X
X
X
H
H
H
H
L
L
L
L
CPAB
H/L
L-to-H
X
X
L-to-H
H/L
L-to-H
X
X
X
X
CPBA
H/L
X
L-to-H
X
X
X
X
X
L-to-H
H/L
L-to-H
The data output functions may be enabled or disabled by various signals at the G and DIR inputs. Data input functions are always enabled;
¯
i.e., data at the bus pins will be stored on every LOW-to-HIGH transition of the appropriate clock inputs.
H – HIGH Voltage
L – LOW Voltage
H/L – HIGH or LOW Voltage L-to-H – Low-to-High Transition
X – Don’t Care
Page 2 of 6
e2v aerospace and defense, 2945 Oakmead Village Court, Santa Clara, CA 95051
QP54AC646
Absolute Maximum Ratings
1,2,3
Stresses above the AMR may cause permanent damage; extended operation at AMR may degrade performance and affect reliability
Condition
Supply Voltage Range (V
CC
)
DC Input Voltage Range (V
IN
)
DC Output Voltage Range (V
OUT
)
Clamp Diode Current (I
IK ,
I
OK
)
DC Output Source/Sink Current (I
O,
per pin)
DC V
CC
/Ground Current (I
CC
or I
GND,
per pin)
Maximum Power Dissipation (P
D
)
Storage Temperature Range (T
STG
)
Junction Temperature (T
J
)
Lead Temperature (soldering, 10 sec.)
-0.5 to +6.0
- 0.5 to V
CC
+0.5
- 0.5 to V
CC
+0.5
±20
±50
±50
500
-65 to +150
+175
+300
Units
Volts DC
Volts DC
Volts DC
mA
mA
mA
mW
ºC
ºC
ºC
Notes
/4
Notes:
1 – Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at
the maximum levels may degrade performance and affect reliability.
2 – Unless otherwise noted, all voltages are referenced to GND.
3 – The limits for the parameters specified herein shall apply over the full specified V
CC
range and case temperature
range of -55°C to +125°C.
4 – Maximum junction temperature shall not be exceeded except for allowable short duration burn-in screening
conditions in accordance with method 5004 of MIL-STD-883.
Recommended Operating Conditions
Condition
Operating Temperature (T
A
)
Supply Voltage Range (V
CC
)
Input Voltage Range (V
IN
)
Output Voltage Range (V
OUT
)
Minimum setup time, A, B to CPAB, CPBA (t
s
)
TC = +25°C, V CC = 3.0 V
TC = -55°C to +125°C, VCC = 3.0 V
TC = +25°C, V CC = 4.5 V
TC = -55°C to +125°C, VCC = 4.5 V
TC = +25°C, V CC = 3.0 V
TC = -55°C to +125°C, VCC = 3.0 V
TC = +25°C, V CC = 4.5 V
TC = -55°C to +125°C, VCC = 4.5 V
TC = +25°C, V CC = 3.0 V
TC = -55°C to +125°C, VCC = 3.0 V
TC = +25°C, V CC = 4.5 V
TC = -55°C to +125°C, VCC = 4.5 V
Units
-55 to +125 ºC
3.0 to 5.5 Volts DC
0 to V
CC
Volts DC
0 to V
CC
Volts DC
5.0
6.0
4.0
4.5
1.0
1.5
1.5
2.0
5.0
5.0
5.0
5.0
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
Minimum hold time, A, B to CPAB, CPBA (t
h
)
Minimum pulse width CPAB, CPBA (t
w
)
Input rise/fall time rate (V
CC
= 3.6 V to 5.5 V)
0 to 8 ns/V
e2v aerospace and defense, 2945 Oakmead Village Court, Santa Clara, CA 95051
Page 3 of 6
QP54AC646
TABLE I – ELECTRICAL PERFORMANCE CHARACTERISTICS
Test
Symbol
Conditions
1
3.0V
≤
V
CC
≤
5.5V
-55ºC
≤
TB
A
≤+125ºC
Unless Otherwise Specified
V
OUT
= 0.1V
or V
CC
−
0.1V
V
OUT
= 0.1V
or V
CC
−
0.1V
V
CC
3.0V
4.5V
5.5V
3.0V
4.5V
5.5V
3.0V
4.5V
5.5V
3.0V
4.5V
5.5V
5.5V
3.0V
4.5V
5.5V
3.0V
4.5V
5.5V
5.5V
0V
Open
5.5V
Min
2.1
3.15
3.85
0.9
1.35
1.65
2.9
4.4
5.4
2.4
3.7
4.7
3.85
0.1
0.1
0.1
0.5
0.5
0.5
1.65
0.4
-0.4
1.5
-1.5
160
Max
Unit
High Level Input Voltage
1
V
IH
V
Low Level Input Voltage
1
V
IL
V
I
OH
= -50 µA
High Level Output Voltage
2
V
OH
I
OH
= -4 mA
I
OH
= -24 mA
I
OH
= -50 mA
I
OL
= 50 µA
Low Level Output Voltage
2
V
OL
I
OL
= 12 mA
I
OL
= 24 mA
I
OL
= 50 mA
For input under test
I
IN
= 1.0 mA, T
A
= 25ºC
For input under test
I
IN
= -1.0 mA, T
A
= 25ºC
Three-state outputs for
I
CCZ
V
V
Positive Input Clamp Voltage
Negative Input Clamp Voltage
Quiescent Supply Current,
Outputs High, Low or
Three-State
Three-State Output High
Leakage Current
Three-State Output Low
Leakage Current
Input High Leakage Current
Input Low Leakage Current
Input Capacitance
Power Dissipation Capacitance
V
IC+
V
IC-
I
CCH
I
CCL
I
CCZ
I
OZH
V
V
µA
V
IN
= V
CC
or GND
V
IN
= V
CC
or GND
V
OUT
= 5.5V
Three state outputs
V
IN
= V
CC
or GND
V
OUT
= 0V
Three state outputs
V
IN
= 5.5V
V
IN
= 0V
T
C
= 25°C
T
A
= 25°C, f = 1MHz
5.5V
10
µA
I
OZL
I
IH
I
IL
C
IN
C
PD
5.5V
5.5V
5.5V
0V
5.0V
-10
1.0
-1.0
15
68
µA
µA
µA
pF
pF
e2v aerospace and defense, 2945 Oakmead Village Court, Santa Clara, CA 95051
Page 4 of 6
QP54AC646
TABLE I – ELECTRICAL PERFORMANCE CHARACTERISTICS (cont.)
Conditions
3.0V
≤
V
CC
≤
5.5V
Test
Symbol
-55ºC
≤
T
A
≤+125ºC
Unless Otherwise Specified
3
V
CC
3.0V
Min
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
Max
17.5
12.0
20.0
14.0
14.5
9.5
15.0
10.0
17.0
12.0
17.0
12.0
14.5
10.5
16.0
12.5
14.5
12.0
16.5
12.0
13.0
9.5
15.5
11.0
14.0
11.5
13.5
11.0
Unit
t
PHL1
C
L
= 50pF
R
L
= 500Ω
t
PLH1
t
PHL2
C
L
= 50pF
R
L
= 500Ω
t
PLH2
Propagation Delay Time ,
CPBA/CPAB to A
n
/B
n
4.5V
3.0V
4.5V
3.0V
4.5V
3.0V
4.5V
3.0V
ns
Propagation Delay Time
3
,
A
n
/B
n
to B
n
/A
n
ns
Propagation Delay Time
3
,
SAB/SBA to A
n
/B
n
t
PHL3
C
L
= 50pF
R
L
= 500Ω
t
PLH3
4.5V
3.0V
4.5V
3.0V
ns
Output Enable Time
3
,
DIR to A
n
/B
n
t
PZH1
C
L
= 50pF
R
L
= 500Ω
t
PZL1
t
PHZ1
C
L
= 50pF
R
L
= 500Ω
t
PLZ1
4.5V
3.0V
4.5V
3.0V
4.5V
3.0V
4.5V
3.0V
ns
Output Disable Time
3
,
DIR to A
n
/B
n
ns
Output Enable Time
3
,
G to A
n
/B
n
¯
t
PZH2
C
L
= 50pF
R
L
= 500Ω
t
PZL2
4.5V
3.0V
4.5V
3.0V
ns
Output Disable Time
3
,
G to A
n
/B
n
¯
t
PHZ2
C
L
= 50pF
R
L
= 500Ω
t
PLZ2
4.5V
3.0V
4.5V
ns
Notes:
1.
2.
3.
The V
IH
and V
IL
tests are not required if applied as forcing functions for V
OH
and V
OL
tests.
The V
OH
and V
OL
tests are tested at V
IN
= V
IH
min or V
IL
max and V
CC
= 3.0V and 4.5V, and guaranteed, if not tested, for
other values of V
CC
. Limits shown apply to operation at V
CC
= 3.3V ± 0.3V and V
CC
= 5.0V ± 0.5 V. Transmission driving
tests are performed at V
CC
= 5.5 V with a 2 ms duration max, with V
IN
= V
CC
or GND. When V
IN
= V
CC
or GND, test is
guaranteed for V
IN
= V
IH
and V
IL
.
For propagation delay tests, all paths are tested. AC limits at V
CC
= 5.5V are equal to limits at V
CC
= 4.5V and guaranteed by
testing at V
CC
= 4.5V. AC limits at V
CC
= 3.6V are equal to limits at V
CC
= 3.0V and guaranteed by testing at V
CC
= 3.0V.
Minimum AC limits for V
CC
= 5.5V are 1.0 ns and guaranteed by guard-banding the V
CC
= 4.5V minimum limits to 1.5 ns.
Page 5 of 6
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