HD74LV373A
Octal D-type Transparent Latches with 3-state Outputs
REJ03D0331–0200Z
(Previous ADE-205-274 (Z))
Rev.2.00
Jun. 25, 2004
Description
The HD74LV373A has eight D type latches with three state outputs in a 20 pin package. When the latch enables input
is high, the Q outputs will follow the D inputs. When the latch enables goes low, data at the D inputs will be retained at
the outputs until latch enable returns high again. When a high logic level is applied to the output control input, all
outputs go to a high impedance state, regardless of what signals are present at the other inputs and the state of the
storage elements. Low-voltage and high-speed operation is suitable for the battery-powered products (e.g., notebook
computers), and the low-power consumption extends the battery life.
Features
•
•
•
•
•
•
•
V
CC
= 2.0 V to 5.5 V operation
All inputs V
IH
(Max.) = 5.5 V (@V
CC
= 0 V to 5.5 V)
All outputs V
O
(Max.) = 5.5 V (@V
CC
= 0 V)
Typical V
OL
ground bounce < 0.8 V (@V
CC
= 3.3 V, Ta = 25°C)
Typical V
OH
undershoot > 2.3 V (@V
CC
= 3.3 V, Ta = 25°C)
Output current ±8 mA (@V
CC
= 3.0 V to 3.6 V), ±16 mA (@V
CC
= 4.5 V to 5.5 V)
Ordering Information
Package Type
SOP–20 pin (JEITA)
SOP–20 pin (JEDEC)
TSSOP–20 pin
Package Code
FP–20DAV
FP–20DBV
TTP–20DAV
Package
Abbreviation
FP
RP
T
Taping Abbreviation
(Quantity)
EL (2,000 pcs/reel)
EL (1,000 pcs/reel)
ELL (2,000 pcs/reel)
Part Name
HD74LV373AFPEL
HD74LV373ARPEL
HD74LV373ATELL
Note: Please consult the sales office for the above package availability.
Function Table
Inputs
OE
H
L
L
L
LE
X
H
H
L
D
X
L
H
X
Output Q
Z
L
H
Q
0
Note: H: High level
L: Low level
X: Immaterial
Z: High impedance
Q
0
: Output level before the indicated steady state input conditions were established.
Rev.2.00 Jun. 25, 2004 page 1 of 10
HD74LV373A
Pin Arrangement
OE
1
1Q 2
1D 3
2D 4
2Q 5
3Q 6
3D 7
4D 8
4Q 9
GND 10
20 V
CC
19 8Q
18 8D
17 7D
16 7Q
15 6Q
14 6D
13 5D
12 5Q
11 LE
(Top view)
Absolute Maximum Ratings
Item
Supply voltage range
Input voltage range*
1
Output voltage range*
1, 2
Input clamp current
Output clamp current
Continuous output current
Continuous current through
V
CC
or GND
Maximum power dissipation at
Ta = 25°C (in still air)*
3
Storage temperature
Symbol
V
CC
V
I
V
O
I
IK
I
OK
I
O
I
CC
or I
GND
P
T
Tstg
Ratings
–0.5 to 7.0
–0.5 to 7.0
–0.5 to V
CC
+ 0.5
–0.5 to 7.0
–20
±50
±35
±70
835
757
–65 to 150
Unit
V
V
V
mA
mA
mA
mA
mW
°C
Conditions
Output: H or L
V
CC
: OFF or Output: Z
V
I
< 0
V
O
< 0 or V
O
> V
CC
V
O
= 0 to V
CC
SOP
TSSOP
Notes: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of
which may be realized at the same time.
1. The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are
observed.
2. This value is limited to 5.5 V maximum.
3. The maximum package power dissipation was calculated using a junction temperature of 150°C.
Rev.2.00 Jun. 25, 2004 page 2 of 10
HD74LV373A
Recommended Operating Conditions
Item
Supply voltage range
Input voltage range
Output voltage range
Output current
Symbol
V
CC
V
I
V
O
I
OH
Min
2.0
0
0
0
—
—
—
—
—
—
—
—
0
0
0
–40
Max
5.5
5.5
V
CC
5.5
–50
–2
–8
–16
50
2
8
16
200
100
20
85
Unit
V
V
V
µA
mA
Conditions
I
OL
µA
mA
Input transition rise or fall rate
∆t
/∆v
ns/V
H or L
High impedance state
V
CC
= 2.0 V
V
CC
= 2.3 to 2.7 V
V
CC
= 3.0 to 3.6 V
V
CC
= 4.5 to 5.5 V
V
CC
= 2.0 V
V
CC
= 2.3 to 2.7 V
V
CC
= 3.0 to 3.6 V
V
CC
= 4.5 to 5.5 V
V
CC
= 2.3 to 2.7 V
V
CC
= 3.0 to 3.6 V
V
CC
= 4.5 to 5.5 V
Operating free-air temperature
Ta
°C
Note: Unused or floating inputs must be held high or low.
Logic Diagram
OE
LE
1
11
C1
1D
3
2
1Q
1D
To Seven Other Channels
Rev.2.00 Jun. 25, 2004 page 3 of 10
HD74LV373A
DC Electrical Characteristics
Ta = –40 to 85°C
Item
Input voltage
Symbol
V
IH
V
CC
(V)*
2.0
2.3 to 2.7
3.0 to 3.6
4.5 to 5.5
2.0
2.3 to 2.7
3.0 to 3.6
4.5 to 5.5
Min to Max
2.3
3.0
4.5
Min to Max
2.3
3.0
4.5
0 to 5.5
5.5
5.5
0
3.3
Min
1.5
V
CC
×
0.7
V
CC
×
0.7
V
CC
×
0.7
—
—
—
—
V
CC
– 0.1
2.0
2.48
3.8
—
—
—
—
—
—
—
—
—
Typ
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
2.9
Max
—
—
—
—
0.5
V
CC
×
0.3
V
CC
×
0.3
V
CC
×
0.3
—
—
—
—
0.1
0.4
0.44
0.55
±1
±5
20
5
—
Unit
V
Test Conditions
V
IL
Output voltage
V
OH
V
V
OL
Input current
Off-state output
current
Quiescent supply
current
Output leakage
current
Input capacitance
I
IN
I
OZ
I
CC
I
OFF
C
IN
µA
µA
µA
µA
pF
I
OH
= –50
µA
I
OH
= –2 mA
I
OH
= –8 mA
I
OH
= –16 mA
I
OL
= 50
µA
I
OL
= 2 mA
I
OL
= 8 mA
I
OL
= 16 mA
V
IN
= 5.5 V or GND
V
O
= V
CC
or GND
V
IN
= V
CC
or GND, I
O
= 0
V
I
or V
O
= 0 to 5.5 V
V
I
= V
CC
or GND
Note: For conditions shown as Min or Max, use the appropriate values under recommended operating conditions.
Rev.2.00 Jun. 25, 2004 page 4 of 10
HD74LV373A
Switching Characteristics
V
CC
= 2.5 ± 0.2 V
Ta = 25°C
Item
Propagation
delay time
Symbol
t
PLH
t
PHL
Min
—
—
—
—
—
—
—
—
4.5
1.5
6.0
Typ
8.3
9.1
10.4
11.1
8.9
10.9
6.2
8.3
—
—
—
Max
15.2
15.7
18.0
18.6
15.8
18.8
12.6
17.4
—
—
—
Ta = –40 to 85°C
Min
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
5.0
1.5
6.5
Max
17.0
19.0
21.0
22.0
19.0
22.0
15.0
19.0
—
—
—
Unit
ns
Test
Conditions
C
L
= 15 pF
C
L
= 50 pF
ns
ns
ns
ns
ns
C
L
= 15 pF
C
L
= 50 pF
C
L
= 15 pF
C
L
= 50 pF
FROM
(Input)
D
LE
D
LE
OE
OE
TO
(Output)
Q
Enable time
Disable time
Setup time
Hold time
Pulse width
t
ZH
t
ZL
t
HZ
t
LZ
t
SU
t
h
t
w
Q
Q
Data before LE
↓
Data after LE
↓
LE "H"
V
CC
= 3.3 ± 0.3 V
Ta = 25°C
Item
Propagation
delay time
Symbol
t
PLH
t
PHL
Min
—
—
—
—
—
—
—
—
4.0
1.0
5.0
Typ
5.8
6.4
7.3
7.8
6.3
7.7
4.7
6.0
—
—
—
Max
11.4
11.0
14.9
14.5
11.4
14.9
10.0
13.2
—
—
—
Ta = –40 to 85°C
Min
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
4.0
1.0
5.0
Max
13.5
13.0
17.0
16.5
13.5
17.0
12.0
15.0
—
—
—
Unit
ns
Test
Conditions
C
L
= 15 pF
C
L
= 50 pF
FROM
(Input)
D
LE
D
LE
OE
OE
TO
(Output)
Q
Enable time
Disable time
Setup time
Hold time
Pulse width
t
ZH
t
ZL
t
HZ
t
LZ
t
SU
t
h
t
w
ns
ns
ns
ns
ns
C
L
= 15 pF
C
L
= 50 pF
C
L
= 15 pF
C
L
= 50 pF
Q
Q
Data before LE
↓
Data after LE
↓
LE "H"
V
CC
= 5.0 ± 0.5 V
Ta = 25°C
Item
Propagation
delay time
Symbol
t
PLH
t
PHL
Min
—
—
—
—
—
—
—
—
4.0
1.0
5.0
Typ
4.1
4.5
5.1
5.5
4.5
5.5
3.3
4.0
—
—
—
Max
7.2
7.2
9.2
9.2
8.1
10.1
7.2
9.2
—
—
—
Ta = –40 to 85°C
Min
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
4.0
1.0
5.0
Max
8.5
8.5
10.5
10.5
9.5
11.5
8.5
10.5
—
—
—
Unit
ns
Test
Conditions
C
L
= 15 pF
C
L
= 50 pF
FROM
(Input)
D
LE
D
LE
OE
OE
TO
(Output)
Q
Enable time
Disable time
Setup time
Hold time
Pulse width
t
ZH
t
ZL
t
HZ
t
LZ
t
SU
t
h
t
w
ns
ns
ns
ns
ns
C
L
= 15 pF
C
L
= 50 pF
C
L
= 15 pF
C
L
= 50 pF
Q
Q
Data before LE
↓
Data after LE
↓
LE "H"
Rev.2.00 Jun. 25, 2004 page 5 of 10
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