ZXSC440
PHOTOFLASH CHARGER
DESCRIPTION
The ZXSC440 is a dedicated photoflash charger,
charging an 80 F photoflash capacitor to 300V in 3.5
seconds from a 3V supply.
The flyback conversion efficiency is typically 75%,
much higher than the commonly used discrete
charging circuits.
The Charge pin enables the circuit to be initiated from
the camera's microprocessor, using negligible current
when flash is not being used.
The Ready pin signals the microprocessor when the
flash is charged and ready to be fired.
A small amount of hysteresis on the voltage feedback
shuts down the device as long as the capacitor remains
fully charged, again using negligible current.
FEATURES
•
Charges a 80 F photoflash capacitor to 300V in
3.5 seconds from 3V
APPLICATIONS
•
Digital camera flash unit
•
Film camera flash unit
•
Charges various value photoflash capacitors
•
Over 75% flyback efficiency
•
Charge and Ready pins
•
Consumes only 4.5 A when not charging
•
Small MSOP8 low profile package
TYPICAL APPLICATION CIRCUIT
PINOUT
MSOP8 pin TOP VIEW
ORDERING INFORMATION
DEVICE
ZXSC440X8TA
ZXSC440X8TC
DEVICE DESCRIPTION
TEMPERATURE RANGE
PART
MARK
ZXSC440
TAPING
OPTIONS
TA, TC
Camera flash charger
-40°C to +85°C
•
TA reels hold 1000 devices
•
TC reels hold 4000 devices
ISSUE 1 - JANUARY 2005
1
SEMICONDUCTORS
ZXSC440
ABSOLUTE MAXIMUM RATINGS
PARAMETER
V
CC
DRIVE
READY
CHARGE
V
FB
, SENSE
Operating temperature
Storage temperature
Power dissipation at 25°C
LIMIT
-0.3 to +10
-0.3 to V
CC
+ 0.3
-0.3 to V
CC
+ 0.3
-0.3 to The lower of (+5.0) or (V
CC
+0.3)
-0.3 to The lower of (+5.0) or (V
CC
+0.3)
-40 to +85
-55 to +150
450
UNIT
V
V
V
V
V
°C
°C
mW
ELECTRICAL CHARACTERISTICS
(Test conditions V
CC
= 3V, T= 25°C unless otherwise stated)
SYMBOL
V
CC
Iq
(1)
PARAMETER
V
CC
range
Quiescent current
Shutdown current
Efficiency
Reference tolerance
Reference temp co
Discharge pulse width
Operating frequency
CONDITIONS
MIN.
1.8
TYP.
MAX.
8
220
UNIT
V
A
A
%
%
%/°C
s
V
CC
=8V
4.5
85
1.8V < V
CC
< 8V
1.8V < V
CC
< 8V
-3.0
0.005
1.7
I
STDN
Eff
(2)
Acc
REF
TCO
REF
T
DRV
F
OSC
INPUT PARAMETERS
V
SENSE
I
SENSE
V
FB
I
FB
VIL
dV
LN
OUTPUT PARAMETERS
I
DRIVE
V
DRIVE
C
DRIVE
VOH
READY
VOL
READY
T
READY
dI
LD
(2)
(3)
3.0
200
kHz
Sense voltage
Sense input current
Feedback voltage
Feedback input current
Shutdown threshold
Shutdown threshold
Line voltage regulation
V
FB
=0V;V
SENSE
=0V
V
FB
=0V;V
SENSE
=0V
22
-1
291
-1.2
1.5
0
28
-7
300
34
-15
309
-4.5
V
CC
0.55
mV
A
mV
A
V
V
%/V
VIH
0.5
Transistor drive current
Transistor voltage drive
Mosfet gate drive cpbty
Ready flag output high
Ready flag output low
V
DRIVE
= 0.7V
2
0
3.4
5
V
CC
-0.4
mA
V
pF
300
I
EOR
= -300nA, T
A
=25°C
I
EOR
= 1mA, T
A
=25°C
T
A
=25°C
2.5
0
195
0.01
V
CC
1
V
V
s
%/mA
Load current regulation
NOTES
(1) Excluding gate/base drive current.
(2) IFB is typically half of these at 3V.
(3) Shutdown pin voltage must not exceed (VCC+0.3V) or 5V, whichever is lower.
ISSUE 1 - JANUARY 2005
SEMICONDUCTORS
2
ZXSC440
DEVICE DESCRIPTION
Bandgap reference
All threshold voltages and internal currents are derived
from a temperature compensated bandgap reference
circuit with a reference voltage of 1.22V nominal. If the
REF terminal is used as a reference for external
devices, the maximum load should not exceed ±2 A.
Dynamic drive output
Depending on the input signal, the output is either
"LOW" or "HIGH". In the high state a 3.4mA current
source (max drive voltage = V
CC
-0.4V) drives the base
or gate of the external transistor. In order to operate the
external switching transistor at optimum efficiency,
both output states are initiated with a short transient
current in order to quickly discharge the base or the
gate of the switching transistor.
Switching circuit
The switching circuit consists of two comparators,
Comp1 and Comp2, a gate U1, a monostable and the
drive output. Normally the DRIVE output is "HIGH"; the
external switching transistor is turned on. Current
ramps up in the inductor, the switching transistor and
external current sensing resistor. This voltage is
sensed by comparator, Comp2, at input SENSE. Once
the current sense voltage across the sensing resistor
exceeds 28mV, comparator, Comp2, through gate U1,
triggers a re-triggerable monostable and turns off the
output drive stage for 1.7 s. The inductor discharges
into the reservoir capacitor. After 1.7 s a new charge
cycle begins, thus ramping the output voltage. When
the output voltage reaches the nominal value and V
FB
gets an input voltage of more than 300mV, the
monostable is forced "on" from Comp1 through gate
U1, until the feedback voltage falls below 300mV. The
above action continues to maintain regulation, with
slight hysteresis on the feedback threshold.
READY detector
The READY circuit is a re-triggerable 195 s
monostable, which is re-triggered by every down
regulating action of comparator Comp1. As long as
regulation takes place, output READY is "HIGH" (high
impedance, 100K to V
CC
). Short dips of the output
voltage of less than 195 s are ignored. If the output
voltage falls below the nominal value for more than
195 s, output READY goes "LOW". This can be used to
signal to the camera controller that the flash unit has
charged fully and is ready to use.
ISSUE 1 - JANUARY 2005
SEMICONDUCTORS
4
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