电子工程世界电子工程世界电子工程世界

关键词

搜索

型号

搜索

5962-89841023A

产品描述EE PLD, 20ns, PAL-Type, CMOS, CQCC28, CERAMIC, LCC-28
产品类别可编程逻辑器件    可编程逻辑   
文件大小94KB,共7页
制造商Lattice(莱迪斯)
官网地址http://www.latticesemi.com
下载文档 详细参数 全文预览

5962-89841023A在线购买

供应商 器件名称 价格 最低购买 库存  
5962-89841023A - - 点击查看 点击购买

5962-89841023A概述

EE PLD, 20ns, PAL-Type, CMOS, CQCC28, CERAMIC, LCC-28

5962-89841023A规格参数

参数名称属性值
是否Rohs认证不符合
零件包装代码QLCC
包装说明CERAMIC, LCC-28
针数28
Reach Compliance Codeunknown
ECCN代码EAR99
其他特性1 EXTERNAL CLOCK; REGISTER PRELOAD
架构PAL-TYPE
最大时钟频率31.2 MHz
JESD-30 代码S-CQCC-N28
JESD-609代码e0
长度11.43 mm
湿度敏感等级1
专用输入次数11
I/O 线路数量10
输入次数22
输出次数10
产品条款数132
端子数量28
最高工作温度125 °C
最低工作温度-55 °C
组织11 DEDICATED INPUTS, 10 I/O
输出函数MACROCELL
封装主体材料CERAMIC, METAL-SEALED COFIRED
封装代码QCCN
封装等效代码LCC28,.45SQ
封装形状SQUARE
封装形式CHIP CARRIER
电源5 V
可编程逻辑类型EE PLD
传播延迟20 ns
认证状态Not Qualified
筛选级别MIL-STD-883
座面最大高度2.54 mm
最大供电电压5.5 V
最小供电电压4.5 V
标称供电电压5 V
表面贴装YES
技术CMOS
温度等级MILITARY
端子面层Tin/Lead (Sn85Pb15)
端子形式NO LEAD
端子节距1.27 mm
端子位置QUAD
宽度11.43 mm
Base Number Matches1

文档预览

下载PDF文档
GAL22V10/883
High Performance E
2
CMOS PLD
Generic Array Logic™
Features
• HIGH PERFORMANCE E
2
CMOS
®
TECHNOLOGY
— 10 ns Maximum Propagation Delay
— Fmax = 166 MHz
— 7ns Maximum from Clock Input to Data Output
— TTL Compatible 12 mA Outputs
— UltraMOS
®
Advanced CMOS Technology
• ACTIVE PULL-UPS ON ALL PINS
• COMPATIBLE WITH STANDARD 22V10 DEVICES
— Fully Function/Fuse-Map/Parametric Compatible
with Bipolar and UVCMOS 22V10 Devices
• 50% REDUCTION IN POWER VERSUS BIPOLAR
• E CELL TECHNOLOGY
— Reconfigurable Logic
— Reprogrammable Cells
— 100% Tested/100% Yields
— High Speed Electrical Erasure (<100ms)
— 20 Year Data Retention
• TEN OUTPUT LOGIC MACROCELLS
— Maximum Flexibility for Complex Logic Designs
• PRELOAD AND POWER-ON RESET OF REGISTERS
— 100% Functional Testability
• APPLICATIONS INCLUDE:
— DMA Control
— State Machine Control
— High Speed Graphics Processing
— Standard Logic Speed Upgrade
• ELECTRONIC SIGNATURE FOR IDENTIFICATION
I
PRESET
Functional Block Diagram
I/CLK
RESET
8
OLMC
I/O/Q
I
10
OLMC
I
12
I/O/Q
I
OLMC
I/O/Q
PROGRAMMABLE
AND-ARRAY
(132X44)
14
OLMC
I
I/O/Q
2
16
OLMC
I
I/O/Q
I
16
OLMC
I/O/Q
I
14
OLMC
I/O/Q
I
12
OLMC
I/O/Q
I
10
OLMC
I/O/Q
I
8
OLMC
I/O/Q
Description
The GAL22V10/883 is a high performance E CMOS programmable
logic device processed in full compliance to MIL-STD-883. This
military grade device combines a high performance CMOS process
with Electrically Erasable (E
2
) floating gate technology to provide
the highest speed performance available of any military qualified
22V10 device. CMOS circuitry allows the GAL22V10 to consume
much less power when compared to bipolar 22V10 devices. E
2
technology offers high speed (<100ms) erase times, providing the
ability to reprogram or reconfigure the device quickly and efficiently.
The generic architecture provides maximum design flexibility by
allowing the Output Logic Macrocell (OLMC) to be configured by
the user. The GAL22V10 is fully function/fuse map/parametric com-
patible with standard bipolar and CMOS 22V10 devices.
Unique test circuitry and reprogrammable cells allow complete AC,
DC, and functional testing during manufacture. As a result, Lat-
tice Semiconductor delivers 100% field programmability and func-
tionality of all GAL products. In addition, 100 erase/write cycles and
data retention in excess of 20 years are specified.
2
Pin Configuration
CERDIP
LCC
I/CLK
I/O/Q
I/O/Q
Vcc
NC
I/CLK
I
I
25
I/O/Q
I/O/Q
1
24
Vcc
I/O/Q
I/O/Q
I
4
I
I
I
NC
I
I
I
11
12
9
7
5
I
2
28
26
I
I
I
I
I
I
I
I
GND
12
6
23
I/O/Q
NC
GAL
22V10
18
I/O/Q
I/O/Q
I/O/Q
I/O/Q
I/O/Q
I/O/Q
I/O/Q
I/O/Q
13
I
GAL22V10
Top View
14
16
21
I/O/Q
I/O/Q
19
18
I/O/Q
I/O/Q
Copyright © 1999 Lattice Semiconductor Corp. All brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject
to change without notice.
I/O/Q
GND
I
I
NC
I
LATTICE SEMICONDUCTOR CORP., 5555 Northeast Moore Ct., Hillsboro, Oregon 97124, U.S.A.
Tel. (503) 268-8000; 1-800-LATTICE; FAX (503) 268-8556; http://www.latticesemi.com
February 1999
22v10mil_04
1
求助
本帖最后由 paulhyde 于 2014-9-15 09:27 编辑 ...
wh22d 电子竞赛
WiFi协议智能灯光如何接入米家
小白一枚,马上新装修,家里的智能核心以小米生态链产品为主,包括窗帘、开关、门锁等等,看过有线智能灯光控制,成本太高,小米的智能灯光呢主要是yeelight灯,光学太差,但是其他的智能控制系 ......
想智能 DIY/开源硬件专区
ad6.9封装库元件命名(转)
ad6.9封装库元件命名 一、多引脚集成电路芯片封装SOIC、SOP、TSOP在AD7.1元器件封装库中的命名含义。例如:SOIC库分为L、M、N三种。L、M、N --代表芯片去除引脚后的片身宽度,即芯片两相对引 ......
sblpp PCB设计
Python Tinker学习笔记(一)
本帖最后由 常见泽1 于 2019-2-20 13:23 编辑 此内容由EEWORLD论坛网友常见泽1原创,如需转载或用于商业用途需征得作者同意并注明出处 一直在简单看看python,这次项目需要做个界面, ......
常见泽1 MicroPython开源版块
FPGA中例化ROM找不到端口的问题
在顶层文件中例化rom,代码如下: Trom1 rom1H ( .A(addrHH1), .SPO(loadH1), .D(), .DPRA(), .SPRA(), .CLK(), .WE(), .I_CE(), .QS ......
sophia_123 FPGA/CPLD

 
EEWorld订阅号

 
EEWorld服务号

 
汽车开发圈

 
机器人开发圈

About Us 关于我们 客户服务 联系方式 器件索引 网站地图 最新更新 手机版

站点相关: 大学堂 TI培训 Datasheet 电子工程 索引文件: 271  1919  1859  1569  1022  2  20  53  23  46 

器件索引   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z

北京市海淀区中关村大街18号B座15层1530室 电话:(010)82350740 邮编:100190

电子工程世界版权所有 京B2-20211791 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号 Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved