SN74LS283
4-Bit Binary Full Adder
with Fast Carry
The SN74LS283 is a high-speed 4-Bit Binary Full Adder with
internal carry lookahead. It accepts two 4-bit binary words (A
1
– A
4,
B
1
– B
4
) and a Carry Input (C
0
). It generates the binary Sum outputs
(∑
1
–
∑
4
) and the Carry Output (C
4
) from the most significant bit. The
LS283 operates with either active HIGH or active LOW operands
(positive or negative logic).
GUARANTEED OPERATING RANGES
Symbol
V
CC
T
A
I
OH
I
OL
Parameter
Supply Voltage
Operating Ambient
Temperature Range
Output Current – High
Output Current – Low
Min
4.75
0
Typ
5.0
25
Max
5.25
70
– 0.4
8.0
Unit
V
°C
mA
mA
16
1
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LOW
POWER
SCHOTTKY
PLASTIC
N SUFFIX
CASE 648
16
1
SOIC
D SUFFIX
CASE 751B
ORDERING INFORMATION
Device
SN74LS283N
SN74LS283D
Package
16 Pin DIP
16 Pin
Shipping
2000 Units/Box
2500/Tape & Reel
©
Semiconductor Components Industries, LLC, 1999
1
December, 1999 – Rev. 6
Publication Order Number:
SN74LS283/D
SN74LS283
CONNECTION DIAGRAM DIP
(TOP VIEW)
V
CC
16
B
3
15
A
3
14
Σ
3
13
A
4
12
B
4
11
Σ
4
10
C
4
9
NOTE:
The Flatpak version has the same
pinouts (Connection Diagram) as
the Dual In-Line Package.
1
Σ
2
2
B
2
3
A
2
4
Σ
1
5
A
1
6
B
1
7
C
0
8
GND
LOADING
(Note a)
PIN NAMES
A
1
– A
4
B
1
– B
4
C
0
S
1
–
S
4
C
4
Operand A Inputs
Operand B Inputs
Carry Input
Sum Outputs
Carry Output
HIGH
1.0 U.L.
1.0 U.L.
0.5 U.L.
10 U.L.
10 U.L.
LOW
0.5 U.L.
0.5 U.L.
0.25 U.L.
5 U.L.
5 U.L.
NOTES:
a) 1 TTL Unit Load (U.L.) = 40
m
A HIGH/1.6 mA LOW.
LOGIC SYMBOL
5
3 14 12 6 2 15 11
A
1
A
2
A
3
A
4
B
1
B
2
B
3
B
4
7
C
0
∑
1
∑
2
∑
3
∑
4
4
1 13 10
C
4
9
V
CC
= PIN 16
GND = PIN 8
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2
SN74LS283
LOGIC DIAGRAM
C
0
7
A
1
5
B
1
6
A
2
3
B
2
2
A
3
14
B
3
15
A
4
12
B
4
11
C
1
C
2
C
3
4
∑
1
V
CC
= PIN 16
GND = PIN 8
= PIN NUMBERS
∑
2
1
∑
3
13
∑
4
10
9
C
4
FUNCTIONAL DESCRIPTION
The LS283 adds two 4-bit binary words (A plus B) plus
the incoming carry. The binary sum appears on the sum
outputs (∑
1
–
∑
4
) and outgoing carry (C4) outputs.
C
0
+ (A
1
+ B
1
) + 2(A
2
+ B
2
) + 4(A
3
+ B
3
) + 8(A
4
+ B
4
) =
∑
1
+ 2
∑
2
+ 4
∑
3
+ 8
∑
4
+ 16C
4
Where: (+) = plus
Example:
C
0
logic levels
Active HIGH
Active LOW
L
0
1
A
1
L
0
1
A
2
H
1
0
A
3
L
0
1
A
4
H
1
0
B
1
H
1
0
Due to the symmetry of the binary add function the LS283
can be used with either all inputs and outputs active HIGH
(positive logic) or with all inputs and outputs active LOW
(negative logic). Note that with active HIGH inputs, Carry
Input can not be left open, but must be held LOW when no
carry in is intended.
B
2
L
0
1
B
3
L
0
1
B
4
H
1
0
∑
1
H
1
0
∑
2
H
1
0
∑
3
L
0
1
∑
4
L
0
1
C
4
H
1
0
(10+9=19)
(carry+5+6=12)
Interchanging inputs of equal weight does not affect the operation, thus C
0
, A
1
, B
1
, can be arbitrarily assigned to pins 7, 5 or 3.
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3
SN74LS283
FUNCTIONAL TRUTH TABLE
C (n – 1)
L
L
L
L
H
H
H
H
A
n
L
L
H
H
L
L
H
H
B
n
L
H
L
H
L
H
L
H
∑
n
L
H
H
L
H
L
L
H
C
n
L
L
L
H
L
H
H
H
C
1
– C
3
are generated internally
C
0
is an external input
C
4
is an output generated internally
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE
(unless otherwise specified)
Limits
Symbol
V
IH
V
IL
V
IK
V
OH
Parameter
Input HIGH Voltage
Input LOW Voltage
Input Clamp Diode Voltage
Output HIGH Voltage
2.7
– 0.65
3.5
0.25
V
O
OL
Output LOW Voltage
0.35
C
0
Any A or B
I
IH
Input HIGH Current
C
0
Any A or B
I
IL
I
OS
I
CC
Input LOW Current
C
0
Any A or B
Short Circuit Current (Note 1)
Power Supply Current
Total, Output HIGH
Total, Output LOW
– 20
0.1
0.2
– 0.4
– 0.8
– 100
34
39
0.5
20
40
V
µA
µA
mA
mA
mA
mA
mA
V
CC
= MAX, V
IN
= 0 4 V
MAX
0.4
V
CC
= MAX
V
CC
= MAX
V
CC
= MAX, V
IN
= 7 0 V
MAX
7.0
I
OL
= 8.0 mA
0.4
Min
2.0
0.8
– 1.5
Typ
Max
Unit
V
V
V
V
V
Test Conditions
Guaranteed Input HIGH Voltage for
All Inputs
Guaranteed Input LOW Voltage for
All Inputs
V
CC
= MIN, I
IN
= – 18 mA
V
CC
= MIN, I
OH
= MAX, V
IN
= V
IH
or V
IL
per Truth Table
I
OL
= 4.0 mA
V
CC
= V
CC
MIN,
V
IN
= V
IL
or V
IH
per Truth Table
V
CC
= MAX, V
IN
= 2 7 V
MAX
2.7
mA
Note 1: Not more than one output should be shorted at a time, nor for more than 1 second.
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4
SN74LS283
AC CHARACTERISTICS
(T
A
= 25°C, V
CC
= 5.0 V)
Limits
Symbol
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
Parameter
Propagation Delay, C
0
Input
to Any
Σ
Output
Propagation Delay, Any A or B Input
to
Σ
Outputs
Propagation Delay, C
0
Input
to C
4
Output
Propagation Delay, Any A or B Input
to C
4
Output
Min
Typ
16
15
15
15
11
11
11
12
Max
24
24
24
24
17
22
17
17
Unit
ns
ns
C
L
= 15 pF
Figures 1 & 2
ns
ns
Test Conditions
AC WAVEFORMS
1.3 V
t
PLH
1.3 V
V
OUT
t
PHL
V
IN
V
OUT
1.3 V
t
PHL
1.3 V
t
PLH
V
IN
Figure 1.
Figure 2.
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