28C256T
256K EEPROM (32K x 8-Bit)
EEPROM
V
CC
GND
DATA INPUTS/OUTPUTS
I/O0 - I/O7
OE
WE
CE
OE, CE, and WE
LOGIC
DATA LATCH
INPUT/OUTPUT
BUFFERS
Y-GATING
CELL MATRIX
Y DECODER
ADDRESS
INPUTS
X DECODER
IDENTIFICATION
Logic Diagram
Memory
F
EATURES
:
• R
AD
-P
AK
® radiation-hardened against natural space radia-
tion
• Total dose hardness:
- > 100 Krad (Si), dependent upon space mission
• Excellent Single Event Effects:
- SEL
TH
LET: > 120 MeV/mg/cm
2
- SEU
TH
LET (read mode): > 90 MeV/mg/cm
2
- SEU
TH
LET (write mode): > 18 MeV/mg/cm
2
• Package:
- 28 pin R
AD
-P
AK
® flat pack
- 28 pin R
AD
-P
AK
® DIP
- JEDEC approved byte wide pinout
• High Speed:
- 120, 150 ns maximum access times available
• High endurance:
- 10,000 erase/write (in Page Mode), 10-year data
retention
• Page Write Mode:
- 1 to 64 bytes
• Low power dissipation:
- 15 mA active current (cycle = 1 µ s)
- 20 µ A standby current (CE = V
CC
)
D
ESCRIPTION
:
Maxwell Technologies’ 28C256T high density 256k-bit
EEPROM microcircuit features a greater than 100 krad (Si)
total dose tolerance, depending upon space mission. The
28C256T is capable of in-system electrical byte and page pro-
grammability. It has a 64-Byte page programming function to
make its erase and write operations faster. It also features
data polling to indicate the completion of erase and program-
ming operations.
Maxwell Technologies' patented R
AD
-P
AK
® packaging technol-
ogy incorporates radiation shielding in the microcircuit pack-
age. It eliminates the need for box shielding while providing
the required radiation shielding for a lifetime in orbit or space
mission. In a GEO orbit, R
AD
-P
AK
provides greater than 100
krad (Si) radiation dose tolerance. This product is available
with screening up to Class S.
02.18.02 Rev 5
All data sheets are subject to change without notice
1
(858) 503-3300 - Fax: (858) 503-3301- www.maxwell.com
©2001 Maxwell Technologies
All rights reserved.
256K EEPROM (32K x 8-Bit) EEPROM
T
ABLE
1. 28C256T P
INOUT
D
ESCRIPTION
P
IN
*10-3, 25, 24,
21, 23, 2, 26, 1
11-13, 15-19
22
20
27
28
14
S
YMBOL
A0-A14
I/O0-I/O7
OE
CE
WE
V
CC
V
SS
D
ESCRIPTION
Address
Input/Output
Output Enable
Chip Enable
Write Enable
Power Supply
Ground
28C256T
*Refer to diagram on Page 1 for pin relationship.
T
ABLE
2. 28C256T A
BSOLUTE
M
AXIMUM
R
ATINGS
Memory
P
ARAMETER
Supply Voltage (Relative to V
SS
)
Input Voltage (Relative to V
SS
)
Operating Temperature Range
2
Storage Temperature Range
1. V
IN
= -3.0 V for pulse width > 50 ns.
2. Including electrical characteristics and data retention.
S
YMBOL
V
CC
V
IN
T
OPR
T
STG
M
IN
-0.6
-0.5
1
-55
-65
M
AX
7.0
7.0
125
150
U
NITS
V
V
°
C
°
C
T
ABLE
3. 28C256T D
ELTA
L
IMITS
P
ARAMETER
I
CC
1
I
CC
2
I
CC
3A
I
CC
3B
V
ARIATION
±10%
±10%
±10%
±10%
02.18.02 Rev5
All data sheets are subject to change without notice
2
©2001 Maxwell Technologies
All rights reserved.
256K EEPROM (32K x 8-Bit) EEPROM
T
ABLE
4. 28C256T R
ECOMMENDED
O
PERATING
C
ONDITIONS
P
ARAMETER
Supply Voltage
Input Voltage
S
UBGROUPS
1
1
1
1
Thermal Impedance — Flat Package
Thermal Impedance — DIP Package
Operating Temperature Range
1. V
IL
min= -1.0V for pulse width < 50 ns.
1
1
1
S
YMBOL
V
CC
V
IL
V
IH
V
H
M
IN
4.5
-0.3
1
2.2
V
CC
-0.5
--
--
-55
28C256T
M
AX
5.5
0.8
V
CC
+0.3
V
CC
+1
0.87
0.86
125
U
NITS
V
V
V
V
°C/W
°C/W
°
C
Θ
JC
Θ
JC
T
OPR
T
ABLE
5. 28C256T C
APACITANCE
1
(T
A
= 25
°
C, f = 1 MHz)
P
ARAMETER
Input Capacitance: V
IN
= 0V
1
Output Capacitance: V
OUT
= 0V
1
1. Guaranteed by design.
S
YMBOL
C
IN
C
OUT
M
IN
--
--
M
AX
6
12
U
NITS
pF
pF
Memory
T
ABLE
6. 28C256T DC E
LECTRICAL
C
HARACTERISTICS
(V
CC
= 5 V ± 10%, T
A
= -55
TO
+125
°
C
UNLESS OTHERWISE SPECIFIED
)
P
ARAMETER
Input Leakage Current
Output Leakage Current
Standby V
CC
Current
Operating V
CC
Current
C
ONDITIONS
V
CC
= 5.5 V, V
IN
= 5.5 V
V
CC
= 5.5 V, V
OUT
= 5.5 V/0.4 V
CE = V
CC
CE = V
IH
I
OUT
= 0 mA Duty = 100%
V
CC
= 5.5 V Cycle = 1 us
I
OUT
= 0mA Duty = 100%
V
CC
= 5.5 V Cycle = 150 ns
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
I
LO
= 2.1 mA
I
OH
= -400 uA
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
V
IL
V
IH
V
H
V
OL
V
OH
S
UBGROUPS
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
S
YMBOL
I
LI
I
LO
I
CC1
I
CC2
I
CC3
M
IN
--
--
--
--
--
--
--
2.2
V
CC
-0.5
--
2.4
M
AX
2
2
20
1
15
50
0.8
--
--
0.4
--
V
V
V
V
V
U
NITS
uA
uA
uA
mA
mA
02.18.02 Rev5
All data sheets are subject to change without notice
3
©2001 Maxwell Technologies
All rights reserved.
256K EEPROM (32K x 8-Bit) EEPROM
28C256T
T
ABLE
7. 28C256T AC E
LECTRICAL
C
HARACTERISTICS FOR
R
EAD
O
PERATION1
(V
CC
= 5V ±10%, T
A
= -55
TO
125 °C
UNLESS OTHERWISE SPECIFIED
)
P
ARAMETER
Address Access Time CE = OE = V
IL
, WE = V
IH
-120
-150
CE to Output Delay OE = V
IL
, WE = V
IH
-120
-150
OE to Output Delay CE = V
IL
, WE = V
IH
-120
-150
Output Hold from Address CE = OE = V
IL
, WE = V
IH
-120
-150
OE (CE) High to Output Float CE = V
IL
, WE = V
IH 2
-120
-150
S
UBGROUPS
9, 10, 11
S
YMBOL
t
ACC
--
--
9, 10, 11
t
CE
--
--
9, 10, 11
t
OE
0
0
9, 10, 11
t
OH
0
0
9, 10, 11
t
DF
0
0
50
50
--
--
ns
75
75
ns
120
150
ns
120
150
ns
M
IN
M
AX
U
NITS
ns
Memory
1.
Test conditions: Input pulse levels - 0V to 3V; input rise and fall times < 20 ns; output load - 1 TTL gate + 100 pF (including scope and jig); ref-
erence levels for measuring timing - 0.8V/1.8V.
2. t
DF
and t
DFR
are defined as the time at which the output becomes an open circuit and data is no longer driven.
T
ABLE
8. 28C256T AC E
LECTRICAL
C
HARACTERISTICS FOR
P
AGE
/B
YTE
E
RASE AND
W
RITE
O
PERATIONS
(V
CC
= 5V ±10%, T
A
= -55
TO
125 °C
UNLESS OTHERWISE SPECIFIED
)
P
ARAMETER
Address Setup Time
-120
-150
CE to Write Setup Time
-120
-150
WE to Write Setup Time
-120
-150
WE Hold Time
-120
-150
S
UBGROUPS
S
YMBOL
t
AS
M
IN1
0
0
t
CS 2
T
YP
--
--
M
AX
--
--
ns
0
0
t
WS 3
--
--
--
--
ns
0
0
t
WH 3
0
0
--
--
--
--
--
--
ns
U
NITS
ns
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
02.18.02 Rev5
All data sheets are subject to change without notice
4
©2001 Maxwell Technologies
All rights reserved.
256K EEPROM (32K x 8-Bit) EEPROM
(V
CC
= 5V ±10%, T
A
= -55
TO
125 °C
UNLESS OTHERWISE SPECIFIED
)
P
ARAMETER
WE Pulse Width
-120
-150
CE Pulse Width
-120
-150
Address Hold Time
-120
-150
Data Setup Time
-120
-150
Data Hold Time
-120
-150
Chip Enable Hold Time
2
-120
-150
Output Enable to Write Setup Time
-120
-150
Output Enable Hold Time
-120
-150
Data Latch Time
4
-120
-150
Write Cycle Time
-120
-150
Byte Load Window
4
-120
-150
Byte Load Cycle
4
-120
-150
Write Start Time
-120
-150
1.
2.
3.
4.
Use this device in a longer cycle than this value.
WE controlled operation.
CE controlled operation.
Not tested.
02.18.02 Rev5
28C256T
S
YMBOL
t
WP 2
200
250
t
CW 3
200
250
--
--
--
--
--
--
--
--
--
--
--
--
--
--
230
280
--
--
100
100
--
--
--
--
--
--
ns
150
150
--
--
ns
75
100
--
--
ns
10
10
--
--
ns
0
0
--
--
ns
0
0
--
--
ns
0
0
--
--
ns
--
--
--
--
ms
--
--
10
10
us
--
--
--
--
us
0.55
0.55
30
30
ns
150
150
--
--
--
--
--
--
M
IN1
T
YP
M
AX
U
NITS
ns
T
ABLE
8. 28C256T AC E
LECTRICAL
C
HARACTERISTICS FOR
P
AGE
/B
YTE
E
RASE AND
W
RITE
O
PERATIONS
S
UBGROUPS
9, 10, 11
9, 10, 11
t
AH
9, 10, 11
t
DS
9, 10, 11
t
DH
Memory
9, 10, 11
t
CH
9, 10, 11
t
OES
9, 10, 11
t
OEH
9, 10, 11
t
DL
9, 10, 11
t
WC
9, 10, 11
t
BL
9, 10, 11
t
BLC
9, 10, 11
t
DW
All data sheets are subject to change without notice
5
©2001 Maxwell Technologies
All rights reserved.
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