NCV81275
8/7/6/5/4/3/2/1 Phase Buck
Controller with PWM_VID
and I
2
C Interface
The NCV81275 is a multiphase synchronous controller optimized
for new generation computing and graphics processors. The device is
capable of driving up to 8 phases and incorporates differential voltage
and phase current sensing, adaptive voltage positioning and
PWM_VID interface to provide and accurately regulated power for
computer or graphic controllers. The integrated power saving
interface (PSI) allows for the processors to set the controller in one of
three modes, i.e. all phases on, dynamic phases shedding or fixed low
phase count mode, to obtain high efficiency in light-load conditions.
The dual edge PWM multiphase architecture ensures fast transient
response and good dynamic current balance.
Features
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1
40
QFNW40
CASE 484AK
MARKING DIAGRAM
1
ON
NCV
81275
AWLYYWWG
G
NCV81275 = Specific Device Code
A
= Assembly Location
WL
= Wafer Lot
YY
= Year
WW
= Work Week
G
= Pb-Free Package
(Note: Microdot may be in either location)
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Compliant with
OVR4+ Specifications
Supports Up to 8 Phases
4.5 V to 20 V Supply Voltage Range
250 kHz to 1.2 MHz Switching Frequency (8 Phase)
Power Good Output
Under Voltage Protection (UVP)
Over Voltage Protection (OVP)
Over Current Protection (OCP)
Per Phase Over Current Protection
Startup into Pre-Charged Loads while Avoiding False OVP
Configurable Adaptive Voltage Positioning (AVP)
High Performance Operational Error Amplifier
True Differential Current Balancing Sense Amplifiers for Each
Phase
Phase-to-Phase Dynamic Current Balancing
Current Mode Dual Edge Modulation for Fast Initial Response to
Transient Loading
Power Saving Interface (PSI)
Automatic Phase Shedding with User Settable Thresholds
PWM_VID and I
2
C Control Interface
Compact 40 Pin QFN Wettable Flank Package
Operating Temperature Range:
−40°C
to +105°C
AEC−Q100 Grade 2 Approved
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
NVIDIA
®
PIN CONNECTIONS
VID_BUFF
PWM_VID
PGOOD
SDA
VCC
33
VSN
32
36
40
38
39
37
35
34
31
VSP
SCL
PSI
EN
REFIN
VREF
VRMP
PWM8/SS
PWM7/OCP
PWM6/LPC1
PWM5/LPC2
PWM4/PHTH1
PWM3/PHTH2
PWM2/PHTH3
1
2
3
4
5
6
7
8
9
10
12
11
13
14
15
16
17
18
19
20
30
29
COMP
FB
DIFF
FSW
LLTH/I2C_ADD
IOUT
ILIM
CSCOMP
CSSUM
CSREF
NCV81275
(TOP VIEW)
Tab: GROUND
28
27
26
25
24
23
22
21
CSP4
CSP7
CSP6
PWM1/
PHTH4
DRON
ORDERING INFORMATION
Device
NCV81275MNTXG
Package
QFNW40
(Pb-Free)
Shipping
†
5000/Tape & Reel
Typical Applications
•
GPU and CPU Power
•
Automotive Applications
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure,
BRD8011/D.
CSP8
©
Semiconductor Components Industries, LLC, 2018
May, 2019
−
Rev. 0
1
Publication Order Number:
NCV81275/D
CSP5
CSP3
CSP2
CSP1
TP45 TP46 TP47 TP48 TP49
TP50
TP51
VCC_DUT
VSN_sense
J4
C5
J3
C17
1000pF
SDA
SCL
EN
PSI
PGOOD
1uF
R38
2.2R
PWM_VID in
J1
C2
R37
TP44
10.2k
TP52
TP53
TP54
4.7nF
R28
R25
4.12k
20.5k
TP1
VSP_sense
TP36
TP37
40
39
38
37
36
35
34
33
32
31
TP42
R16
1.8k
EN
SCL
SDA
VCC
VSN
VSP
PGOOD
TP41
C1
0.01uF
1
REFIN
VREF
VRAMP
DIFF
FSW
27
26
25
24
23
22
21
PWM8/SS
PWM7/OCP
PWM6/LPC1
PWM5/LPC2
ILIM
CSCOMP
CSSUM
CSREF
DRON
CSP8
CSP7
CSP6
CSP5
CSP4
CSP3
CSP2
CSP1
41
PWM4/PHTH1
PWM3/PHTH2
PWM2/PHTH3
28
FB
29
27pF
VID_BUFF
PWM_VID
TP39
1k
4.7nF
C4
10nF
VIN
15nF
PSI
TP38
TP43
1.5k
C16
C3
R9
2.2nF
R21
14.7k
U1
C15
R43
C18
REFIN
R49
2.74k
R48
1k
TP55
TP56
TP57
TP58
TP59
COMP
30
TP40
VREF
3
4
5
6
IOUT
7
8
9
10
2
PWM8
PWM7
PWM6
NCV81275
LLTH/I2C ADD
R124
0R
PWM2
R55
R5610k
R54
R50
R39
10R
RT1 100k
C13
390nF
24.9k
51k
PWM1/PHTH4
PAD
11
12
13
14
15
16
17
18
19
NCV81275
10R
R51
R2
26.1k
R4
26.1k
R7
R13
R10
TP62
20
R14
R18
R22
R40
10R
R41
R42
R44
R5 DNP
R6 DNP
R8 DNP
R11 DNP
R12 DNP
C8 0.1uF
C9 0.1uF
C10 0.1uF
C11 0.1uF
C12 0.1uF
C14 0.1uF
R152.94k
R19 2.94k
R17 2.94k
R24 2.94k
10R
R3 DNP
C6 0.1uF
1
C7 0.1uF
10R
VCC_DUT
R1 DNP
R45
10R
TP60
R46
10R
2
R202.94k
R23 2.94k
R26 2.94k
R27 2.94k
R1420R
R144 0R
R143 0R
R148 0R
R36 34k
CSN6
CSN3
CSN2
SWN7
SWN6
SWN5
SWN8
SWN4
SWN3
SWN2
SWN1
CSN8
CSN7
CSN5
CSN4
CSN1
R32 34k
R145 0R
R146 0R
R147 R
0
R149 0R
Figure 1. Typical Controller Application Circuit
R47
10R
TP61
R30 34k
R29 34k
R31 34k
R33 34k
R34 34k
R35 34k
1n
C20 3.3n
DRON
49.9k
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C19
R57 20k
1
PWM1
R1270R
R1260R
PWM3
R1250R
PWM4
C21 470pF
PWM5
2
NCV81275
VIN
C32
0.1uF
C39
1uF
C47
4.7uF
C52
4.7uF
C57
4.7uF
C65
4.7uF
C75
4.7uF
C85
4.7uF
+
C95
4.7uF
C39
10uF
C47
10uF
C52
10uF
C57
10uF
C65
10uF
C75
10uF
C85
10uF
10
11
8
9
TP65
VIN
VIN
VIN
VCC
C22
1uF
R60 1k
3
VIN
VCCC
29 PVCC
SW 16
SW 17
SW
SW
SW
SW
18
19
20
21
L1
0.22uH
VOUT
+
C62
+
C72
220uF
220uF
C102
10uF
C107
10uF
C112
10uF
C117
10uF
2
ZCD#
1
R82
2
CSNx
PWMx
1
30
FDMF5833_F085
SW 22
PWM
THWN#
SW 23
SW 24
SW
25
26
R69
1R
SHORTPIN
R83
1
2
SHORTPIN
SWNx
27
33
DRON
31
GL
GL
EN/FAULT#
AGND
4 AGND
12
PGND
13
PGND
14
PGND
15
PGND
28
PGND
SW
7
PHASE
5
BOOT
C27
0.1uF
32
Figure 2. Typical Phase Application Circuit
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NCV81275
Table 1. PIN FUNCTION DESCRIPTION
Pin
Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
Pin
Name
REFIN
VREF
VRMP
PWM8/SS
PWM7/OCP
PWM6/LPC1
PWM5/LPC2
PWM4/PHTH1
PWM3/PHTH2
PWM2/PHTH3
PWM1/PHTH4
DRON
CSP8
CSP7
CSP6
CSP5
CSP4
CSP3
CSP2
CSP1
CSREF
CSSUM
CSCOMP
ILIM
IOUT
LLTH/I2C_ADD
FSW
DIFF
Pin
Type
I
O
I
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
I
I
I
I
I
I
I
I
I
O
O
O
I
I
O
Description
Reference voltage input for output voltage regulation.
2.0 V output reference voltage. A 10 nF ceramic capacitor is required to connect this pin
to ground.
Feed-forward input of VIN for the ramp slope compensation. The current fed into this pin
is used to control of the ramp of PWM slope.
PWM 8 output/Soft Start setting. During startup it is used to program the soft start time
with a resistor to ground.
PWM 7 output/Per OCP setting. During startup it is used to program the OCP level per
phase and latch off time with a resistor to ground.
PWM 6 output/Low phase count 1. During startup it is used to program the power zone
(PSI set low) with a resistor to ground.
PWM 5 output/Low phase count 2. During startup it is used to program boot-up power
zone (PSI set low) with a resistor to ground.
PWM 4 output/Phase Shedding Threshold 1. During startup it is used to program the
phase shedding threshold 1 (PSI set to mid state) with a resistor to ground.
PWM 3 output/Phase Shedding Threshold 2. During startup it is used to program the
phase shedding threshold 2 (PSI set to mid state) with a resistor to ground.
PWM 2 output/Phase Shedding Threshold 3. During startup it is used to program the
phase shedding threshold 3 (PSI set to mid state) with a resistor to ground.
PWM 1 output/Phase Shedding Threshold 4. During startup it is used to program the
phase shedding threshold 4 (PSI set to mid state) with a resistor to ground.
Bidirectional gate driver enable for external drivers.
Non-inverting input to current balance sense amplifier for phase 8. Pull-up to VCC via a
2K to disable the PWM8 output.
Non-inverting input to current balance sense amplifier for phase 7. Pull-up to VCC via a
2K to disable the PWM7 output.
Non-inverting input to current balance sense amplifier for phase 6. Pull-up to VCC via a
2K to disable the PWM6 output.
Non-inverting input to current balance sense amplifier for phase 5. Pull-up to VCC via a
2K to disable the PWM5 output.
Non-inverting input to current balance sense amplifier for phase 4. Pull-up to VCC via a
2K to disable the PWM4 output.
Non-inverting input to current balance sense amplifier for phase 3. Pull-up to VCC via a
2K to disable the PWM3 output.
Non-inverting input to current balance sense amplifier for phase 2. Pull-up to VCC via a
2K to disable the PWM2 output.
Non-inverting input to current balance sense amplifier for phase 1. Pull-up to VCC via a
2K to disable the PWM1 output.
Total output current sense amplifier reference voltage input.
Inverting input of total current sense amplifier.
Output of total current sense amplifier.
Over current shutdown threshold setting output. The threshold is set by a resistor
between ILIM and to CSCOMP pins.
Total output current. A resistor to GND is required to provide a voltage drop of 2 V at the
maximum output current.
Load line selection from 0% to 100% and I
2
C address pin.
Resistor to ground form this pin sets the operating frequency of the regulator.
Output of the regulators differential remote sense amplifier.
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NCV81275
Table 1. PIN FUNCTION DESCRIPTION
(continued)
Pin
Number
29
30
31
32
33
34
35
36
37
38
39
40
41
Pin
Name
FB
COMP
VSP
VSN
VCC
SDA
SCL
EN
PSI
PGOOD
PWM_VID
VID_BUFF
AGND
Pin
Type
I
O
I
I
I
I/O
I
I
I
O
I
O
GND
Description
Error amplifier inverting (feedback) input.
Output of the error amplifier and the inverting input of the PWM comparator.
Differential Output Voltage Sense Positive terminal.
Differential Output Voltage Sense Negative terminal.
Power for the internal control circuits. A 1
mF
decoupling capacitor is requires from this
pin to ground.
Serial Data bi-directional pin, requires pull-up resistor to VCC.
Serial Bus clock pin, requires pull-up resistor to VCC.
Logic input. Logic high enables regulator output logic low disables regulator output.
Power Saving Interface control pin. This pin can be set low, high or left floating.
Use a current limiting resistor of 100 kW when driving the pin with 5 V logic.
Open Drain power good indicator.
PWM_VID buffer input.
PWM_VID pulse output from internal buffer.
Analog ground and thermal pad, connected to system ground.
Table 2. MAXIMUM RATINGS
Rating
Pin Voltage Range (Note 1)
Pin Symbol
VSN
VCC
VRMP
PWM_VID
All Other Pins
with the
exception of
the DRON Pin
Pin Current Range
COMP
CSCOMP
DIFF
PGOOD
VSN
Moisture Sensitivity Level
Lead Temperature Soldering Reflow (SMD Styles Only),
Pb-Free Versions (Note 2)
MSL
T
SLD
−1
1
260
1
mA
−
°C
Min
GND−0.3
−0.3
−0.3
−0.3
(−2, < 50 ns)
−0.3
Typ
Max
GND + 0.3
6.5
25
VCC + 0.3
VCC + 0.3
Unit
V
V
V
V
V
−2
2
mA
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. All signals referenced to GND unless noted otherwise.
2. For information, please refer to our Soldering and Mounting Techniques Reference Manual,
SOLDERRM/D.
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