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5962R9663601V9A

产品描述4000/14000/40000 SERIES, HEX 1-INPUT INVERT GATE, UUC15, DIE-15
产品类别逻辑    逻辑   
文件大小74KB,共7页
制造商Renesas(瑞萨电子)
官网地址https://www.renesas.com/
下载文档 详细参数 选型对比 全文预览

5962R9663601V9A概述

4000/14000/40000 SERIES, HEX 1-INPUT INVERT GATE, UUC15, DIE-15

5962R9663601V9A规格参数

参数名称属性值
是否无铅不含铅
是否Rohs认证不符合
零件包装代码DIE
包装说明DIE, DIE OR CHIP
针数15
Reach Compliance Codecompliant
系列4000/14000/40000
JESD-30 代码R-XUUC-N15
JESD-609代码e0
负载电容(CL)50 pF
逻辑集成电路类型INVERTER
功能数量6
输入次数1
端子数量15
最高工作温度125 °C
最低工作温度-55 °C
封装主体材料UNSPECIFIED
封装代码DIE
封装等效代码DIE OR CHIP
封装形状RECTANGULAR
封装形式UNCASED CHIP
峰值回流温度(摄氏度)NOT SPECIFIED
电源5/15 V
Prop。Delay @ Nom-Sup162 ns
传播延迟(tpd)162 ns
认证状态Not Qualified
施密特触发器NO
筛选级别MIL-PRF-38535 Class V
最大供电电压 (Vsup)18 V
最小供电电压 (Vsup)3 V
标称供电电压 (Vsup)5 V
表面贴装YES
技术CMOS
温度等级MILITARY
端子面层TIN LEAD
端子形式NO LEAD
端子位置UPPER
处于峰值回流温度下的最长时间NOT SPECIFIED
总剂量100k Rad(Si) V
Base Number Matches1

文档预览

下载PDF文档
CD4049UBMS
Data Sheet
December 1992
File Number 3315
CMOS Hex Buffer/Converter
The CD4049UBMS is an inverting hex buffer and features
logic level conversion using only one supply (voltage (VCC).
The input signal high level (VIH) can exceed the VCC supply
voltage when this device is used for logic level conversions.
This device is intended for use as CMOS to DTL/TTL
converters and can drive directly two DTL/TTL loads. (VCC
= 5V, VOL
0.4V, and IOL
3.3mA.
The CD4049UBMS is designated as replacement for
CD4009UB. Because the CD4049UBMS requires only one
power supply, it is preferred over the CD4009UB and
CD4010B and should be used in place of the CD4009UB in
all inverter, current driver, or logic level conversion applica-
tions. In these applications the CD4049UBMS is pin compat-
ible with the CD4009UB, and can be substituted for this
device in existing as well as in new designs. Terminal No. 16
is not connected internally on the CD4049UBMS, therefore,
connection to this terminal is of no consequence to circuit
operation. For applications not requiring high sink current or
voltage conversion, the CD4069UB Hex Inverter is recom-
mended.
The CD4049UBMS is supplied in these 16 lead outline pack-
ages:
Braze Seal DIP
Frit Seal DIP
Ceramic Flatpack
H4S
H1E
H3X
Features
• High Voltage Type (20V Rating)
• Inverting Type
• High Sink Current for Driving 2 TTL Loads
• High-to-Low Level Logic Conversion
• 100% Tested for Quiescent Current at 20V
• Maximum Input Current of 1µA at 18V Over Full Pack-
age Temperature Range; 100nA at 18V and +25
o
C
• 5V, 10V and 15V Parametric Ratings
Applications
• CMOS to DTL/TTL Hex Converter
• CMOS Current “Sink” or “Source” Driver
• CMOS High-to-Low Logic Level Converter
Pinout
CD4049UBMS
TOP VIEW
VCC
G=A
A
H=B
B
I=C
C
VSS
1
2
3
4
5
6
7
8
16 NC
15 L = F
14 F
13 NC
12 K = E
11 E
10 J = D
9 D
Functional Diagram
A
3
2
G=A
Schematic
VCC
B
5
4
H=B
C
7
6
I=C
IN
P
R
OUT
N
D
VCC
VSS
NC = 13
NC = 16
1
8
E
9
10
J=D
11
12
K=E
VSS
F
14
15
L=F
FIGURE 1. SCHEMATIC DIAGRAM, 1 OF 6 IDENTICAL UNITS
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999

5962R9663601V9A相似产品对比

5962R9663601V9A 5962R9663602VXC 5962R9663601VEC 5962R9663601VXC
描述 4000/14000/40000 SERIES, HEX 1-INPUT INVERT GATE, UUC15, DIE-15 4000/14000/40000 SERIES, HEX 1-INPUT INVERT GATE, CDFP16, CERAMIC, DFP-16 4000/14000/40000 SERIES, HEX 1-INPUT INVERT GATE, CDIP16, CERAMIC, DIP-16 4000/14000/40000 SERIES, HEX 1-INPUT INVERT GATE, CDFP16, CERAMIC, DFP-16
零件包装代码 DIE DFP DIP DFP
包装说明 DIE, DIE OR CHIP DFP, FL16,.3 DIP, DIP16,.3 DFP, FL16,.3
针数 15 16 16 16
Reach Compliance Code compliant compliant compli compliant
系列 4000/14000/40000 4000/14000/40000 4000/14000/40000 4000/14000/40000
JESD-30 代码 R-XUUC-N15 R-CDFP-F16 R-CDIP-T16 R-CDFP-F16
JESD-609代码 e0 e4 e4 e4
负载电容(CL) 50 pF 50 pF 50 pF 50 pF
逻辑集成电路类型 INVERTER INVERTER INVERTER INVERTER
功能数量 6 6 6 6
输入次数 1 1 1 1
端子数量 15 16 16 16
最高工作温度 125 °C 125 °C 125 °C 125 °C
最低工作温度 -55 °C -55 °C -55 °C -55 °C
封装主体材料 UNSPECIFIED CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED
封装代码 DIE DFP DIP DFP
封装等效代码 DIE OR CHIP FL16,.3 DIP16,.3 FL16,.3
封装形状 RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
封装形式 UNCASED CHIP FLATPACK IN-LINE FLATPACK
电源 5/15 V 5/15 V 5/15 V 5/15 V
传播延迟(tpd) 162 ns 162 ns 162 ns 162 ns
认证状态 Not Qualified Not Qualified Not Qualified Not Qualified
施密特触发器 NO NO NO NO
筛选级别 MIL-PRF-38535 Class V MIL-PRF-38535 Class V MIL-PRF-38535 Class V MIL-PRF-38535 Class V
最大供电电压 (Vsup) 18 V 18 V 18 V 18 V
最小供电电压 (Vsup) 3 V 3 V 3 V 3 V
标称供电电压 (Vsup) 5 V 5 V 5 V 5 V
表面贴装 YES YES NO YES
技术 CMOS CMOS CMOS CMOS
温度等级 MILITARY MILITARY MILITARY MILITARY
端子面层 TIN LEAD GOLD GOLD GOLD
端子形式 NO LEAD FLAT THROUGH-HOLE FLAT
端子位置 UPPER DUAL DUAL DUAL
总剂量 100k Rad(Si) V 100k Rad(Si) V 100k Rad(Si) V 100k Rad(Si) V
Base Number Matches 1 1 1 1
Prop。Delay @ Nom-Sup 162 ns 162 ns - 162 ns
最大I(ol) - 0.0033 A 0.0033 A 0.0033 A
端子节距 - 1.27 mm 2.54 mm 1.27 mm

 
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