a
FEATURES
Dual Matched PNP Transistor
Low Offset Voltage: 100 V Max
Low Noise: 1 nV/√Hz @ 1 kHz Max
High Gain: 100 Min
High Gain Bandwidth: 190 MHz Typ
Tight Gain Matching: 3% Max
Excellent Logarithmic Conformance: r
BE
Low Noise, Matched
Dual PNP Transistor
MAT03
PIN CONNECTION
TO-78
(H Suffix)
0.3
typ
GENERAL DESCRIPTION
The MAT03 dual monolithic PNP transistor offers excellent
parametric matching and high frequency performance. Low
noise characteristics (1 nV/
√
Hz
max @ 1 kHz), high bandwidth
(190 MHz typical), and low offset voltage (100
µV
max), makes
the MAT03 an excellent choice for demanding preamplifier appli-
cations. Tight current gain matching (3% max mismatch) and
high current gain (100 min), over a wide range of collector cur-
rent, makes the MAT03 an excellent choice for current mirrors.
A low value of bulk resistance (typically 0.3
Ω)
also makes the
MAT03 an ideal component for applications requiring accurate
logarithmic conformance.
Each transistor is individually tested to data sheet specifications.
Device performance is guaranteed at 25°C and over the extended
industrial and military temperature ranges. To ensure the long-
term stability of the matching parameters, internal protection
diodes across the base-emitter junction clamp any reverse base-
emitter junction potential. This prevents a base-emitter breakdown
condition that can result in degradation of gain and matching
performance due to excessive breakdown current.
REV. C
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2002
MAT03–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
Parameter
Current Gain
1
Symbol
h
FE
(@ T
A
= 25 C, unless otherwise noted.)
Min
100
90
80
MAT03E
Typ Max
165
150
120
0.5
40
11
11
12
12
0.3
0.3
6
50
0.8
0.7
0.7
0.7
0.025 0.1
Min
80
70
60
3
100
150
150
50
50
0.75
0.75
35
200
MAT03F
Typ Max
165
150
120
0.5
40
11
11
12
12
0.3
0.3
6
50
0.8
0.7
0.7
0.7
0.025 0.1
Unit
Conditions
V
CB
= 0 V, –36 V
I
C
= 1 mA
I
C
= 100
µA
I
C
= 10
µA
I
C
= 100
µA,V
CB
= 0 V
V
CB
= 0 V, I
C
= 100
µA
I
C
= 100
µA
V
CB1
= 0 V
V
CB2
= –36 V
V
CB
= 0 V
I
C1
= 10
µA,
I
C2
= 1 mA
V
CB
= 0 V
10
µA ≤
I
C
≤
1 mA
I
C
= 100
µA,
V
CB
= 0 V
V
CB
= –36 V = V
MAX
I
C
= 1 mA, V
CB
= 0
f
O
= 10 Hz
f
O
= 100 Hz
f
O
= 1 kHz
f
O
= 10 kHz
I
C
= 1 mA, I
B
= 100
µA
Current Gain Matching
2
Offset Voltage
3
Offset Voltage Change
vs. Collector Voltage
Offset Voltage Change
vs. Collector Current
Bulk Resistance
Offset Current
Collector-Base
Leakage Current
Noise Voltage Density
4
Dh
FE
V
OS
∆V
OS
/∆V
CB
∆V
OS
/∆I
C
r
BE
I
OS
I
CB0
e
N
6
200
200
200
75
75
0.75
0.75
45
400
%
µV
µV
µV
µV
µV
Ω
Ω
nA
pA
nV/÷
Hz
nV/÷
Hz
nV/÷
Hz
nV/÷
Hz
V
Collector Saturation
Voltage
V
CE(SAT)
ELECTRICAL CHARACTERISTICS
(@ –40 C
≤
T
≤
85 C, unless otherwise noted.)
A
Parameter
Symbol
Conditions
MAT03E
Min Typ Max
MAT03F
Min Typ Max
Unit
Current Gain
h
FE
Offset Voltage
Offset Voltage Drift
5
Offset Current
Breakdown Voltage
V
OS
TCV
OS
I
OS
BV
CEO
V
CB
= 0 V, –36 V
I
C
= 1 mA
I
C
= 100
µA
I
C
= 10
µA
I
C
= 100
µA,
V
CB
= 0 V
I
C
= 100
µA,
V
CB
= 0 V
I
C
= 100
µA,
V
CB
= 0 V
70
60
50
120
105
90
30 135
0.3 0.5
10 85
60
50
40
120
105
90
30 265
0.3 1.0
10 200
36
36
µV
µV/°C
nA
V
NOTES
1
Current gain is measured at collector-base voltages (V
CB
) swept from 0 to V
MAX
at indicated collector current. Typicals are measured at V
CB
= 0 V.
2
Current
gain matching (∆h
FE
) is defined as:
∆h
FE =
100 (
∆I
B
)
h
FE
(min )
I
C
.
KT
q
In
3
Offset
4
5
voltage is defined as: V
OS
= V
BE1
– V
BE2
, where V
OS
is the differential voltage for I
C1
= I
C2
: V
OS
= V
BE1
– V
BE2
=
I
C1
I
.
C2
Sample tested. Noise tested and specified as equivalent input voltage for each transistor.
Guaranteed by V
OS
test
(TCV
OS
=
V
OS
/T
for
V
OS
V
BE
) where T
= 298
°
K for T
A
= 25°C.
Specifications subject to change without notice.
–2–
REV. C
MAT03
ORDERING GUIDE
ABSOLUTE MAXIMUM RATINGS
1
Model
MAT03EH
MAT03FH
V
OS
max
Temperature
(T
A
= +25 C) Range
100
µV
200
µV
–40°C to +85°C
–40°C to +85°C
Package
Option
TO-78
TO-78
Collector-Base Voltage (BV
CBO
) . . . . . . . . . . . . . . . . . . . 36 V
Collector-Emitter Voltage (BV
CEO
) . . . . . . . . . . . . . . . . . 36 V
Collector-Collector Voltage (BV
CC
) . . . . . . . . . . . . . . . . . 36 V
Emitter-Emitter Voltage (BV
EE
) . . . . . . . . . . . . . . . . . . . 36 V
Collector Current (I
C
) . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
Emitter Current (I
E
) . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
Total Power Dissipation
Ambient Temperature
≤
70°C
2
. . . . . . . . . . . . . . . 500 mW
Operating Temperature Range
MAT03E/F . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C
Operating Junction Temperature . . . . . . . . . –55°C to +150°C
Storage Temperature . . . . . . . . . . . . . . . . . . –65°C to +150°C
Lead Temperature (Soldering, 60 sec) . . . . . . . . . . . . . 300°C
Junction Temperature . . . . . . . . . . . . . . . . . –65°C to +150°C
NOTES
1
Absolute maximum ratings apply to both DICE and packaged devices.
2
Rating applies to TO-78 not using a heat sink and LCC; devices in free air only. For
TO-78, derate linearly at 6.3 mW/°C above 70°C ambient temperature; for LCC,
derate at 7.8 mW/°C.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the MAT03 features propriety ESD protection circuitry, permanent damage may occur
on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions
are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
REV. C
–3–
MAT03 –Typical Performance Characteristics
TPC 1. Current Gain vs.
Collector Current
TPC 2. Current Gain
vs. Temperature
TPC 3. Gain Bandwidth vs.
Collector Current
TPC 4. Base-Emitter Voltage
vs. Collector Current
TPC 5. Small-Signal Input Resistance
(h
ie
) vs. Collector Current
TPC 6. Small Signal Output Con-
ductance (h
oe
) vs. Collector Current
–4–
REV. C
MAT03
TPC 7. Saturation Voltage
vs. Collector Current
TPC 8. Noise Voltage Density
vs. Frequency
TPC 9. Noise Voltage Density
TPC 10. Total Noise vs. Collector Current
TPC 11. Collector-Base Capacitance vs. V
CB
REV. C
–5–
51单片机
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
