19-1100; Rev 0; 6/96
KIT
ATION
EVALU
BLE
AVAILA
8-Bit, 300Msps Flash ADC
____________________________Features
o
o
o
o
o
o
Metastable Errors Reduced to 1LSB
10pF Input Capacitance
210MHz Input Bandwidth
300Msps Conversion Rate
2.2W Typical Power Dissipation
Single -5.2V Supply
_______________General Description
The MAX1125 is a monolithic, flash analog-to-digital con-
verter (ADC) capable of digitizing a 2V analog input signal
into 8-bit digital words at a typical 300Msps update rate.
For most applications, no external sample-and-hold is
required for accurate conversion due to the device's
narrow aperture time, wide bandwidth, and low input
capacitance. A single standard -5.2V power supply is
required to operate the MAX1125, with nominal 2.2W
power dissipation. A special decoding scheme reduces
metastable errors to 1LSB.
The part is packaged in a 42-pin ceramic sidebraze
that is pin compatible with the CX20116 and
CX41396D. The surface-mount 44-pin CERQUAD pack-
age allows access to additional reference ladder taps,
an overrange bit, and a data-ready output. The pin-
compatible 150Msps MAX1114 is also available.
MAX1125
______________Ordering Information
PART
TEMP. RANGE PIN-PACKAGE INL (LSBs)
±0.75
±1
±0.75
±1
MAX1125AIDO -20°C to +85°C 42 Ceramic SB
MAX1125BIDO -20°C to +85°C 42 Ceramic SB
MAX1125AIBH -20°C to +85°C 44 CERQUAD
MAX1125BIBH -20°C to +85°C 44 CERQUAD
Functional Diagram appears at end of data sheet.
________________________Applications
Digital Oscilloscopes
Transient Capture
Radar, EW, ECM
Direct RF Down-Conversion
Medical Electronics
Ultrasound, CAT Instrumentation
____Pin Configurations (continued)
TOP VIEW
V
EE
N.C.
LINV
V
EE
1
2
3
4
5
6
7
8
9
42 N.C.
41 VRTF
40 N.C.
_________________Pin Configurations
D8 (MSB)
D0 (LSB)
DREADY
MAX1125
39 V
EE
38 V
EE
37 N.C.
36 N.C.
35 AGND
34 VIN
33 AGND
32 VR2
31 AGND
30 VIN
29 AGND
28 N.C.
27 N.C.
26 V
EE
25 V
EE
24 N.C.
23 VRBF
22 N.C.
AGND
DGND
TOP VIEW
DGND
DO (LSB)
D1
D2
D7
D6
D5
D4
D3
39
D2
38
42
44
43
41
40
D1
37
36
35
34
D3 10
DGND
AGND
V
EE
MINV
CLK
CLK
V
EE
AGND
AGND
1
2
3
4
5
6
7
8
9
33
AGND
32
V
EE
31
LINV
30
N.C.
D4 11
D5 12
D6 13
D7 (MSB) 14
DGND 15
AGND 16
V
EE
17
MINV 18
N.C. 19
CLK 20
MAX1125
29
DRINV
28
N.C.
27
V
EE
26
AGND
25
AGND
24
VRTS
23
VRTF
VRBS
10
VRBF
11
AGND
20
AGND
14
AGND
18
AGND
16
VR3
21
V
EE
12
VR1
13
VR2
17
VIN
19
VIN
15
V
EE
22
CLK 21
Ceramic SB
CERQUAD
________________________________________________________________
Maxim Integrated Products
1
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800
8-Bit, 300Msps Flash ADC
MAX1125
ABSOLUTE MAXIMUM RATINGS
Negative Supply Voltage (V
EE
TO GND) ..............-7.0V to +0.5V
Ground Voltage Differential ...................................-0.5V to +0.5V
Analog Input Voltage ...............................................V
EE
to +0.5V
Reference Input Voltage ..........................................V
EE
to +0.5V
Digital Input Voltage ................................................V
EE
to +0.5V
Reference Current V
RTF
to V
RBF
........................................25mA
Digital Output Current ...........................................0mA to -30mA
Operating Temperature Range ...........................-25°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10sec). ............................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
EE
= -5.2V, R
SOURCE
= 50Ω, VRBF = -2.00V, VR2 = -1.00V, VRTF = 0.00V, f
CLK
= 150MHz, 50% Duty Cycle, T
A
= T
MIN
to T
MAX
,
unless otherwise noted.)
PARAMETER
DC ACCURACY
Integral Linearity
Differential Linearity
No Missing Codes
ANALOG INPUT
Offset Error V
RT
Offset Error V
RB
Input Voltage Range
Input Capacitance
Input Resistance
Input Current
Input Slew Rate
Large Signal Bandwidth
Small Signal Bandwidth
REFERENCE INPUT
Ladder Resistance
Reference Bandwidth
TIMING CHARACTERISTICS
Maximum Sample Rate
Clock to Data Delay
Output Delay TEMPCO
CLK-to-Data Ready Delay (t
D
)
Aperture Jitter
Acquisition Time
VI
V
V
V
V
V
250
300
2.4
2
2.0
5
1.5
250
300
2.4
2
2.0
5
1.5
Msps
ns
ps/°C
ns
ps
ns
VI
V
100
200
10
300
100
200
10
300
Ω
MHz
VIN = full scale
IN = 500mVp-p
Over full input range
IV
IV
VI
V
V
VI
V
V
V
-30
-30
-2.0
10
15
250
1,000
210
335
500
+30
+30
0.0
-30
-30
-2.0
10
15
250
1,000
210
335
500
+30
+30
0.0
mV
mV
V
pF
kΩ
µA
V/µs
MHz
MHz
VI
VI
-0.75
-0.75
Guaranteed
±0.60
+0.75
+0.75
-0.95
-0.95
Guaranteed
±0.80
+0.95
+0.95
LSB
LSB
CONDITIONS
TEST
LEVEL
MIN
MAX1125A
TYP
MAX
MIN
MAX1125B
TYP
MAX
UNITS
2
_______________________________________________________________________________________
8-Bit, 300Msps Flash ADC
ELECTRICAL CHARACTERISTICS (continued)
(V
EE
= -5.2V, R
SOURCE
= 50Ω, VRBF = -2.00V, VR2 = -1.00V, VRTF = 0.00V, f
CLK
= 150MHz, 50% Duty Cycle, T
A
= T
MIN
to T
MAX
,
unless otherwise noted.)
PARAMETER
DYNAMIC PERFORMANCE
Signal-to-Noise Ratio
Total Harmonic Distortion
Signal-to-Noise and
Distortion (SINAD)
DIGITAL INPUTS
Digital Input High Voltage
(MINV, LINV)
Digital Input Low Voltage
(MINV, LINV)
Clock Synchronous
Input Currents
Clock Low Width, T
PWL
Clock High Width, T
PWH
DIGITAL OUTPUTS
Digital Output High Voltage
Digital Output Low Voltage
Supply Current
Power Dissipation
TEST LEVEL CODES
All electrical characteristics are subject to the
following conditions:
All parameters having min/max specifications are
guaranteed. The Test Level column indicates the
specific device testing actually performed during
production and Quality Assurance inspection.
Any blank section in the data column indicates
that the specification is not tested at the specified
condition.
Unless otherwise noted, all tests are pulsed;
therefore, T
j
= T
C
= T
A
.
50Ω to -2V
50Ω to -2V
T
A
= +25 °C
T
A
= +25 °C
VI
VI
V
I
I
TEST LEVEL
I
II
III
IV
V
VI
2.4
425
2.2
TEST PROCEDURE
100% production tested at the specified temperature.
100% production tested at T
A
= +25°C, and sample tested at the
specified temperatures.
QA sample tested only at the specified temperatures.
Parameter is guaranteed (but not tested) by design and
characterization data.
Parameter is a typical value for information purposes only.
100% production tested at T
A
= +25°C. Parameter is guaranteed
over specified temperature range.
550
2.9
-1.1
-1.5
2.4
425
2.2
550
2.9
-1.1
-1.5
V
V
ns
mA
W
VI
VI
V
VI
VI
2
2
-1.1
-2.0
40
1.8
1.8
2
2
-0.7
-1.5
-1.1
-2.0
40
1.8
1.8
-0.7
-1.5
V
V
µA
ns
ns
F
IN
= 3.58MHz
F
IN
= 100MHz
F
IN
= 3.58MHz
F
IN
= 100MHz
F
IN
= 3.58MHz
F
IN
= 100MHz
VI
VI
VI
VI
VI
VI
45
39
-48
-40
44
37
47
42
-52
-43
46
39
44
38
-46
-39
42
35
46
41
-50
-42
44
37
dB
dB
dB
CONDITIONS
TEST
LEVEL
MAX1114A
TYP
MAX
MAX1114B
TYP
MAX
UNITS
MAX1125
MIN
MIN
POWER-SUPPLY REQUIREMENTS
_______________________________________________________________________________________
3
8-Bit, 300Msps Flash ADC
MAX1125
__________________________________________Typical Operating Characteristics
SIGNAL-TO-NOISE RATIO
vs. INPUT FREQUENCY
MAX1125 -01
TOTAL HARMONIC DISTORTION
vs. INPUT FREQUENCY
70
65
60
THD (dB)
55
50
45
40
35
30
1
10
INPUT FREQUENCY (MHz)
100
f
s
= 250Msps
MAX1125 -02
52
50
48
46
SNR (dB)
44
42
40
38
36
34
1
75
f
s
= 250Msps
10
INPUT FREQUENCY (MHz)
100
SIGNAL-TO-NOISE AND DISTORTION
vs. INPUT FREQUENCY
50
48
SNR, THD, SINAD (dB)
46
SINAD (dB)
44
42
40
38
36
34
1
10
INPUT FREQUENCY (MHz)
100
30
-40
-20
f
s
= 250Msps
MAX1125 -03
SNR, THD, SINAD
vs. TEMPERATURE
f
s
= 250Msps
f
IN
= 100MHz
45
THD
40
SINAD
35
SNR
MAX1125 -04
52
50
0
20
40
60
80
TEMPERATURE (°C)
4
_______________________________________________________________________________________
8-Bit, 300Msps Flash ADC
______________________________________________________________Pin Description
PIN
NAME
Ceramic SB
1, 4, 17, 25, 26, 38, 39
2, 19, 22, 24, 27, 28, 36,
37, 40, 42
3
5, 16, 29, 31, 33, 35
6, 15
7
8–13
14
18
—
20
21
—
23
30, 34
—
32
—
41
—
—
—
CERQUAD
3, 7, 12, 22, 27, 32
28, 30
31
2, 8, 9, 14, 16, 18, 20,
25, 26, 33
1, 34
36
37–42
43
4
44
5
6
10
11
15, 19
13
17
21
23
24
29
35
V
EE
N.C.
LINV
AGND
DGND
D0
D1–D6
D7
MINV
D8
CLK
CLK
VRBS
VRBF
VIN
VR1
VR2
VR3
VRTF
VRTS
DRINV
DREADY
Negative Analog Supply (nominally -5.2V)
No Connect. Not internally connected.
D0–D6 Output Inversion Control
Analog Ground
Digital Ground
Digital Data Output (LSB)
Digital Data Output
Digital Data Output (MSB)
D7 Output Inversion Control
Overrange Output
Inverse ECL Clock Input Pin
ECL Clock Input Pin
Reference Voltage Bottom, Sense
Reference Voltage Bottom, Force
Analog Input. Can be connected to the input
signal or used as a sense.
Reference Voltage Tap 1 (typically -1.5V)
Reference Voltage Tap 2 (typically -1V)
Reference Voltage Tap 3 (typically -0.5V)
Reference Voltage Top, Force
Reference Voltage Top, Sense
Data-Ready Inverse
Data-Ready Output
FUNCTION
MAX1125
_______________Detailed Description
The MAX1125 is a 300Msps, monolithic, 8-bit parallel
flash analog-to-digital converter (ADC) with an analog
bandwidth of over 200MHz. A major advance over pre-
vious flash converters is the inclusion of 256 input pre-
amplifiers between the reference ladder and input
comparators. (See
Functional Diagram.)
This feature
not only reduces clock-transient kickback to the input
and reference ladder due to a low AC beta, but also
reduces the effect of the dynamic state of the input sig-
nal on the latching characteristics of the input compara-
tors. The preamplifiers act as buffers and stabilize the
input capacitance so it remains constant for varying
input voltages and frequencies, making the part easier
to drive than previous flash converters. The MAX1125
incorporates a special decoding scheme that reduces
metastable errors (sparkle codes or flyers) to a maxi-
mum of 1LSB.
_______________________________________________________________________________________
5
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