19-3712; Rev 0; 5/05
3Msps/2Msps, 5V/3V, 2-Channel, True-
Differential 12-Bit ADCs
General Description
The MAX1332/MAX1333 2-channel, serial-output,
12-bit, analog-to-digital converters (ADCs) feature two
true-differential analog inputs and offer outstanding noise
immunity and dynamic performance. Both devices easily
interface with SPI™/QSPI™/MICROWIRE™ and standard
digital signal processors (DSPs).
The MAX1332 operates from a single supply of +4.75V
to +5.25V with sampling rates up to 3Msps. The
MAX1333 operates from a single supply of +2.7V to
+3.6V with sampling rates up to 2Msps. These devices
feature a partial power-down mode and a full power-
down mode that reduce the supply current to 3.3mA
and 0.2µA, respectively. Also featured is a separate
power supply input (DV
DD
) that allows direct interfacing
to +2.7V to +3.6V digital logic. The fast conversion
speed, low power dissipation, excellent AC perfor-
mance, and DC accuracy (±0.6 LSB INL) make the
MAX1332/MAX1333 ideal for industrial process control,
motor control, and base-station applications.
The MAX1332/MAX1333 are available in a space-sav-
ing (3mm x 3mm), 16-pin, TQFN package and operate
over the extended (-40°C to +85°C) temperature range.
Features
♦
3Msps Sampling Rate (+5V, MAX1332)
♦
2Msps Sampling Rate (+3V, MAX1333)
♦
Separate Logic Supply: +2.7V to +3.6V
♦
Two True-Differential Analog Input Channels
♦
Bipolar/Unipolar Selection Input
♦
Only 38mW (typ) Power Consumption
♦
Only 2µA (max) Shutdown Current
♦
High-Speed, SPI-Compatible, 3-Wire Serial
Interface
♦
2MHz Full-Linear Bandwidth
♦
71.4dB SINAD and -93dB THD at 525kHz Input
Frequency
♦
No Pipeline Delays
♦
Space-Saving (3mm x 3mm), 16-Pin, TQFN
Package
MAX1332/MAX1333
Ordering Information
PART
MAX1333ETE
TEMP RANGE PIN-PACKAGE
-40°C to +85°C 16 TQFN-EP** (3mm x 3mm)
MAX1332ETE*
-40°C to +85°C 16 TQFN-EP** (3mm x 3mm)
Applications
Data Acquisition
Bill Validation
Motor Control
Base Stations
High-Speed Modems
Optical Sensors
Industrial Process Control
*Future product—contact factory for availability.
**EP = Exposed paddle.
Selector Guide and Pin Configuration appear at end of data
sheet.
Typical Operating Circuit
+2.7V TO +3.6V
+4.75V TO +5.25V
1µF
0.1µF
AV
DD
+
DIFFERENTIAL
INPUTS
-
+
-
REF INPUT
VOLTAGE
0.1µF
AGND
AIN1P
AIN1N
AIN0P
AIN0N
REF
1µF
MAX1332
CHSEL
CNVST
SCLK
DOUT
AGND DGND
µC/DSP
DV
DD
SHDN
BIP/UNI
0.1µF
1µF
SPI/QSPI are trademarks of Motorola, Inc.
MICROWIRE is a trademark of National Semiconductor Corp.
________________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
3Msps/2Msps, 5V/3V, 2-Channel, True-
Differential 12-Bit ADCs
MAX1332/MAX1333
ABSOLUTE MAXIMUM RATINGS
AV
DD
to AGND (MAX1332) ......................................-0.3V to +6V
AV
DD
to AGND (MAX1333) ......................................-0.3V to +4V
DV
DD
to DGND.........................................................-0.3V to +4V
AGND to DGND.....................................................-0.3V to +0.3V
SCLK, CNVST,
SHDN,
CHSEL, BIP/UNI,
DOUT to DGND ...................................-0.3V to (DV
DD
+ 0.3V)
AIN0P, AIN0N, AIN1P, AIN1N, REF to
AGND...................................................-0.3V to (AV
DD
+ 0.3V)
Maximum Current into Any Pin .........................................±50mA
Continuous Power Dissipation (T
A
= +70°C)
16-Pin TQFN (derate 17.5mW/°C above +70°C) ....1398.6mW
Operating Temperature Range
MAX133_ETE ...................................................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-60°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS (MAX1332)
(AV
DD
= +4.75V to +5.25V, DV
DD
= +2.7V to +3.6V, f
SCLK
= 48MHz, V
REF
= 4.096V, T
A
= T
MIN
to T
MAX
, unless otherwise noted.
Typical values are at T
A
= +25°C.)
PARAMETER
Resolution
Integral Nonlinearity
Differential Nonlinearity
Offset Error
Gain Error
Offset-Error Temperature
Coefficient
Gain-Error Temperature
Coefficient
Signal-to-Noise Ratio
Signal-to-Noise Plus Distortion
Total Harmonic Distortion
Spurious-Free Dynamic Range
Channel-to-Channel Isolation
Full-Linear Bandwidth
Full-Power Bandwidth
Small-Signal Bandwidth
CONVERSION RATE
Minimum Conversion Time
Maximum Throughput Rate
Minimum Track-and-Hold
Acquisition Time
t
ACQ
Figure 5
t
CONV
Figure 5
3
52
271
ns
Msps
ns
SINAD > 68dB
SNR
SINAD
THD
SFDR
84
70
70
SYMBOL
N
INL
DNL
CONDITIONS
MIN
12
±0.6
±0.6
±0.9
±0.6
±0.2
±1.1
±1.0
±1.0
±3.0
±6.0
TYP
MAX
UNITS
Bits
LSB
LSB
LSB
LSB
ppm/°C
ppm/°C
DC ACCURACY (BIP/UNI = DGND) (Note 1)
DYNAMIC SPECIFICATIONS (A
IN
= -0.2dBFS, f
IN
= 525kHz, BIP/UNI = DV
DD
, unless otherwise noted) (Note 1)
71.5
71.4
-93
93
76
2
6
6
-84
dB
dB
dBc
dBc
dB
MHz
MHz
MHz
2
_______________________________________________________________________________________
3Msps/2Msps, 5V/3V, 2-Channel, True-
Differential 12-Bit ADCs
ELECTRICAL CHARACTERISTICS (MAX1332) (continued)
(AV
DD
= +4.75V to +5.25V, DV
DD
= +2.7V to +3.6V, f
SCLK
= 48MHz, V
REF
= 4.096V, T
A
= T
MIN
to T
MAX
, unless otherwise noted.
Typical values are at T
A
= +25°C.)
PARAMETER
Aperture Delay
Aperture Jitter
Differential Input Voltage Range
(V
AIN_P
- V
AIN_N
)
Absolute Input Voltage Range
DC Leakage Current
Input Capacitance
REFERENCE INPUT (REF)
REF Input Voltage Range
REF Input Capacitance
REF DC Leakage Current
I
LKG
C
IN
14
AV
DD
+
50mV
14
±10
0.3 x
DV
DD
0.7 x
DV
DD
100
I
ILKG
C
IN
V
OL
V
OH
I
LKGT
C
OUT
AV
DD
DV
DD
Normal mode; average current (f
SAMPLE
=
3MHz, f
SCLK
= 48MHz)
Partial power-down mode
Full power-down mode
I
SINK
= 5mA
I
SOURCE
= 1mA
Between conversions, CNVST = DV
DD
Between conversions, CNVST = DV
DD
4.75
2.7
11
3.5
0.1
15
5.25
3.6
12
6
2
µA
DV
DD
-
0.5
±1
±0.2
15
0.4
±5
SYMBOL
t
AD
t
AJ
Figure 21
Figure 21
BIP/UNI = DGND
BIP/UNI = DV
DD
0
-V
REF
/ 2
AGND
- 50mV
CONDITIONS
MIN
TYP
<10
<10
V
REF
+V
REF
/ 2
AV
DD
+
50mV
±1
V
µA
pF
MAX
UNITS
ns
ps
V
MAX1332/MAX1333
DIFFERENTIAL ANALOG INPUTS (AIN0P, AIN0N, AIN1P, AIN1N)
V
IN
V
REF
C
REF
I
REF
1.0
V
pF
µA
DIGITAL INPUTS (SCLK, CNVST,
SHDN,
CHSEL, BIP/UNI)
Input-Voltage Low
Input-Voltage High
Input Hysteresis
Input Leakage Current
Input Capacitance
DIGITAL OUTPUT (DOUT)
Output-Voltage Low
Output-Voltage High
Tri-State Leakage Current
Tri-State Output Capacitance
POWER REQUIREMENTS
Analog Supply Voltage
Digital Supply Voltage
V
V
mA
V
V
µA
pF
V
IL
V
IH
V
V
mV
µA
pF
Analog Supply Current
I
AVDD
_______________________________________________________________________________________
3
3Msps/2Msps, 5V/3V, 2-Channel, True-
Differential 12-Bit ADCs
MAX1332/MAX1333
ELECTRICAL CHARACTERISTICS (MAX1332) (continued)
(AV
DD
= +4.75V to +5.25V, DV
DD
= +2.7V to +3.6V, f
SCLK
= 48MHz, V
REF
= 4.096V, T
A
= T
MIN
to T
MAX
, unless otherwise noted.
Typical values are at T
A
= +25°C.)
PARAMETER
SYMBOL
CONDITIONS
Average current (f
SAMPLE
= 3MHz, f
SCLK
=
48MHz, zero-scale input)
Digital Supply Current
I
DVDD
Power-down (f
SCLK
= 48MHz), CNVST =
DV
DD
Static; all digital inputs are connected to
DV
DD
or DGND
Power-Supply Rejection
PSR
AV
DD
= 4.75V to 5.25V, full-scale input
MIN
TYP
4.5
15
0.2
MAX
7
30
µA
2
±2
mV
UNITS
mA
TIMING CHARACTERISTICS (MAX1332) (Figure 4)
(AV
DD
= +4.75V to +5.25V, DV
DD
= +2.7V to +3.6V, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at T
A
= +25°C.)
PARAMETER
SCLK Clock Period
SCLK Pulse Width
CNVST Rise to DOUT Disable
CNVST Fall to DOUT Enable
CHSEL to CNVST Fall Setup
BIP/UNI to CNVST Fall Setup
CNVST Fall to CHSEL Hold
SCLK Fall to BIP/UNI Hold
DOUT Remains Valid After SCLK
SCLK Rise to DOUT Transition
CNVST to SCLK Rise
SCLK Rise to CNVST
CNVST Pulse Width
Minimum Recovery Time (Full
Power-Down)
Minimum Recovery Time (Partial
Power-Down)
SYMBOL
t
CP
t
SPW
t
CRDD
t
CFDE
t
CHCF
t
BUCF
t
CFCH
t
CFBU
t
DHOLD
t
DOT
t
SETUP
t
HOLD
t
CSW
t
FPD
t
PPD
From CNVST fall or
SHDN
rise
From CNVST fall
C
LOAD
= 0pF (Note 2)
C
LOAD
= 30pF
6
0
6
4
500
CONDITIONS
MIN
20.8
6
15
15
40
40
0
0
1
2
6
TYP
MAX
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
ns
Note 1:
Tested with AV
DD
= 4.75V and DV
DD
= +2.7V.
Note 2:
Guaranteed by design, not production tested.
4
_______________________________________________________________________________________
3Msps/2Msps, 5V/3V, 2-Channel, True-
Differential 12-Bit ADCs
ELECTRICAL CHARACTERISTICS (MAX1333)
(AV
DD
= +2.7V to +3.6V, DV
DD
= +2.7V to AV
DD
, f
SCLK
= 32MHz, V
REF
= 2.5V, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical
values are at T
A
= +25°C.)
PARAMETER
Resolution
Relative Accuracy
Differential Nonlinearity
Offset Error
Gain Error
Offset-Error Temperature
Coefficient
Gain-Error Temperature
Coefficient
Signal-to-Noise Ratio
Signal-to-Noise Plus Distortion
Total Harmonic Distortion
Spurious-Free Dynamic Range
Channel-to-Channel Isolation
Full-Linear Bandwidth
Full-Power Bandwidth
Small-Signal Bandwidth
CONVERSION RATE
Minimum Conversion Time
Maximum Throughput Rate
Minimum Track-and-Hold
Acquisition Time
Aperture Delay
Aperture Jitter
Differential Input Voltage Range
(V
AIN_P
- V
AIN_N
)
Absolute Input Voltage Range
DC Leakage Current
I
LKG
t
ACQ
t
AD
t
AJ
Figure 5
Figure 21
Figure 21
BIP/UNI = DGND
BIP/
UNI
= DV
DD
0
-V
REF
/ 2
AGND
- 50mV
<10
<10
V
REF
+V
REF
/ 2
AV
DD
+
50mV
±1
t
CONV
Figure 5
2.0
78
406
ns
Msps
ns
ns
ps
SINAD > 68dB
SNR
SINAD
THD
SFDR
83.5
70
70
SYMBOL
N
INL
DNL
CONDITIONS
MIN
12
±0.6
±0.6
±0.9
±0.6
±1.1
±0.2
±1.0
±1.0
±3.0
±6.0
TYP
MAX
UNITS
Bits
LSB
LSB
LSB
LSB
ppm/°C
ppm/°C
DC ACCURACY (Note 3) (BIP/UNI = DGND)
MAX1332/MAX1333
DYNAMIC SPECIFICATIONS (A
IN
= -0.2dBFS, f
IN
= 525kHz, BIP/UNI = DV
DD
, unless otherwise noted) (Note 3)
71.5
71.4
-93
93
76
1.7
5.5
5
-86.5
dB
dB
dBc
dBc
dB
MHz
MHz
MHz
DIFFERENTIAL ANALOG INPUTS (AIN0P, AIN0N, AIN1P, AIN1N)
V
IN
V
V
µA
_______________________________________________________________________________________
5
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