IRF9520
Data Sheet
January 2002
6A, 100V, 0.600 Ohm, P-Channel Power
MOSFET
This advanced power MOSFET is designed, tested, and
guaranteed to withstand a specified level of energy in the
breakdown avalanche mode of operation. These are
P-Channel enhancement mode silicon gate power field effect
transistors designed for applications such as switching
regulators, switching converters, motor drivers, relay drivers
and drivers for high power bipolar switching transistors
requiring high speed and low gate drive power. These types
can be operated directly from integrated circuits.
Formerly developmental type TA17501.
Features
• 6A, 100V
• r
DS(ON)
= 0.600
Ω
• Single Pulse Avalanche Energy Rated
• SOA is Power Dissipation Limited
• Nanosecond Switching Speeds
• Linear Transfer Characteristics
• High Input Impedance
Symbol
D
Ordering Information
PART NUMBER
IRF9520
PACKAGE
TO-220AB
BRAND
IRF9520
G
NOTE: When ordering, use the entire part number.
S
Packaging
JEDEC TO-220AB
SOURCE
DRAIN
GATE
DRAIN (FLANGE)
©2002 Fairchild Semiconductor Corporation
IRF9520 Rev. B
IRF9520
Absolute Maximum Ratings
T
C
= 25
o
C, Unless Otherwise Specified
IRF9520
-100
-100
-6
-4
-24
±
20
40
0.32
370
-55 to 150
300
260
UNITS
V
V
A
A
A
V
W
W/
o
C
mJ
o
C
o
C
o
C
Drain to Source Breakdown Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DS
Drain to Gate Voltage (R
GS
= 20k
Ω)
(Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DGR
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
D
T
C
=100
o
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
D
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
DM
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
GS
Maximum Power Dissipation (Figure 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
D
Linear Derating Factor (Figure 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Single Pulse Avalanche Energy Rating (Note 4). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E
AS
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
J,
T
STG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
L
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
pkg
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. T
J
= 25
o
C to T
J
= 125
o
C.
Electrical Specifications
PARAMETER
T
C
= 25
o
C, Unless Otherwise Specified
SYMBOL
BV
DSS
V
GS(TH)
I
DSS
TEST CONDITIONS
I
D
= -250
µ
A, V
GS
= 0V (Figure 10)
V
GS
= V
DS
, I
D
= -250
µ
A
V
DS
= Rated BV
DSS
, V
GS
= 0V
V
DS
= 0.8 x Rated BV
DSS
, V
GS
= 0V
T
C
= 125
o
C
MIN
-100
-2
-
-
-6
-
-
0.9
-
-
-
-
V
GS
= -10V, I
D
= -6A, V
DS
= 0.8 x Rated BV
DSS
(Figure 14) Gate Charge is Essentially
Independent of Operating Temperature
-
-
-
V
DS
= -25V, V
GS
= 0V, f = 1MHz
(Figure 11)
-
-
-
Measured From the
Modified MOSFET
Contact Screw on Tab To Symbol Showing the
Center of Die
Internal Devices
Inductances
Measured From the Drain
D
Lead, 6mm (0.25in) from
Package to Center of Die
L
D
Measured From the
Source Lead, 6mm
(0.25in) From Header to
Source Bonding Pad
G
L
S
S
TYP
-
-
-
-
-
-
0.500
2
25
50
50
50
16
9
7
300
200
50
3.5
MAX
-
-4
-25
-250
-
±1
00
0.600
-
50
100
100
100
22
-
-
-
-
-
-
UNITS
V
V
µ
A
µ
A
A
nA
Ω
S
ns
ns
ns
ns
nC
nC
nC
pF
pF
pF
nH
Drain to Source Breakdown Voltage
Gate Threshold Voltage
Zero Gate Voltage Drain Current
On-State Drain Current (Note 2)
Gate to Source Leakage Current
Drain to Source On Resistance (Note 2)
Forward Transconductance (Note 2)
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
(Gate to Source + Gate to Drain)
Gate to Source Charge
Gate to Drain “Miller” Charge
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Internal Drain Inductance
I
D(ON)
I
GSS
r
DS(ON)
gfs
t
d(ON)
t
r
t
d(OFF)
t
f
Q
g(TOT)
Q
gs
Q
gd
C
ISS
C
OSS
C
RSS
L
D
V
DS
> I
D(ON)
x r
DS(ON) MAX
, V
GS
= -10V
V
GS
=
±
20V
I
D
= -3.5A, V
GS
= -10V (Figures 8, 9)
V
DS
> I
D(ON)
x r
DS(ON)MAX
, I
D
= -3.5A
( Figure 12)
V
DD
= 0.5 x Rated BV
DSS
, I
D
≈
-6.0A,
R
G
= 50
Ω
, R
L
= 7.7
Ω€
for V
DSS
= 50
Ω
MOSFET Switching Times are Essentially
Independent of Operating Temperature
-
-
4.5
-
nH
Internal Source Inductance
L
S
-
7.5
-
nH
Thermal Resistance Junction-to-Case
Thermal Resistance Junction-to-Ambient
R
θ
JC
R
θ
JA
Typical Socket Mount
-
-
-
-
3.12
62.5
o
C/W
o
C/W
©2002 Fairchild Semiconductor Corporation
IRF9520 Rev. B
IRF9520
Source to Drain Diode Specifications
PARAMETER
Continuous Source to Drain Current
Pulse Source to Drain Current
(Note 3)
SYMBOL
I
SD
I
SDM
TEST CONDITIONS
Modified MOSFET Sym-
bol Showing the Integral
Reverse P-N Junction
Diode
G
D
MIN
-
-
TYP
-
-
MAX
-6.0
-24
UNITS
A
A
S
Source to Drain Diode Voltage
(Note 2)
Reverse Recovery Time
Reverse Recovery Charge
NOTES:
V
SD
t
rr
Q
RR
T
C
= 25
o
C, I
SD
= -6.0A, V
GS
= 0V
(Figure 13)
T
J
= 150
o
C, I
SD
= -6.0A, dI
SD
/dt = 100A/
µ
s
T
J
= 150
o
C, I
SD
= -6.0A, dI
SD
/dt = 100A/
µ
s
-
-
-
-
230
1.3
-1.5
-
-
V
ns
µ
C
2. Pulse test: pulse width
≤
300
µ
s, duty cycle
≤
2%.
3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3).
4. V
DD
= 25V, starting T
J
= 25
o
C, L = 15.4mH, R
G
= 25Ω, peak I
AS
= 6.0A.
Typical Performance Curves
1.2
POWER DISSIPATION MULTIPLIER
1.0
0.8
Unless Otherwise Specified
6.0
I
D
, DRAIN CURRENT (A)
4.8
3.6
0.6
0.4
2.4
0.2
0.0
0
25
50
75
100
T
A
, CASE TEMPERATURE (
o
C)
125
150
1.2
0
25
50
75
100
125
150
T
C
, CASE TEMPERATURE (
o
C)
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
Z
θJC
, NORMALIZED TRANSIENT
THERMAL IMPEDANCE
1
0.5
P
DM
0.2
0.1
0.1
0.05
0.02
0.01
SINGLE PULSE
0.01
10
-5
t
1
t
2
NOTES:
DUTY FACTOR: D = t
1
/t
2
PEAK T
J
= P
DM
x Z
θJC
x R
θJC
+ T
C
10
-3
10
-2
10
-1
1
10
10
-4
t
1
, RECTANGULAR PULSE DURATION (s)
FIGURE 3. NORMALIZED TRANSIENT THERMAL IMPEDANCE
©2002 Fairchild Semiconductor Corporation
IRF9520 Rev. B
IRF9520
Typical Performance Curves
Unless Otherwise Specified
(Continued)
-10
10µs
-8
I
D
, DRAIN CURRENT (A)
10
100µs
I
D
, DRAIN CURRENT (A)
V
GS
= -10V
V
GS
= -9V
V
GS
= -8V
1ms
OPERATION IN THIS AREA
IS LIMITED BY r
DS(ON)
-6
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX.
V
GS
= -7V
1
10ms
100ms
DC
-4
V
GS
= -6V
-2
T
C
= 25
o
C
T
J
= MAX RATED
0.1
1
10
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
100
V
GS
= -5V
V
GS
= -4V
0
0
-10
-20
-30
-40
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
-50
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA
FIGURE 5. OUTPUT CHARACTERISTICS
-5
V
GS
= -8V
V
GS
= -9V
-3
V
GS
= -10V
V
GS
= -6V
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX.
V
GS
= -5V
-1
V
GS
= -4V
0
0
-2
-3
-4
-1
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
-5
V
GS
= -7V
I
D(ON)
, ON-STATE DRAIN CURRENT (A)
-10
I
D
, DRAIN CURRENT (A)
-4
V
DS
≥
I
D(ON)
x r
DS(ON)
MAX
PULSE DURATION = 80µs
-8 DUTY CYCLE = 0.5% MAX.
T
J
= 125
o
C
-6
T
J
= 25
o
C
T
J
= -55
o
C
-2
-4
-2
0
0
-2
-4
-6
-8
V
GS
, GATE TO SOURCE VOLTAGE (V)
-10
FIGURE 6. SATURATION CHARACTERISTICS
FIGURE 7. TRANSFER CHARACTERISTICS
2.0
NORMALIZED DRAIN TO SOURCE
ON RESISTANCE
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX.
r
DS(ON)
, DRAIN TO SOURCE
ON RESISTANCE (Ω)
1.6
2.2
V
GS
= -10V, I
D
= -4A
PULSE DURATION = 80µs
1.8 DUTY CYCLE = 0.5% MAX.
1.2
V
GS
= -10V
0.8
1.4
1.0
0.4
V
GS
= -20V
0.6
0
0.2
0
-5
-10
-15
I
D
, DRAIN CURRENT (A)
-20
-25
-40
0
40
80
120
T
J
, JUNCTION TEMPERATURE (
o
C)
FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE
VOLTAGE AND DRAIN CURRENT
FIGURE 9. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
©2002 Fairchild Semiconductor Corporation
IRF9520 Rev. B
IRF9520
Typical Performance Curves
1.25
I
D
= 250µA
NORMALIZED DRAIN TO SOURCE
BREAKDOWN VOLTAGE
1.15
C, CAPACITANCE (pF)
400
C
ISS
300
C
OSS
Unless Otherwise Specified
(Continued)
500
V
GS
= 0V, f = 1MHz
C
ISS
= C
GS
+ C
GD
C
RSS
= C
GD
C
OSS
≈
C
DS
+ C
GD
1.05
0.95
200
0.85
100
C
RSS
0.75
-40
0
40
80
120
160
0
0
-10
-20
-30
-40
-50
T
J
, JUNCTION TEMPERATURE (
o
C)
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
3
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX.
g
fs
, TRANSCONDUCTANCE (S)
I
SD
, DRAIN CURRENT (A)
-100
2
T
J
= -55
o
C
T
J
= 25
o
C
1
T
J
= 125
o
C
-10
T
J
= 150
o
C
-1.0
T
J
= 25
o
C
0
0
-2
-4
-6
I
D
, DRAIN CURRENT (A)
-8
-10
-0.1
-0.4
-0.6
-0.8
-1.0
-1.2
-1.4
-1.6
-1.8
V
SD
, SOURCE TO DRAIN VOLTAGE (V)
FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT
FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE
0
I
D
= -6A
V
GS
, GATE TO SOURCE (V)
-5
V
DS
= -80V
-10
V
DS
= -50V
V
DS
= -20V
0
4
8
12
16
20
Q
g(TOT)
, TOTAL GATE CHARGE (nC)
FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE
©2002 Fairchild Semiconductor Corporation
IRF9520 Rev. B
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