FemtoClock™ Crystal/LVCMOS-to-3.3V,
2.5V LVPECL Frequency Synthesizer
ICS843001I-22
DATA SHEET
General Description
The ICS843001I-22 is a a highly versatile, low
phase noise LVPECL/LVCMOS Synthesizer which can
HiPerClockS™
generate low jitter reference clocks for a variety of
communications applications and is a member of the
HiPerClocks
TM
family of high performance clock
solutions from IDT. The dual crystal interface allows the synthesizer
to support up to two communication standards in a given application
(i.e. 1GB Ethernet with a 25MHz crystal and 1Gb Fibre Channel
using a 26.5625MHz crystal). The rms phase jitter performance is
typically less than 1ps, thus making the device acceptable for use in
demanding applications such as OC48 SONET and 10Gb Ethernet.
The ICS843001I-22 is packaged in a small 24-pin TSSOP package.
Features
•
•
•
•
•
•
•
•
•
One 3.3Vdifferential LVPECL output pair and
one LVCMOS/LVTTL single-ended reference clock output
Selectable crystal oscillator interface
or LVCMOS/LVTTL single-ended input
VCO range: 490MHz – 640MHz
Output frequency range: 49MHz – 640MHz
Supports the following applications:
SONET, Ethernet, Fibre Channel, Serial ATA, and HDTV
RMS phase jitter @ 125MHz (1.875MHz - 20MHz):
0.50ps (typical)
Full 3.3V or 2.5V supply mode
-40°C to 85°C ambient operating temperature
Available in both standard (RoHS 5) and lead-free (RoHS 6)
package
ICS
Control Input Function Table
Input
OE
0
1
FLOAT
Q/nQ
High-Impedance
High-Impedance
Active
Outputs
REF_OUT
High-Impedance
Active
High-Impedance
Pin Assignment
V
CCO_LVCMOS
N0
N1
N2
V
CCO_LVPECL
Q
nQ
V
EE
V
CCA
V
CC
XTAL_OUT1
XTAL_IN1
Block Diagram
3
N2:N0
SEL0
Pulldown
SEL1
Pulldown
N
XTAL_IN0
000
÷1
÷2
÷3
÷4
(default)
÷5
÷6
÷8
÷10
Q
nQ
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
REF_OUT
V
EE
OE
M2
M1
M0
MR
SEL1
SEL0
CLK
XTAL_IN0
XTAL_OUT0
ICS843001I-22
24-Lead TSSOP
4.4mm x 7.8mm x 0.925mm
package body
G Package
Top View
OSC
XTAL_OUT0
XTAL_IN1
00
11
001
010
011
100
101
110
111
OSC
XTAL_OUT1
CLK
Pulldown
01
Phase
Detector
VCO
490MHz-640MHz
10
01
00
10
000
001
010
011
100
101
M
÷18
÷22
÷24
÷25
÷32
(default)
÷40
MR
Pulldown
M2:M0
3
REF_CLK
OE
Pullup/Pulldown
ICS843001AGI-22 REVISION B JUNE 25, 2009
1
©2009 Integrated Device Technology, Inc.
ICS843001I-22 Data Sheet
FEMTOCLOCK™ CRYSTAL/LVCMOS-TO-3.3V, 2.5V LVPECL FREQUENCY SYNTHESIZER
Table 1. Pin Descriptions
Number
1
2, 3
4
5
6, 7
8, 23
9
10
11,
12
13,
14
15
16, 17
Name
V
CCO_LVCMOS
N0, N1
N2
V
CCO_LVPECL
Q, nQ
V
EE
V
CCA
V
CC
XTAL_OUT1,
XTAL_IN1
XTAL_OUT0,
XTAL_IN0
CLK
SEL0, SEL1
Power
Input
Input
Power
Output
Power
Power
Power
Input
Input
Input
Input
Pulldown
Pulldown
Pullup
Pulldown
Type
Description
Output supply pin for REF_CLK output.
Output divider select pins. Default ÷4. LVCMOS/LVTTL interface levels.
See Table 3C.
Output supply pin for LVPECL output.
Differential output pair. LVPECL interface levels.
Negative supply pins.
Analog supply pin.
Core supply pin.
Parallel resonant crystal interface.
XTAL_OUT1 is the output, XTAL_IN1 is the input.
Parallel resonant crystal interface.
XTAL_OUT0 is the output, XTAL_IN0 is the input.
LVCMOS/LVTTL clock input.
Input MUX select pins. LVCMOS/LVTTL interface levels. See Table 3D.
Active HIGH Master Reset. When logic HIGH, the internal dividers are reset
causing the true output Q to go low and the inverted output nQ to go high.
When logic LOW, the internal dividers and the outputs are enabled.
LVCMOS/LVTTL interface levels.
Feedback divider select pins. Default value = ÷32. See Table 3B.
LVCMOS/LVTTL interface levels.
3-State clock output enable, (High/Low/Float). See page 1,
Control Input Function
Table.
Reference clock output. LVCMOS/LVTTL interface levels.
18
MR
Input
Pulldown
19, 20
21
22
24
M0, M1
M2
OE
REF_OUT
Input
Input
Input
Output
Pulldown
Pullup
NOTE:
Pullup and Pulldown
refer to internal input resistors. See Table 2,
Pin Characteristics,
for typical values.
Table 2. Pin Characteristics
Symbol
C
IN
R
PULLUP
R
PULLDOWN
R
OUT
Parameter
Input Capacitance
Input Pullup Resistor
Input Pulldown Resistor
Output Impedance
REF_OUT
Test Conditions
Minimum
Typical
4
51
51
15
Maximum
Units
pF
k
Ω
k
Ω
Ω
ICS843001AGI-22 REVISION B JUNE 25, 2009
2
©2009 Integrated Device Technology, Inc.
ICS843001I-22 Data Sheet
FEMTOCLOCK™ CRYSTAL/LVCMOS-TO-3.3V, 2.5V LVPECL FREQUENCY SYNTHESIZER
Function Tables
Table 3A. Common Configuration Table
Input
Reference Clock (MHz)
27
22.4
24.75
25
14.8351649
19.44
19.44
19.44
19.44
19.53125
20
25
25
25
25
25
26.5625
26.5625
26.5625
31.25
M Divider
Value
22
25
24
24
40
32
32
32
32
32
25
25
25
24
24
24
24
24
24
18
N Divider
Value
8
8
8
3
8
4
8
1
2
4
2
5
10
6
4
8
6
3
4
3
Output Frequency
(MHz)
74.25
70
74.25
200
74.1758245
155.52
77.76
622.08
311.04
156.25
250
125
62.5
100
150
75
106.25
212.5
159.375
187.5
HDTV
Processor
HDTV
SONET
SONET
SONET
SONET
10 GigE
Ethernet
1 GigE
1 GigE
PCI Express
SATA
SATA
Fibre Channel 1
4 Gig Fibre Channel
10 Gig Fibre Channel
12 GigE
VCO (MHz)
594
560
594
600
593.4066
622.08
622.08
622.08
622.08
625
500
625
625
600
600
600
637.5
637.5
637.5
562.5
Application
HDTV
Table 3B. Programmable M Output Divider Function Table
Inputs
M2
0
0
0
0
1
1
M1
0
0
1
1
0
0
M0
0
1
0
1
0
1
M Divider
Value
18
22
24
25
32
40
Input Frequency (MHz)
Minimum
27.22
22.27
20.41
19.6
15.31
12.25
Maximum
35.56
29.09
26.67
25.6
20
16
ICS843001AGI-22 REVISION B JUNE 25, 2009
3
©2009 Integrated Device Technology, Inc.
ICS843001I-22 Data Sheet
FEMTOCLOCK™ CRYSTAL/LVCMOS-TO-3.3V, 2.5V LVPECL FREQUENCY SYNTHESIZER
Table 3C. Programmable N Output DividerFunction Table
Inputs
N2
0
0
0
0
1
1
1
1
N1
0
0
1
1
0
0
1
1
N0
0
1
0
1
0
1
0
1
M Divider
Value
1
2
3
4 (default)
5
6
8
10
Table 3D. Bypass Mode Function Table
Inputs
SEL1
0
0
1
1
SEL0
0
1
0
1
Reference
XTAL0
XTAL1
CLK
CLK
PLL Mode
Active
Active
Active
Bypass
ICS843001AGI-22 REVISION B JUNE 25, 2009
4
©2009 Integrated Device Technology, Inc.
ICS843001I-22 Data Sheet
FEMTOCLOCK™ CRYSTAL/LVCMOS-TO-3.3V, 2.5V LVPECL FREQUENCY SYNTHESIZER
Absolute Maximum Ratings
NOTE: Stresses beyond those listed under
Absolute Maximum Ratings
may cause permanent damage to the device.
These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond
those listed in the
DC Characteristics or AC Characteristics
is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect product reliability.
Item
Supply Voltage, V
CC
Inputs, V
I
Outputs, I
O
(LVPECL)
Continuous Current
Surge Current
Outputs, V
O
(LVCMOS)
Package Thermal Impedance,
θ
JA
Storage Temperature, T
STG
Rating
4.6V
-0.5V to V
CC
+ 0.5V
50mA
100mA
-0.5V to V
CCO_LVCMOS
+ 0.5V
70°C/W (0 mps)
-65°C to 150°C
DC Electrical Characteristics
Table 4A. Power Supply DC Characteristics,
V
CC
= V
CCO_LVCMOS
= V
CCO_LVPECL
= 3.3V ± 10%, V
EE
= 0V,
T
A
= -40°C to 85°C
Symbol
V
CC
V
CCA
V
CCO_PECL,
V
CCO_CMOS
I
EE
I
CCO_LVPECL +
I
CCO_LVCMOS
Parameter
Core Supply Voltage
Analog Supply Voltage
Output Supply Voltage
Power Supply Current
Output Supply Current
Test Conditions
Minimum
2.97
2.97
2.97
Typical
3.3
3.3
3.3
Maximum
3.63
3.63
3.63
160
8
Units
V
V
V
mA
mA
Table 4B. Power Supply DC Characteristics,
V
CC
= V
CCO_LVCMOS
= V
CCO_LVPECL
= 2.5V ± 5%, V
EE
= 0V,
T
A
= -40°C to 85°C
Symbol
V
CC
V
CCA
V
CCO_PECL,
V
CCO_CMOS
I
EE
I
CCO_LVPECL +
I
CCO_LVCMOS
Parameter
Core Supply Voltage
Analog Supply Voltage
Output Supply Voltage
Power Supply Current
Output Supply Current
Test Conditions
Minimum
2.375
2.375
2.375
Typical
2.5
2.5
2.5
Maximum
2.625
2.625
2.625
155
8
Units
V
V
V
mA
mA
ICS843001AGI-22 REVISION B JUNE 25, 2009
5
©2009 Integrated Device Technology, Inc.
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