19-2717; Rev 1; 7/03
KIT
ATION
EVALU
E
BL
AVAILA
Compact 155Mbps to 3.2Gbps
Limiting Amplifier
General Description
Features
o
SFP Reference Design Available
o
16-Pin QFN Package with 3mm
✕
3mm Footprint
o
Single +3.3V Supply Voltage
o
86ps Rise and Fall Time
o
Loss of Signal with Programmable Threshold
o
RSSI Interface (with MAX3744 TIA)
o
Output Disable
o
Polarity Select
o
8.5ps
P-P
Deterministic Jitter (3.2Gbps)
MAX3748/MAX3748A
The MAX3748/MAX3748A multirate limiting amplifier func-
tions as a data quantizer for SONET, Fibre Channel, and
Gigabit Ethernet optical receivers. The amplifier accepts
a wide range of input voltages and provides constant-
level current-mode logic (CML) output voltages with con-
trolled edge speeds.
A received-signal-strength indicator (RSSI) is available
when the MAX3748/MAX3748A is combined with the
MAX3744 SFP transimpedance amplifier (TIA). A receiver
consisting of the MAX3744* and the MAX3748/
MAX3748A can provide up to 19dB RSSI dynamic range.
Additional features include a programmable loss-of-signal
(LOS) detect, an optional disable function (DISABLE),
and an output signal polarity reversal (OUTPOL). Output
disable can be used to implement squelch.
The combination of the MAX3748/MAX3748A and the
MAX3744 allows for the implementation of all the small-
form-factor SFF-8472 digital diagnostic specifications
using a standard 4-pin TO-46 header. The MAX3748/
MAX3748A is packaged in a 3mm
✕
3mm 16-pin QFN
package with an exposed pad.
*Future
product—contact factory for availability.
Ordering Information
PART
MAX3748ETE
MAX3748AETE
TEMP RANGE
-40°C to +85°C
-40°C to +85°C
PIN-
PACKAGE
16 QFN-EP*
16 QFN-EP*
PACKAGE
CODE
T1633-3
T1633-3
*EP
= Exposed pad.
Functional Diagram and Pin Configuration appear at end of
data sheet.
Applications
Gigabit Ethernet SFF/SFP Transceiver Modules
Fibre Channel SFF/SFP Transceiver Modules
Multirate OC-3 to OC-48-FEC SFF/SFP
Transceiver Modules
Typical Operating Circuits
SFP OPTICAL RECEIVER
SUPPLY FILTER
HOST BOARD
HOST FILTER
V
CC
_RX
OUTPOL
V
CC
CAZ1
CAZ2
4-PIN TO HEADER
0.1µF
0.1µF
IN+
MAX3744 TIA*
OUT+
0.1µF
50Ω
SERDES
50Ω
IN-
OUT-
MAX3748/
MAX3748A
RSSI
DS1858
3-INPUT DIAGNOSTIC
MONITOR
R1
3kΩ
C1
0.1µF
TH
R
TH
GND
DISABLE
LOS
4.7kΩ TO 10kΩ
V
CC
_HOST
LOS
*FUTURE PRODUCT.
Typical Operating Circuits continued at end of data sheet.
________________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Compact 155Mbps to 3.2Gbps
Limiting Amplifier
MAX3748/MAX3748A
ABSOLUTE MAXIMUM RATINGS
Power-Supply Voltage (V
CC
) .................................-0.5V to +6.0V
Voltage at IN+, IN- ..........................(V
CC
- 2.4V) to (V
CC
+ 0.5V)
Voltage at DISABLE, OUTPOL, RSSI,
CAZ1, CAZ2, LOS, TH............................-0.5V to (V
CC
+ 0.5V)
Current into LOS ...................................................-1mA to +9mA
Differential Input Voltage (IN+ - IN-) .....................................2.5V
Continuous Current at CML Outputs
(OUT+, OUT-) ...............................................-25mA to +25mA
Continuous Power Dissipation (T
A
= +70°C)
16-Pin QFN (derate 17.7mW above +70°C) ....................1.4W
Operating Junction Temperature Range (T
J
) ....-55°C to +150°C
Storage Ambient Temperature Range (T
s
)........-55°C to +150°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
CC
= 2.97V to 3.63V, ambient temperature = -40°C to +85°C, CML output load is 50Ω to V
CC
, C
AZ
= 0.1µF, typical values are at
+25°C, V
CC
= 3.3V, unless otherwise specified. The data input transition time is controlled by a 4th-order Bessel filter with f
-3dB
=
0.75
✕
2.667GHz for all data rates of 2.667Gbps and below, and with f
-3dB
= 0.75
✕
3.2GHz for a data rate of 3.2Gbps.)
PARAMETER
Single-Ended Input Resistance
Input Return Loss
Input Sensitivity
Input Overload
Single-Ended Output Resistance
Output Return Loss
Differential Output Voltage
Differential Output Signal when
Disabled
Outputs AC-coupled, V
IN-MAX
applied to
input (Note 2)
K28.5 pattern at 3.2Gbps
Deterministic Jitter
(Notes 2, 3)
DJ
2 - 1 PRBS equivalent pattern at 2.7Gbps
(Note 4)
K28.5 pattern at 2.1Gbps
2 - 1 PRBS equivalent pattern at 155Mbps
Random Jitter
(Note 5)
Data Output Transition Time
Input-Referred Noise
Low-Frequency Cutoff
Power-Supply Current
Power-Supply Noise Rejection
LOS Hysteresis
LOS Assert/Deassert Time
Low LOS Assert Level
Low LOS Deassert Level
Medium LOS Assert Level
I
CC
PSNR
C
AZ
= open
C
AZ
= 0.1µF
(Note 6)
LOS disabled
f < 2MHz
10log (V
DEASSERT
/V
ASSERT
)
(Note 8)
R
TH
= 20kΩ
R
TH
= 20kΩ
R
TH
= 280Ω
10.3
1.25
2
2.8
4.1
6.7
15.2
11.6
26
2.2
100
Input = 5mV
P-P
Input = 10mV
P-P
20% to 80% (Note 2)
23
23
SYMBOL
CONDITIONS
Single ended to V
CC
Differential, f < 3GHz, DUT is powered on
MIN
42
TYP
50
13
MAX
58
5
UNITS
Ω
dB
mV
P-P
mV
P-P
Ω
dB
mV
P-P
mV
P-P
V
IN-MIN
V
IN-MAX
(Note 1)
(Note 1)
Single ended to V
CC
Differential, f < 3GHz, DUT is powered on
600
1200
42
50
10
780
58
1200
10
8.5
9.3
7.8
25
6.5
3
86
185
70
0.8
32
25
30
25
50
ps
RMS
115
ps
µV
RMS
kHz
49
37
mA
dB
dB
µs
mV
P-P
mV
P-P
mV
P-P
ps
P-P
LOSS OF SIGNAL at 2.5Gbps
(Notes 2, 7)
2
_______________________________________________________________________________________
Compact 155Mbps to 3.2Gbps
Limiting Amplifier
ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= 2.97V to 3.63V, ambient temperature = -40°C to +85°C, CML output load is 50Ω to V
CC
, C
AZ
= 0.1µF, typical values are at
+25°C, V
CC
= 3.3V, unless otherwise specified. The data input transition time is controlled by a 4th-order Bessel filter with f
-3dB
=
0.75
✕
2.667GHz for all data rates of 2.667Gbps and below, and with f
-3dB
= 0.75
✕
3.2GHz for data rate of 3.2Gbps.)
PARAMETER
Medium LOS Deassert Level
High LOS Assert Level
High LOS Deassert Level
LOSS OF SIGNAL at 155Mbps
(Note 7)
LOS Hysteresis
LOS Assert/Deassert Time
Low LOS Assert Level
Low LOS Deassert Level
Medium LOS Assert Level
Medium LOS Deassert Level
High LOS Assert Level
High LOS Deassert Level
RSSI
RSSI Current Gain (Note 9)
Input-Referred RSSI Current
Stability
TTL/CMOS I/O
LOS Output High Voltage
LOS Output Low Voltage
LOS Output Current
DISABLE Input High
DISABLE Input Low
DISABLE Input Current
V
IH
V
IL
R
LOS
= 4.7kΩ to 10kΩ to V
CC_host
V
OH
V
OL
R
LOS
= 4.7kΩ to10kΩ to V
CC_host
(3V)
R
LOS
= 4.7kΩ to10kΩ to V
CC_host
(3.6V)
R
LOS
= 4.7kΩ to10kΩ to V
CC_host
(3.3V);
IC is powered down
2.0
0.8
10
2.4
0.4
40
V
V
µA
V
V
µA
A
RSSI
A
RSSI
= I
RSSI
/I
CM_RSSI
I
RSSI
/A
RSSI
(Note 10)
I
CM_INPUT
< 6.6mA
I
CM_INPUT
> 6.6mA
-31
-73
0.03
+33
+90
µA
10log (V
DEASSERT
/V
ASSERT
)
(Note 8)
R
TH
= 20kΩ
R
TH
= 20kΩ
R
TH
= 280Ω
R
TH
= 280Ω
R
TH
= 80Ω
R
TH
= 80Ω
2.1
20
3.5
5.6
13.3
21.2
33.3
55.5
dB
µs
mV
P-P
mV
P-P
mV
P-P
mV
P-P
mV
P-P
mV
P-P
SYMBOL
R
TH
= 280Ω
R
TH
= 80Ω
R
TH
= 80Ω
22.8
CONDITIONS
MIN
TYP
25
38.3
65.2
99.3
MAX
38.6
UNITS
mV
P-P
mV
P-P
mV
P-P
MAX3748/MAX3748A
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
Note 6:
Note 7:
Note 8:
Note 9:
Note 10:
Between sensitivity and overload, all AC specifications are met.
Guaranteed by design and characterization.
The deterministic jitter caused by this filter is not included in the DJ generation specifications (input).
2
23
- 1 PRBS pattern was substituted by K28.5 pattern to determine the high-speed portion of the deterministic jitter. The
low-speed portion of the DJ (baseline wander) was obtained by measuring the eye width difference between outputs gen-
erated using K28.5 and 2
23
- 1 PRBS patterns.
Random jitter was measured without using a filter at the input.
The supply current measurement excludes the CML output currents by connecting the CML outputs to a separate V
CC
(see Figure 1).
Unless otherwise specified, the pattern for all LOS detect specifications is 2
23
- 1 PRBS.
The signal at the input is switched between two amplitudes, Signal_ON and Signal_OFF, as shown in Figure 2.
I
CM_INPUT
is the input common mode. I
RSSI
is the current at the RSSI output.
Stability is defined as variation over temperature and power supply with respect to the typical gain of the part.
_______________________________________________________________________________________
3
Compact 155Mbps to 3.2Gbps
Limiting Amplifier
MAX3748/MAX3748A
Typical Operating Characteristics
(T
A
= +25°C and V
CC
= +3.3V, unless otherwise specified.)
SUPPLY CURRENT
vs. TEMPERATURE
MAX3748 toc01
TRANSFER FUNCTION
MAX3748 toc02
RANDOM JITTER vs. TEMPERATURE
(INPUT LEVEL 10mV
P-P
)
9
8
RANDOM JITTER (ps
RMS
)
7
6
5
4
3
2
1
0
MAX3748 toc03
100
90
80
70
CURRENT (mA)
60
50
40
30
20
10
0
900
800
DIFFERENTIAL OUTPUT (mV
P-P
)
700
600
500
400
300
200
100
0
OUTPUT VOLTAGE vs. INPUT VOLTAGE
10
-40 -30-20 -10 0 10 20 30 40 50 60 70 80 90 100
TEMPERATURE (°C)
1
2
3
4
5
6
-40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100
TEMPERATURE (°C)
DIFFERENTIAL INPUT (mV
P-P
)
RANDOM JITTER
vs. INPUT AMPLITUDE
MAX3748 toc04
BIT-ERROR RATIO vs. INPUT VOLTAGE
MAX3748 toc05
DETERMINISTIC JITTER vs. INPUT
COMMON-MODE VOLTAGE (V
CC
TO V
CC
- 0.8V)
24
DETERMINISTIC JITTER (ps
P-P
)
22
20
18
16
14
12
10
MAX3748 toc06
10
9
8
RANDOM JITTER (ps
RMS
)
7
6
5
4
3
2
1
0
0
10
20
30
1200
1000
BIT-ERROR RATIO (10
-12
)
800
600
400
200
0
40
2.0
2.5
3.0
3.5
4.0
4.5
5.0
-1.0 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0
COMMON-MODE VOLTAGE (V
CC
+ x)
DIFFERENTIAL INPUT AMPLITUDE (mV
P-P
)
INPUT VOLTAGE (mV
P-P
)
OUTPUT EYE DIAGRAM (MINIMUM INPUT)
MAX3748 toc07
OUTPUT EYE DIAGRAM (MAXIMUM INPUT)
MAX3748 toc08
OUTPUT EYE DIAGRAM (MINIMUM INPUT)
MAX3748 toc09
3.2Gbps, 2
23
- 1 PRBS, 5mV
P-P
3.2Gbps, 2
23
- 1 PRBS, 1200mV
P-P
2.7Gbps, 2
23
- 1 PRBS, 5mV
P-P
100mV/div
100mV/div
100mV/div
50ps/div
50ps/div
100ps/div
4
_______________________________________________________________________________________
Compact 155Mbps to 3.2Gbps
Limiting Amplifier
Typical Operating Characteristics (continued)
(T
A
= +25°C and V
CC
= +3.3V, unless otherwise specified.)
MAX3748/MAX3748A
OUTPUT EYE DIAGRAM WITH MAXIMUM INPUT
(DATA RATE OF 2.6667Gbps)
MAX3748 toc10
OUTPUT EYE DIAGRAM AT +100°C
(MINIMUM INPUT)
MAX3748 toc11
ASSERT/DEASSERT LEVELS vs. R
TH
MAX3748 toc12
2.7Gbps, 2
23
- 1 PRBS, 1200mV
P-P
3.2Gbps, 2
23
- 1 PRBS, 5mV
P-P
ASSERT/DEASSERT (mV
P-P
)
100
DEASSERT
100mV/div
100mV/div
10
ASSERT
1
50ps/div
50ps/div
0.01
0.1
1
R
TH
(kΩ)
10
100
INPUT RETURN GAIN vs. FREQUENCY (SDD11)
(INPUT SIGNAL LEVEL = -40dBm)
MAX3748 toc13
OUTPUT RETURN GAIN vs. FREQUENCY (SDD22)
(INPUT SIGNAL LEVEL = -40dBm)
MAX3748 toc14
DETERMINISTIC JITTER vs. INPUT OFFSET VOLTAGE
(2.667Gbps, K28.5)
18
DETERMINISTIC JITTER (ps
P-P
)
16
14
12
10
8
6
4
2
0
MAX3748 toc15
30
20
10
GAIN (dB)
0
-10
-20
-30
-40
100M
OUTPUT
DISABLED
30
20
10
GAIN (dB)
0
-10
-20
-30
-40
100M
20
1G
FREQUENCY (Hz)
10G
1G
FREQUENCY (Hz)
10G
-6
-4
-2
0
2
4
6
INPUT OFFSET VOLTAGE (mV
P-P
)
LOS HYSTERESIS vs. TEMPERATURE
(2.667bps, 2
10
- 1 PRBS)
MAX3748 toc16
RSSI CURRENT GAIN vs. INPUT TIA CURRENT
(MAX3744 AND MAX3748)
MAX3748 toc17
6
10LOG (DEASSERT/ASSERT) (dB)
5
4
3
2
1
0
R
TH
= 280Ω
R
TH
= 20kΩ
R
TH
= 80Ω
700
600
OUTPUT RSSI CURRENT (µA)
500
400
300
200
100
0
-40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100
TEMPERATURE (°C)
0 100 200 300 400 500 600 700 800 900 1000
INPUT TIA CURRENT (µA)
_______________________________________________________________________________________
5
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