19-3251; Rev 0; 4/04
200Mbps SFP Limiting Amplifier
General Description
The MAX3969 limiting amplifier with PECL data outputs is
ideal for low-cost ATM, Fast Ethernet, FDDI and ESCON
fiber optic receivers.
The MAX3969 features 1mV
P-P
input sensitivity and an
integrated power detector that senses the input signal
power. It provides a received-signal-strength indicator
(RSSI), which is an analog indication of the power level.
Signal strength is also indicated by the complementary
TTL loss-of-signal (LOS) outputs and the PECL signal-
detect (SD) output, both of which indicate the power
level relative to a programmable threshold.
The threshold can be adjusted to detect signal ampli-
tudes as low as 2.7mV
P-P
. An optional squelch function
disables switching of the data outputs by holding them
at a known state when the signal is below the pro-
grammed threshold.
The MAX3969 is available in die form and a 4mm x
4mm, 20-pin thin QFN package.
♦
1mV
P-P
Input Sensitivity
♦
Loss-of-Signal Detector with Programmable
Threshold
♦
TTL LOS and PECL Signal Detect
♦
Analog Received-Signal-Strength Indicator
♦
Output Squelch Function
♦
Compatible with 4B/5B Data Coding
Features
MAX3969
Ordering Information
PART
MAX3969ETP
MAX3969E/D**
TEMP RANGE
PIN-
PACKAGE
Dice*
PKG CODE
T2044-2
—
Applications
SFP/SFF Transceivers
Fast Ethernet/FDDI Transceivers
155Mbps LAN ATM Transceivers
ESCON Receivers
FTTx Transceivers
-40°C to +85°C 20 Thin QFN
—
*Dice
are designed to operate over a -40°C to +100°C junction
temperature (T
J
) range, but are tested and guaranteed only at
T
A
= +25°C.
**Future
product—contact factory for availability.
Typical Application Circuits
SFP OPTICAL RECEIVER WITH DIAGNOSTICS
C
AZ
0.027µF
DIAGNOSTIC
MONITOR
CZP
RSSI
V
CC
V
CC
FILT
OUT-
C
IN
0.01µF
SQUELCH
LOS
SD
0.1µF
OUT-
IN
C
FILTER
0.01µF
CZN
FILTER
V
CC
V
CCO
LOS
0.01µF
R
LOS
4.7kΩ
TO
10kΩ
HOST BOARD
V
CC
+2.97V TO +3.63V
IN-
MAX3969
MAX3657
GND
OUT+
C
IN
0.01µF
IN+
INV
R1
100kΩ
V
TH
OUT+
GND
150Ω
R2
0.1µF
150Ω
Typical Application Circuits continued at end of data sheet.
Pin Configuration appears at end of data sheet.
________________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
200Mbps SFP Limiting Amplifier
MAX3969
ABSOLUTE MAXIMUM RATINGS
Power-Supply Voltage Range (V
CC
, V
CCO
) ..........-0.5V to +7.0V
Voltage at FILTER, RSSI, IN+, IN-, CZP, CZN, SQUELCH,
INV, V
TH
..................................................-0.5V to (V
CC
+ 0.5V)
TTL Output Current (LOS,
LOS)
.........................................±9mA
PECL Output Current (OUT+, OUT-, SD) .........................±50mA
Differential Voltage Between CZP and CZN..........-1.5V to +1.5V
Differential Voltage Between IN+ and IN- .............-1.5V to +1.5V
Continuous Power Dissipation (T
A
= +85°C)
20-Pin Thin QFN (derate 16.9mW/°C above +85°C) ....1099mW
Operating Junction Temperature Range (die).....-40°C to +150°C
Die Attach Temperature...................................................+400°C
Storage Temperature Range .............................-50°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
CC
= +2.97V to +5.5V, PECL outputs terminated with 50Ω to V
CC
- 2V, R1 = 100kΩ, T
A
= -40°C to +85°C, unless otherwise noted.
Typical values are at V
CC
= +3.3V, T
A
= +25°C.) (Note 1)
PARAMETER
Supply Current
LOS Hysteresis
Squelch Input Current
PECL Output-Voltage High
PECL Output-Voltage Low
LOS Assert Accuracy
Minimum LOS Assert Input
Maximum LOS Deassert Input
Input Sensitivity
Input Overload
TTL Output High
TTL Output Leakage
TTL Output Low
Data Output Transition Time
Pulse-Width Distortion
LOS, SD Assert/Deassert Time
(Note 4)
(Note 4)
R
LOS
= 4.7kΩ to 10kΩ
(Note 5)
I
OL
= 800µA
20% to 80%, Input > 4mV
P-P
(Note 4)
Input > 4mV
P-P
(Notes 4, 6)
C
FILTER
= 0.01µF
0.35
1500
2.4
3.0
1
0.2
0.8
50
10
20
0.5
1.20
250
143
1
4
(Note 3)
(Note 3)
Input = 7mV
P-P
or 90mV
P-P
, 0°C to +85°C
Input = 7mV
P-P
or 90mV
P-P
, -40°C to +85°C
-1085
-1830
-3.0
-3.6
CONDITIONS
PECL outputs open
Input = 4.0mV
P-P
(Note 2)
3.0
MIN
TYP
22
5
27
MAX
45
8.0
100
-880
-1550
+3.0
+3.6
2.7
UNITS
mA
dB
µA
mV
mV
dB
dB
mV
P-P
mV
P-P
mV
P-P
mV
P-P
V
µA
V
ns
ps
µs
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
Note 6:
Dice are tested and guaranteed only at T
A
= +25°C.
LOS hysteresis = 20log(V
LOS-DEASSERT
/ V
LOS-ASSERT
).
Relative to supply voltage (V
CCO
).
AC characteristics are guaranteed by design and characterization.
Input < LOS threshold (LOS = HIGH), V
LOS
= 2.4V.
Pulse-width distortion = [(width of wider pulse) - (width of narrower pulse)] / 2, measured with 100Mbps 1-0 pattern.
2
_______________________________________________________________________________________
200Mbps SFP Limiting Amplifier
MAX3969
Typical Operating Characteristics
(V
CC
= +3.3V, PECL outputs terminated with 50Ω to V
CC
- 2V, R1 = 100kΩ, T
A
= +25°C, unless otherwise noted.)
SUPPLY CURRENT vs. TEMPERATURE
(PECL OUTPUTS OPEN)
55
50
45
40
35
30
25
20
15
10
5
0
-40
-15
10
35
60
85
1ns/div
1ns/div
AMBIENT TEMPERATURE (°C)
MAX3969 toc01
OUTPUT EYE DIAGRAM
(V
IN
= 2mV
P-P
, 155Mbps, 2
23
- 1 PRBS)
MAX3969 toc02
OUTPUT EYE DIAGRAM
(V
IN
= 1500mV
P-P
, 155Mbps, 2
23
- 1 PRBS)
MAX3969 toc03
60
SUPPLY CURRENT (mA)
200mV/div
200mV/div
TRANSFER FUNCTION
MAX3969 toc04
BIT ERROR RATIO vs. DIFFERENTIAL
INPUT VOLTAGE
MAX3969 toc05
RSSI VOLTAGE vs. DIFFERENTIAL
INPUT VOLTAGE
2.80
2.60
2.40
V
RSSI
(V)
2.20
2.00
1.80
1.60
1.40
1.20
1.00
LOS HIGH
LOS LOW
155Mbps
2
23
- 1 PRBS
RSSI LOAD > 10kΩ
MAX3969 toc06
1800
DIFFERENTIAL OUTPUT VOLTAGE (mV
P-P
)
1600
1400
1200
1000
800
10-03
10-04
10-05
BIT ERROR RATIO
10-06
10-07
10-08
10-09
10-10
10-11
155Mbps
2
23
- 1 PRBS
3.00
600
0.01
0.1
1
10
100
1000 10,000
DIFFERENTIAL INPUT VOLTAGE (mV
P-P
)
10-12
0
0.1
0.3 0.4 0.5 0.6 0.7
DIFFERENTIAL INPUT VOLTAGE (mV
P-P
)
0.2
0.8
1
10
100
1000
DIFFERENTIAL INPUT VOLTAGE (mV
P-P
)
RSSI VOLTAGE vs. TEMPERATURE
(LOS LOW, RSSI LOAD > 10kΩ)
MAX3969 toc07
POWER-DETECT THRESHOLD vs. R2
(R1 = 100kΩ)
MAX3969 toc08
LOSS-OF-SIGNAL HYSTERESIS
vs. TEMPERATURE
9
20log (V
DEASSERT
/ V
ASSERT
) (dB)
8
7
6
5
4
3
2
1
0
-40
-15
10
35
60
85
R2 = 10kΩ
R2 = 50kΩ
155Mbps
2
23
-1 PRBS
MAX3969 toc09
2.3
2.2
2.1
2.0
V
RSSI
(V)
1.9
1.8
1.7
1.6
1.5
1.4
-40
-20
0
20
40
60
80
INPUT = 10mV
P-P
INPUT = 5mV
P-P
INPUT = 50mV
P-P
INPUT = 100mV
P-P
1000
DIFFERENTIAL INPUT VOLTAGE (mV
P-P
)
10
100
SD HIGH/
LOS LOW
10
SD LOW/
LOS HIGH
155Mbps
2
23
- 1 PRBS
1
10 20 30 40 50 60 70 80 90 100 110 120
R2 (kΩ)
100
AMBIENT TEMPERATURE (°C)
AMBIENT TEMPERATURE (°C)
_______________________________________________________________________________________
3
200Mbps SFP Limiting Amplifier
MAX3969
Typical Operating Characteristics (continued)
(V
CC
= +3.3V, PECL outputs terminated with 50Ω to V
CC
- 2V, R1 = 100kΩ, T
A
= +25°C, unless otherwise noted.)
POWER-DETECT TIMING WITH SQUELCH
(INPUT = 12mV
P-P
, C
FILTER
= 0.01µF,
R2 = 15kΩ, 155Mbps, 2
23
- 1 PRBS)
MAX3969 toc10
PULSE-WIDTH DISTORTION
vs. DIFFERENTIAL INPUT VOLTAGE
90
PULSE-WIDTH DISTORTION (ps)
80
70
60
50
40
30
20
10
0
UNFILTERED
INPUT DATA
INPUT DATA THROUGH
117MHz FILTER
100Mbps
1-0 PATTERN
MAX3969 toc11
DATA OUTPUT TRANSITION TIME
vs. TEMPERATURE
1.4
TRANSITION TIME (ns)
1.2
1.0
0.8
0.6
0.4
0.2
0
-40
-15
10
35
60
85
MAX3969 toc12
100
1.6
IN
OUT
LOS
SD
10µs/div
1
10
100
1000
10,000
DIFFERENTIAL INPUT VOLTAGE (mV
P-P
)
AMBIENT TEMPERATURE (°C)
Pin Description
PIN
1
NAME
INV
FUNCTION
Inverting Input of Internal Op Amp that Sets Power-Detect Threshold Voltage (Figure 1). Connect a
resistor from V
TH
to INV (R2), and from INV to ground (R1 = 100kΩ), to program the desired threshold
voltage.
Filter Output of Logarithmic Full-Wave Detectors (FWDs). The FWD outputs are summed together at
FILTER to generate the RSSI output. Connect a capacitor from FILTER to V
CC
for proper operation.
Received-Signal-Strength Indicator Output. The voltage at RSSI indicates the input-signal power. The
RSSI output is reduced approximately 120mV when LOS is asserted.
Inverting Data Input
Noninverting Data Input
Ground
Autozero Capacitor Input. Connect a 0.027µF capacitor between CZP and CZN.
Autozero Capacitor Input. Connect a 0.027µF capacitor between CZP and CZN.
Output-Buffer Supply Voltage. Connect to the same potential as V
CC
.
Noninverting PECL Data Output. Terminate with 50Ω to (V
CC
- 2V).
Inverting PECL Data Output. Terminate with 50Ω to (V
CC
- 2V).
Signal Detect, PECL Output. The SD output is high when input power is above the power-detect
threshold, and low when input power is below the power-detect threshold. This pin is PECL-
compatible and should be terminated with 50Ω to (V
CC
- 2V) or equivalent.
Loss-of-Signal Output, TTL Open Collector (with ESD Protection). The LOS output is high when input
power is below the power-detect threshold, and low when input power is above the power-detect
threshold.
Inverted Loss-of-Signal Output, TTL Open Collector (with ESD Protection). The
LOS
output is low
when input power is below the power-detect threshold, and high when input power is above the
power-detect threshold.
2
3
4
5
6 , 7, 8
9
10
11
12
13
14
FILTER
RSSI
IN-
IN+
GND
CZP
CZN
V
CCO
OUT+
OUT-
SD
15
LOS
16
LOS
4
_______________________________________________________________________________________
200Mbps SFP Limiting Amplifier
Pin Description
PIN
17, 18
19
NAME
V
CC
SQUELCH
Supply Voltage
Squelch Input. The squelch function disables the data outputs by forcing OUT- low and OUT+ high
when the signal is below the power-detect threshold. Connect to GND or leave unconnected to
disable squelch. Connect to V
CC
to enable squelch.
Output of Internal Op Amp that Sets Power-Detect Threshold Voltage (Figure 1). Connect a resistor
from V
TH
to INV (R2) and from INV to ground (R1 = 100kΩ), to program the desired threshold voltage.
Ground. The exposed pad must be soldered to the circuit board ground for proper thermal and
electrical performance.
FUNCTION
MAX3969
20
EP
V
TH
Exposed
Pad
C
AZ
CZP
CZN
V
CC
V
CCO
OFFSET
CORRECTION
C
IN
IN-
IN+
C
IN
V
CC
FILTER
C
FILTER
1.2V
REFERENCE
1
MAX3969
1
O
PECL
OUT-
OUT+
SQUELCH
FWD
FWD
FWD
TTL
RSSI
LOS
LOS
PECL
SD
R1
100k
Ω
INV
R2
V
TH
GND
Figure 1. Functional Diagram
Detailed Description
The MAX3969 contains a series of limiting amplifiers
and power detectors, offset correction, data-squelch
circuitry, TTL buffers for LOS outputs, and PECL output
buffers for signal detect (SD) and data outputs. See
Figure 1 for the functional diagram.
Gain Stages and Offset Correction
A cascade of limiting amplifiers provides approximately
65dB of combined small-signal gain. The large gain
makes the amplifier susceptible to small DC offsets in
the signal path. To correct DC offsets, the amplifier has
an internal feedback loop that acts as a DC autozero
circuit. By correcting the DC offsets, the limiting amplifi-
er sensitivity and power-detector accuracy are
improved.
The offset correction is optimized for data streams with
a 50% duty cycle. A different average duty cycle results
in increased pulse-width distortion and loss of sensitivi-
ty. The offset-correction circuitry is less sensitive to vari-
ations of input duty cycle (for example, the 40% to 60%
duty cycle encountered in 4B/5B coding) when the
input is less than 30mV
P-P
.
The data inputs must be AC-coupled for the offset cor-
rection loop to function properly. Differential input
impedance is >5kΩ.
5
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