XC612
Series
2-Channel Voltage Detectors
ETR0204_002
■GENERAL
DESCRIPTION
The XC612 series consist of 2 voltage detectors, in 1 mini-molded, SOT-25 package.
The series provides accuracy and low power consumption through CMOS processing and laser trimming and consists of a
highly accurate voltage reference source, 2 comparators, hysteresis and output driver circuits.
The input (V
IN1
) for voltage detector 1 (V
D1
) dually functions as the power supply pin for both detector 1 (V
D1
) and detector 2
(V
D2
).
■APPLICATIONS
●Microprocessor
reset circuitry
●Memory
battery back-up circuits
●Power-on
reset circuits
●Power
failure detection
●System
battery life and charge voltage monitors
●Delay
circuitry
■FEATURES
: ±2%
: 2.0μA(TYP.)
(V
IN1
=V
IN2
=2.0V, Static state)
Detect Voltage
: 1.5V ~ 5.0V programmable in
100mV steps. Detector’s voltages can
be set-up independently
Conditionaly;
XC612N : V
DET1
>V
DET2
XC612D, XC612E : V
DET1
>V
DET2
,
V
DET1
<V
DET2
Operating Voltage Range
: 1.5V ~ 10.0V
Temperature Characteristics
:
±100ppm/℃
(TYP.)
Output Configuration
: N-channel open drain,CMOS
Operating Ambient Temperature
: -40℃~＋85℃
Packages
: SOT-25, USP-6B
Environmentally Friendly
: EU RoHS Compliant, Pb Free
Detect voltage accuracy
Low Power Consumption
■TYPICAL
APPLICATION CRICUIT
■TYPICAL
PERFORMANCE
CHARACTERISTICS
1/15
XC612
Series
■PIN
CONFIGURATION
●SOT-25
●USP-6B
V
IN2
NC
V
DET2
V
SS
V
IN1
* The dissipation pad for the USP-6B package should be
masking to enhance mounting strength and heat release. If the
pad needs to be connected to other pins, it should be connected
to the V
IN
level.
V
DET1
solder-plated in recommended mount pattern and metal
■PIN
ASSIGNMENT
PIN NUMBER
SOT-25
1
2
3
4
5
-
USP-6B
3
2
1
6
4
5
PIN NAME
V
DET1
V
IN1
V
SS
V
IN2
V
DET2
NC
FUNCTION
Voltage Detector 1 Output
Detector 1 Input, Power Supply
Ground
Voltage Detector 2 Input
Voltage Detector 2 Output
No Connect
■PRODUCT
CLASSIFICATION
●Selection
Guide
TYPE
XC612N
XC612D
XC612E
V
DET1
N-ch Open Drain
N-ch Open Drain
CMOS
V
DET2
N-ch Open Drain
CMOS
N-ch Open Drain
●Ordering
Information
XC612①②③④⑤⑥⑦
DESIGNATOR
①
ITEM
Type
Detect voltage
(V
DET1
)
Detect Voltage
(V
DET2
)
Packages
(Order Unit)
SYMBOL
N
D
E
②③
④⑤
15½50
15½50
MR
⑥⑦-⑧
MR-G
DR
DR-G
(*1)
DESCRIPTION
Refer to selection guide
V
DET1
e.g. 2.5V→②2,
③5
V
DET2
e.g. 3.3V→②3,
③3
SOT-25(3,000/Reel)
SOT-25(3,000/Reel)
USP-6B(3,000/Reel)
USP-6B(3,000/Reel)
The “-G” suffix indicates that the products are Halogen and Antimony free as well as being fully RoHS compliant.
2/15
XC612
Series
■BLOCK
DIAGRAMS
XC612N Series
XC612D Series
XC612E Series
3/15
XC612
Series
■ABSOLUTE
MAXIMUM RATINGS
Ta = 25℃
PARAMETER
V
IN1
Input Voltage
V
IN2
N
V
IN2
D/E
V
DET1
(Nch open drain)
Output Voltage
V
DET
１
(CMOS)
V
DET2
(Nch open drain)
V
DET2
(CMOS)
Output Current
Power
Dissipation
V
ＤＥＴ１
V
DET2
SOT-25
USP-6B
SYMBOL
V
IN1
V
IN2
V
DET1
V
DET1
V
DET2
V
DET2
I
DET1
I
DET2
Pd
Topr
Tstg
RATINGS
V
SS
-0.3½V
SS
+12
V
SS
-0.3½V
IN1
+0.3
V
SS
-0.3½V
SS
+12
V
SS
-0.3½V
SS
+12
V
SS
-0.3½V
IN1
+0.3≦V
SS
+12
V
SS
-0.3½V
SS
+12
V
SS
-0.3½V
IN1
+0.3≦V
SS
+12
50
50
UNITS
V
V
V
V
V
V
mA
mA
mW
℃
℃
250
120
-40½+85
-55½+125
Operating Ambient Temperature
Storage Temperature
4/15
XC612
Series
■ELECTRICAL
CHARACTERISTICS
Ta=25℃
PARAMETER
Detect Voltage
(V
DET1
)
Detect Voltage
(V
DET2
)
Hysteresis Range 1
SYMBOL
V
DF1
V
DF2
CONDITIONS
Voltage when V
DET1
changes from
H to L following a reduction of V
IN1
Voltage when V
DET2
changes from
H to L following a reduction of V
IN2
Voltage (V
DR1
) - V
DF1
when V
DET1
changes
from L to H following an increase of V
IN1
Voltage (V
DR2
) - V
DF2
when V
DET2
changes
from L to H following an increase of V
IN2
V
IN1
= 1.5V
=2.0V
MIN.
V
DF1(T)
x 0.98
V
DF2(T)
x 0.98
V
DF1
x 0.02
V
DF2
x 0.02
-
-
-
-
-
-
-
-
-
-
1.0
V
IN1
=1.0V
=2.0V
0.3
3.0
5.0
6.0
7.0
-
TYP.
V
DF1(T)
V
DF2(T)
V
DF1
x 0.05
V
DF2
x 0.05
1.35
1.50
1.95
2.40
3.00
0.45
0.50
0.65
0.80
1.00
-
2.2
7.7
10.1
11.5
13.0
-10.0
MAX.
V
DF1(T)
x 1.02
V
DF2(T)
x 1.02
V
DF1
x 0.08
V
DF2
x 0.08
3.90
4.50
5.10
5.70
6.30
1.30
1.50
1.70
1.90
2.10
10
-
-
-
-
-
-2.0
UNITS CIRCUITS
V
V
①
①
V
HYS1
V
①
Hysteresis Range 2
V
HYS2
V
①
Supply Current
(V
IN1
Input
Current)
I
SS
V
IN
=V
IN1
=3.0V
=4.0V
=5.0V
V
IN2
= 1.5V
=2.0V
μA
②
V
IN2
Input Current
I
IN2
V
IN
=V
IN1
=V
IN2
=3.0V
=4.0V
=5.0V
μA
②
Operating Voltage
V
IN1
V
DF(T)
= 1.5V to 5.0V
V
-
N-ch,V
DS
=0.5V
Output Current
(*1)
I
DET
P-ch (CMOS)
V
DS
=-2.1V
Temperature
Characteristics
(*1)
Delay Time
(*1)
(Release Voltage
→
Output inversion)
(*1)
=3.0V
=4.0V
=5.0V
=8.0V
mA
③
ΔV
DF
/
(ΔTopr½
V
DF
)
t
DLY
-40℃
≦
Topr
≦
85℃
-
±100
-
ppm/℃
①
(V
DR
→
V
DET
inversion)
-
-
0.2
ms
④
The Features of output current, temperature characteristics and delay time are common between V
DET1
and V
DET2
Note:
V
DF1
(T), V
DF2
(T) : Nominal detect voltage.
Release voltage (V
DR
) = V
DF
+V
HYS
N type Input Voltage : please ensure that V
IN1
> V
IN2
(Input voltage of XC612D and XC612E series : please ensure that V
IN1
> V
IN2
, V
IN1
< V
IN2
.)
V
IN1
pin serve both I
SS
and power supply pin so that V
IN2
operates V
IN1
as a power supply source. For normal operation of V
IN2
,
operating voltage higher than the minimum is needed to be applied to power supply pin V
IN1
.
For CMOS output products, high level output voltage which is generated when the transient response is released becomes input
voltage of V
IN
.
5/15
FPGA/CPLD
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