HITFET
®
BTS 134 D
Smart Lowside Power Switch
Features
•
Logic Level Input
•
Input Protection (ESD)
•
Thermal shutdown with
auto restart
•
Overload protection
•
Short circuit protection
•
Overvoltage protection
•
Current limitation
Product Summary
Drain source voltage
On-state resistance
Nominal load current
Clamping energy
V
DS
R
DS(on)
I
D(ISO)
E
AS
42
50
3.3
3
V
mΩ
A
J
•
Analog driving possible
Application
•
kinds of resistive, inductive and capacitive loads in switching
All
or linear applications
•
compatible power switch for 12 V and 24 V DC applications
µC
•
Replaces electromechanical relays and discrete circuits
General Description
N channel vertical power FET in Smart SIPMOS
®
technology. Fully protected by embedded
protection functions.
V
bb
M
HITFET
®
Current
Limitation
In
Pin 1
Drain
Pin 2 and 4 (TAB)
Overvoltage-
Protection
Gate-Driving
Unit
Over-
tem perature
Protection
ESD
Overload
Protection
Short circuit
Protection
Pin 3
Source
Semiconductor Group
Page 1
Sep-11-1998
Maximum Ratings at T
j
= 25°C, unless otherwise specified
Parameter
Drain source voltage
Drain source voltage for short circuit protection
Continuous input voltage
Peak input voltage (I
IN
≤
2 mA)
Operating temperature
Storage temperature
Power dissipation
T
C
= 85 °C
6cm
2
cooling area ,
T
A
= 85 °C
Unclamped single pulse inductive energy
1)
Load dump protection
V
LoadDump2)
=
V
A
+
V
S
V
IN
= 0 and 10 V, t
d
= 400 ms,
R
I
= 2
Ω,
R
L
= 4.5
Ω,
V
A
= 13.5 V
Electrostatic discharge
voltage
(Human Body Model)
according to MIL STD 883D, method 3015.7 and
EOS/ESD assn. standard S5.1 - 1993
DIN humidity category, DIN 40 040
IEC climatic category; DIN IEC 68-1
Thermal resistance
junction - case:
junction - ambient:
SMD: junction - ambient
@ min. footprint
@ 6 cm
2
cooling area
3)
R
thJA
115
55
R
thJC
1.5
K/W
E
40/150/56
E
AS
V
LD
Symbol
V
DS
V
DS(SC)
V
IN
V
IN(peak)
T
j
T
stg
P
tot
43
1.1
3
65
J
V
Value
42
42
-0.2 ... +10
-0.2 ...
V
DS
-40 ...+150
-55 ... +150
W
°C
Unit
V
V
ESD
2
kV
1 Not tested, specified by design.
2
V
Loaddump is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839
3 Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm2 (one layer, 70µm thick) copper area for drain
connection. PCB mounted vertical without blown air.
Semiconductor Group
Page 2
Sep-11-1998
Electrical Characteristics
Parameter
at
T
j
= 25°C, unless otherwise specified
Characteristics
Drain source clamp voltage
T
j
= - 40 ...+ 150,
I
D
= 10 mA
Off-state drain current
T
j
= -40 ... +150°C
V
DS
= 32 V,
V
IN
= 0 V
Input threshold voltage
I
D
= 0.7 mA,
T
j
= 25 °C
I
D
= 0.7 mA,
T
j
= 150 °C
On state input current
On-state resistance
I
D
= 3 A,
V
IN
= 5 V,
T
j
= 25 °C
I
D
= 3 A,
V
IN
= 5 V,
T
j
= 150 °C
On-state resistance
I
D
= 3 A,
V
IN
= 10 V,
T
j
= 25 °C
I
D
= 3 A,
V
IN
= 10 V,
T
j
= 150 °C
Nominal load current
V
IN
= 10 V,
T
j
< 150°C,
T
A
= 85 °C,
SMD 6 cm
2
cooling area
V
IN
= 10 V,
V
DS
= 0.5 V,
T
C
= 85 °C,
T
j
< 150°C
Current limit (active if
V
DS
>2.5 V)
1)
V
IN
= 10 V,
V
DS
= 12 V,
t
m
= 200 µs
I
D(lim)
7.1
18
-
24
-
30
3.3
-
-
I
D(ISO)
R
DS(on)
-
-
35
65
50
90
A
I
IN(on)
R
DS(on)
-
-
45
75
60
100
I
DSS
V
IN(th)
1.3
0.9
-
1.7
-
10
2.2
-
30
µA
mΩ
-
1.5
10
µA
V
V
DS(AZ)
42
-
55
V
Symbol
min.
Values
typ.
max.
Unit
1Device switched on into existing short circuit (see diagram Determination of I
D(lim) . Dependant on the
application, these values might be exceeded for max. 50 µs in case of short circuit occurs while the
device is on condition
Semiconductor Group
Page 3
Sep-11-1998
Electrical Characteristics
Parameter
at
T
j
= 25°C, unless otherwise specified
Dynamic Characteristics
Turn-on time
Turn-off time
Slew rate on
Slew rate off
V
IN
to 90%
I
D
:
V
IN
to 10%
I
D
:
70 to 50%
V
bb
:
50 to 70%
V
bb
:
t
on
t
off
-dV
DS
/dt
on
dV
DS
/dt
off
-
-
-
-
60
60
0.3
0.7
150
150
1
1
V/µs
µs
R
L
= 4.7
Ω,
V
IN
= 0 to 10 V,
V
bb
= 12 V
R
L
= 4.7
Ω,
V
IN
= 10 to 0 V,
V
bb
= 12 V
R
L
= 4.7
Ω,
V
IN
= 0 to 10 V,
V
bb
= 12 V
R
L
= 4.7
Ω,
V
IN
= 10 to 0 V,
V
bb
= 12 V
Symbol
min.
Values
typ.
max.
Unit
Protection Functions
Thermal overload trip temperature
Thermal hysteresis
Input current protection mode
Unclamped single pulse inductive energy
1)
I
D
= 3 A,
T
j
= 25 °C,
V
bb
= 12 V
T
jt
∆T
jt
I
IN(Prot)
E
AS
150
-
-
3
165
10
140
-
-
-
300
-
°C
K
µA
J
Inverse Diode
Inverse diode forward voltage
I
F
= 15 A,
t
m
= 250 µs,
V
IN
= 0 V,
t
P
= 300 µs
V
SD
-
1.0
-
V
1 Not tested, specified by design.
Semiconductor Group
Page 4
Sep-11-1998
Block diagram
Terms
Inductive and overvoltage
output clamp
R
L
V
Z
IIN
1
IN
HITFET
S
VIN
3
2
D
ID
VDS V
bb
D
S
HITFET
Input circuit (ESD protection)
Gate Drive
Input
Short circuit behaviour
V
IN
I
IN
t
I
D
t
Source/
Ground
T
t
j
Thermal
hysteresis
t
Semiconductor Group
Page 5
Sep-11-1998
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