19-1271; Rev 0; 8/97
12-Bit, 100Msps ECL DAC
_______________General Description
The MAX5012 is a 12-bit, 100Msps digital-to-analog
converter (DAC) designed for digital modulation, direct
digital synthesis, high-resolution imaging, and arbitrary-
waveform-generation applications. This device is pin-
for-pin compatible with the AD9712 with significantly
improved settling time and glitch-energy performance.
The MAX5012 is an ECL-compatible device. It features
a fast 13ns settling time and low 15pV-s glitch impulse
energy, which results in excellent spurious-free dynamic
range characteristics.
The MAX5012 is available in a 28-pin plastic DIP or
PLCC package in the -40°C to +85°C extended-industrial
temperature range.
____________________________Features
o
12-Bit, 100Msps DAC
o
ECL-Compatible Inputs
o
Low Power: 600mW
o
1/2LSB DNL
o
40MHz Multiplying Bandwidth
o
Extended-Industrial Temperature Range
o
Superior Performance over AD9712:
Improved Settling Time: 13ns
Improved Glitch Energy: 15pV-s
Master/Slave Latches
MAX5012
________________________Applications
Fast-Frequency-Hopping Spread-Spectrum
Radios
Direct-Sequence Spread-Spectrum Radios
Digital RF/IF Modulation
Microwave and Satellite Modems
Test and Measurement Instrumentation
Pin Configurations appear at end of data sheet.
______________Ordering Information
PART
MAX5012AEPI
MAX5012BEPI
MAX5012AEQI
MAX5012BEQI
TEMP. RANGE
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
PIN-PACKAGE
28 Plastic DIP
28 Plastic DIP
28 PLCC
28 PLCC
_________________________________________________________Functional Diagram
MAX5012
________________________________________________________________
Maxim Integrated Products
1
For the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800.
For small orders, phone 408-737-7600 ext. 3468.
12-Bit, 100Msps ECL DAC
MAX5012
ABSOLUTE MAXIMUM RATINGS
Supply Voltages
Negative Supply Voltage (V
EE
) .............................................-7V
A/D Ground Voltage Differential..........................................0.5V
Input Voltages
Digital Input Voltage (D1–D12, Latch Enable) ............0V to V
EE
Control Amp Input Voltage Range...............................0V to -4V
Reference Input Voltage Range (V
REF
) ..................-3.7V to V
EE
Output Currents
Internal-Reference Output Current .................................500µA
Control-Amplifier Output Current..................................±2.5mA
Continuous Power Dissipation
Plastic DIP (derate 14.29mW/°C above +70°C) .............1.14W
PLCC (derate 10.53mW/°C above +70°C) ...................842mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature ......................................................+150°C
Lead Temperature (soldering, 10sec) .............................+300°C
Storage Temperature Range .................................-65 to +150°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
EE
= -5.2V, R
SET
= 7.5kΩ, CONTROL AMP IN = REF OUT, V
OUT
= 0V, T
A
= T
MIN
- T
MAX
, unless otherwise noted.)
PARAMETER
DC PERFORMANCE
Performance
Resolution
I
Differential Nonlinearity
Max at full
temperature
Best fit
Integral Nonlinearity
Output Capacitance
Gain Error (Note 1)
Gain-Error Tempco
Zero-Scale Offset Error
Offset Drift Coefficient
Output Compliance Voltage
Equivalent Output Resistance
DYNAMIC PERFORMANCE
Dynamic Performance
Conversion Rate
Settling Time (t
ST
) (Note 2)
Output Propagation Delay (t
D
)
(Note 3)
Glitch Energy (Note 4)
Full-Scale Output Current
(Note 5)
Spurious-Free Dynamic Range
1.23MHz; 10Msps
5.055MHz; 20Msps
10.1MHz; 50Msps
16MHz; 40Msps
Rise/Fall Time
2
10MHz span
R
L
= 50Ω
V
2MHz span
V
T
A
= +25°C
T
A
= +25°C
T
A
= +25°C
T
A
= +25°C
T
A
= +25°C
T
A
= +25°C
70
68
68
68
2
70
68
68
68
2
ns
dBc
dBc
IV
V
V
V
V
100
13
1
15
20.48
100
13
1
15
20.48
Msps
ns
ns
pV-s
mA
Max at full
temperature
T
A
= +25°C
T
A
= +25°C
Full temperature
Full temperature
T
A
= +25°C
Full temperature
Full temperature
T
A
= +25°C
T
A
= +25°C
VI
I
VI
V
I
VI
V
I
VI
V
IV
IV
-1.2
0.8
1.0
0.01
2.0
1.2
-1.2
0.8
1.0
150
0.5
2.5
5.0
0.01
2.0
1.2
10
1.0
5.0
8.0
150
0.5
2.5
5.0
±0.75
12
±0.5
±0.75
±1.5
±1.0
±1.75
10
1.0
5.0
8.0
±1.0
12
±1.0
±1.25
±2.0
±1.5
±2.0
LSB
pF
% F.S.
ppm/°C
µA
µA/°C
V
kΩ
LSB
Bits
CONDITIONS
TEST
LEVEL
MIN
MAX5012A
TYP
MAX
MIN
MAX5012B
TYP
MAX
UNITS
_______________________________________________________________________________________
12-Bit, 100Msps ECL DAC
ELECTRICAL CHARACTERISTICS (continued)
(V
EE
= -5.2V, R
SET
= 7.5kΩ, CONTROL AMP IN = REF OUT, V
OUT
= 0V, T
A
= T
MIN
- T
MAX
, unless otherwise noted.)
PARAMETERS
CONDITIONS
TEST
LEVEL
IV
T
A
= +25°C
Full temperature
±5% of V
EE
,
external reference,
T
A
= +25°C
T
A
= +25°C
T
A
= +25°C
I
VI
V
I
600
30
100
MIN
-5.46
MAX5012A
TYP
MAX
-5.2
115
-4.94
140
148
600
30
100
MIN
-5.46
MAX5012B
TYP
MAX
-5.2
115
-4.94
140
148
UNITS
MAX5012
POWER-SUPPLY REQUIREMENTS
Negative Supply Voltage
Negative Supply Current (-5.2V)
Nominal Power Dissipation
Power-Supply Rejection Ratio
V
mA
mA
mW
µA/V
VOLTAGE INPUT AND CONTROL
Reference Input Impedance
Reference Multiplying
Bandwidth
Internal Reference Voltage
Internal Reference Voltage Drift
Amplifier Input Impedance
Amplifier Input Bandwidth
DIGITAL INPUTS
Logic 1 Voltage
Logic 0 Voltage
Logic 1 Current
Logic 0 Current
Input Capacitance
Input Setup Time (t
S
)
Input Hold Time (t
H
)
Latch Pulse Width (t
PWL
, t
PWH
)
Note 1:
Note 2:
Note 3:
Note 4:
Full temperature
Full temperature
Full temperature
Full temperature
T
A
= +25°C
T
A
= +25°C
Full temperature
T
A
= +25°C
Full temperature
T
A
= +25°C
VI
VI
VI
VI
V
IV
IV
IV
IV
IV
3
3.5
0.5
0.5
5.0
4.0
0
3
2
3
3.5
0.5
0.5
5.0
4.0
0
-1.0
-1.7
-0.8
-1.5
20
10
3
2
-1.0
-1.7
-0.8
-1.5
20
10
V
V
µA
µA
pF
ns
ns
ns
ns
ns
T
A
= +25°C
T
A
= +25°C
V
V
VI
V
V
V
-1.15
3
40
-1.20
50
3
1
-1.25
-1.15
3
40
-1.20
50
3
1
-1.25
kΩ
MHz
V
ppm/°C
MΩ
MHz
Gain is measured as a ratio of the full-scale current to I
SET
. The ratio is nominally 128.
Measured as voltage at mid-scale transition to ±0.024%; R
L
= 50Ω.
Measured from the rising edge of Latch Enable to where the output signal has left a 1LSB error band.
Glitch is measured as the largest single transient.
R
SET
Note 5:
Calculated using
I
FS
= 128 x
Control Amp In
TEST LEVEL CODES
All electrical characteristics are subject to the following
conditions:
All parameters having min/max specifications are guar-
anteed. The Test Level column indicates the specific
device testing actually performed during production
and Quality Assurance inspection. Any black section in
the data column indicates that the specification is not
tested at the specified condition.
TEST LEVEL
I
II
III
IV
V
VI
TEST PROCEDURE
100% production tested at the specified temperature.
100% production tested at T
A
= +25°C, and sample
tested at the specified temperatures.
QA sample tested only at the specified temperatures.
Parameter is guaranteed (but not tested) by design and
characterization data.
Parameter is a typical value for information purposes only.
100% production tested at T
A
= +25°C. Parameter is
guaranteed over specified temperature range.
3
_______________________________________________________________________________________
12-Bit, 100Msps ECL DAC
MAX5012
______________________________________________________________Pin Description
PIN
1–10
11
12, 21
13
14
15, 25
16
17
18
19
20
22
23
24
26
27
28
NAME
D2–D11
D12 (LSB)
Digital V
EE
Analog Return
I
OUT
Analog V
EE
_
I
OUT
FUNCTION
Digital Input Bits 2–11
Digital Input Bit 12 (LSB)
Digital Negative Supply (-5.2V)
Analog Return Ground
Analog Current Output
Analog Negative Supply (-5.2V)
Complementary Analog Current Output
Voltage Reference Input
Internal Control Amplifier Output. Control Amp Out is normally connected to Ref In.
Internal Control Amplifier Input. Control Amp In is normally connected to Ref Out (if not con-
nected to external reference).
Internal Voltage Reference Output. Ref Out is normally connected to Control Amp In.
Ground Return for Internal Voltage Reference and Amplifier
No Connection. Not internally connected.
Connection for External Resistance Reference. R
SET
is used with the internal amplifier
(nominally 7.5kΩ).
Latch Control Line
Digital Ground Return
Digital Input Bit 1 (MSB)
Ref In
Control Amp Out
Control Amp In
Ref Out
Ref GND
N.C.
R
SET
*
Latch Enable
DGND
D1 (MSB)
*Full-Scale
Current Out = 128 (Control Amp In/R
SET
)
Figure 1. Timing Diagram
4
_______________________________________________________________________________________
12-Bit, 100Msps ECL DAC
MAX5012
MAX5012
Figure 2. Typical Interface Circuit
_______________________________________________________________________________________
5
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