19-1560; Rev 1; 7/05
+2.7V to +5.5V, Low-Power, Triple, Parallel
8-Bit DAC with Rail-to-Rail Voltage Outputs
General Description
The MAX5101 parallel-input, voltage-output, triple 8-bit
digital-to-analog converter (DAC) operates from a sin-
gle +2.7V to +5.5V supply and comes in a space-sav-
ing 16-pin TSSOP package. Internal precision buffers
swing rail-to-rail. For all three DACs, the internal refer-
ence voltage is tied to V
DD
.
The MAX5101 has separate input latches for each of its
three DACs. Data is transferred to the input latches
from a common 8-bit input port. The DACs are individu-
ally selected through address inputs A0 and A1 and
are updated by bringing
WR
low.
The MAX5101 features a 1µA software shutdown mode,
as well as a power-on reset mode that resets all regis-
ters to code 00 hex on power-up.
♦
Ultra-Low Supply Current
0.3mA while Operating
1µA in Software Shutdown Mode
♦
Ultra-Small 16-Pin TSSOP Package
♦
Output Buffer Amplifiers Swing Rail-to-Rail
♦
Power-On Reset Sets All Registers to Zero
Features
♦
+2.7V to +5.5V Single-Supply Operation
MAX5101
Applications
Digital Gain and Offset Adjustment
Programmable Attenuators
Portable Instruments
Power-Amp Bias Control
PART
MAX5101AEUE
MAX5101BEUE
Ordering Information
TEMP RANGE
-40°C to +85°C
-40°C to +85°C
PIN-
PACKAGE
16 TSSOP
16 TSSOP
INL
(LSB)
±1
±2
Functional Diagram
TOP VIEW
INPUT
LATCH A
DAC A
OUTA
Pin Configuration
OUTB 1
OUTA 2
D0–D7
INPUT
LATCH B
DAC B
OUTB
16 OUTC
15 GND
14 A0
V
DD
3
WR 4
MAX5101
13 A1
12 D0
11 D1
10 D2
9
D3
INPUT
LATCH C
DAC C
OUTC
D7 5
D6 6
D5 7
A0
A1
CONTROL
LOGIC
D4 8
MAX5101
TSSOP
WR
________________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
+2.7V to +5.5V, Low-Power, Triple, Parallel
8-Bit DAC with Rail-to-Rail Voltage Outputs
MAX5101
ABSOLUTE MAXIMUM RATINGS
V
DD
to GND ..............................................................-0.3V to +6V
D_, A_,
WR
to GND ..................................................-0.3V to +6V
OUT_ to GND ...........................................................-0.3V to V
DD
Maximum Current into Any Pin .........................................±50mA
Continuous Power Dissipation (T
A
= +70°C)
16-Pin TSSOP (derate 5.7mW/°C above +70°C) ..........457mW
Operating Temperature Range
MAX5101_EUE .................................................-40°C to +85°C
Maximum Junction Temperature .....................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
DD
= +2.7V to +5.5V, R
L
= 10kΩ, C
L
= 100pF, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at V
DD
= +3V and
T
A
= +25°C.)
PARAMETER
STATIC ACCURACY
Resolution
Integral Nonlinearity (Note 1)
Differential Nonlinearity (Note 1)
Zero-Code Error
Zero-Code-Error Supply
Rejection
Zero-Code Temperature
Coefficient
Gain Error (Note 2)
Gain-Error Temperature
Coefficient
DAC OUTPUTS
Output Voltage Range
DIGITAL INPUTS
Input High Voltage
Input Low Voltage
Input Current
Input Capacitance
DYNAMIC PERFORMANCE
Output Voltage Slew Rate
Output Settling Time (Note 3)
Channel-to-Channel Isolation
(Note 4)
Digital Feedthrough (Note 5)
V
IH
V
IL
I
IN
C
IN
From code 00 to code F0 hex
To 1/2LSB, from code 10 to code F0 hex
Code 00 to code FF hex
Code 00 to code FF hex
V
IN
= V
DD
or GND
10
0.6
6
500
0.5
V
DD
= 2.7V to 3.6V
V
DD
= 3.6V to 5.5V
2
3
0.8
±1.0
V
V
µA
pF
V/µs
µs
nVs
nVs
R
L
=
∞
0
V
DD
V
INL
DNL
ZCE
MAX5101A
MAX5101B
Guaranteed monotonic
Code = 00 hex
Code = 00 hex, V
DD
= 2.7V to 5.5V
Code = 00 hex
Code = F0 hex
Code = F0 hex
±0.001
±10
±1
8
±1
±2
±1
±20
10
Bits
LSB
LSB
mV
mV
µV/°C
%
LSB/°C
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
2
_______________________________________________________________________________________
+2.7V to +5.5V, Low-Power, Triple, Parallel
8-Bit DAC with Rail-to-Rail Voltage Outputs
MAX5101
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= +2.7V to +5.5V, R
L
= 10kΩ, C
L
= 100pF, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at V
DD
= +3V and
T
A
= +25°C.)
PARAMETER
Digital-to-Analog Glitch Impulse
Wideband Amplifier Noise
Shutdown Recovery Time
Time to Shutdown
POWER SUPPLIES
Power-Supply Voltage
Supply Current (Note 6)
Shutdown Current
DIGITAL TIMING
(Figure 1) (Note 7)
Address to
WR
Setup
Address to
WR
Hold
Data to
WR
Setup
Data to
WR
Hold
WR
Pulse Width
t
AS
t
AH
t
DS
t
DH
t
WR
5
0
25
0
20
ns
ns
ns
ns
ns
V
DD
I
DD
2.7
280
1
5.5
520
3
V
µA
µA
t
SDR
t
SDN
To ±1/2LSB of final value of V
OUT
I
DD
< 5µA
SYMBOL
CONDITIONS
Code 80 hex to code 7F hex
MIN
TYP
90
60
13
20
MAX
UNITS
nVs
µV
RMS
µs
µs
Note 1:
Reduced digital code range (code 00 hex to code F0 hex) due to swing limitations when the output amplifier is loaded.
Note 2:
Gain error is: [100 (V
F0,meas
- ZCE - V
F0,ideal
) / V
DD
]. Where V
F0,meas
is the DAC output voltage with input code F0 hex, and
V
F0,ideal
is the ideal DAC output voltage with input code F0 hex (i.e., V
DD
·
240 / 256).
Note 3:
Output settling time is measured from the 50% point of the falling edge of
WR
to ±1/2LSB of V
OUT
’s final value.
Note 4:
Channel-to-Channel Isolation is defined as the glitch energy at a DAC output in response to a full-scale step change on any
other DAC output. The measured channel has a fixed code of 80 hex.
Note 5:
Digital Feedthrough is defined as the glitch energy at any DAC output in response to a full-scale step change on all eight
data inputs with
WR
at V
DD
.
Note 6:
R
L
=
∞
, digital inputs at GND or V
DD
.
Note 7:
Timing measurement reference level is (V
IH
+ V
IL
) / 2.
_______________________________________________________________________________________
3
+2.7V to +5.5V, Low-Power, Triple, Parallel
8-Bit DAC with Rail-to-Rail Voltage Outputs
MAX5101
ADDRESS
t
AS
WR
ADDRESS VALID
t
WR
t
AH-
t
DS-
DATA
SEE NOTE 7, ELECTRICAL CHARACTERISTICS
DATA VALID
t
DH-
Figure 1. Timing Diagram
__________________________________________Typical
Operating Characteristics
(V
DD
= +3V, R
L
= 10kΩ, C
L
= 100pF, code = FF hex, T
A
= +25°C, unless otherwise noted.)
DAC ZERO-CODE OUTPUT VOLTAGE
vs. SINK CURRENT
MAX5101-01
DAC FULL-SCALE OUTPUT VOLTAGE
vs. SOURCE CURRENT
MAX5101-02
SUPPLY CURRENT vs. TEMPERATURE
MAX5101-03
1.2
1.0
0.8
V
OUT
(V)
0.6
0.4
0.2
0
0
2
4
6
8
V
DD
= 5V
10
260
240
SUPPLY CURRENT (µA)
220
V
DD
= 3V; CODE = F0 HEX
200
180
160
140
1 DAC AT CODE 00 OR F0
2 DACs AT CODE 00 (R
L
=
∞)
-40
-20
0
20
40
60
80
V
DD
= 5V; CODE = 00 HEX
V
DD
= 3V; CODE = 00 HEX
V
DD
= 5V; CODE = F0 HEX
8
V
OUT
(V)
V
DD
= 3V
6
V
DD
= 5V
4
V
DD
= 3V
2
0
10
0
2
4
6
8
10
SINK CURRENT (mA)
SOURCE CURRENT (mA)
100
TEMPERATURE (°C)
WORST-CASE 1LSB DIGITAL STEP
CHANGE (NEGATIVE)
MAX5101-04
WORST-CASE 1LSB DIGITAL STEP
CHANGE (POSITIVE)
DAC CODE FROM 7F TO 80 HEX
MAX5101-05
DAC CODE FROM 80 TO 7F HEX
CH1
CH1
CH2
CH2
2µs/div
CH1 = WR, 2V/div
CH2 = V
OUTA
, 50mV/div, AC-COUPLED
2µs/div
CH1 = WR, 2V/div
CH2 = V
OUTA
, 50mV/div, AC-COUPLED
4
_______________________________________________________________________________________
+2.7V to +5.5V, Low-Power, Triple, Parallel
8-Bit DAC with Rail-to-Rail Voltage Outputs
MAX5101
Typical Operating Characteristics (continued)
(V
DD
= +3V, R
L
= 10kΩ, C
L
= 100pF, code = FF hex, T
A
= +25°C, unless otherwise noted.)
DIGITAL FEEDTHROUGH GLITCH IMPULSE
(0 TO 1 DIGITAL TRANSMISSION)
MAX5101-06
DIGITAL FEEDTHROUGH GLITCH IMPULSE
(1 TO 0 DIGITAL TRANSMISSION)
MAX5101-07
POSITIVE SETTLING TIME
DAC CODE FROM 10 TO F0 HEX
MAX5101-08
CH1
CH2
CH1
CH2
CH1
CH2
0 TO 1 DIGITAL TRANSITION ON
ALL DATA BITS (WITH WR HIGH)
200ns/div
CH1 = D7, 2V/div
CH2 = V
OUTA
, 1mV/div, AC-COUPLED
1 TO 0 DIGITAL TRANSITION ON
ALL DATA BITS (WITH WR HIGH)
200ns/div
CH1 = D7, 2V/div
CH2 = V
OUTB
, 1mV/div, AC-COUPLED
CH1 = WR, 2V/div
CH2 = V
OUTA
, 2V/div
1µs/div
NEGATIVE SETTLING TIME
MAX5101-09
INTEGRAL AND DIFFERENTIAL NONLINEARITY
vs. DIGITAL CODE
0.4
0.3
0.2
INL/DNL (LSB)
DNL
R
L
=
∞
MAX5101-10
0.5
DAC CODE FROM F0 TO 10 HEX
CH1
0.1
0
-0.1
-0.2
CH2
-0.3
-0.4
-0.5
1µs/div
CH1 = WR, 2V/div
CH2 = V
OUTA
, 2V/div
0
32
64
96
INL
128 160 192 224 256
DIGITAL CODE
_______________________________________________________________________________________
5
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
