DATASHEET
LOW SKEW 1 TO 4 CLOCK BUFFER PECL IN, PECL OUT
Description
The ICS554-01A is a low skew clock buffer with a single
complimentary PECL input to four PECL outputs. Part of
IDT’s Clock Blocks
TM
family, this is our lowest skew PECL
clock buffer. The ICS554-01A is footprint compatible with
the ICS554-01, but requires fewer passive components for
termination thus providing a cost-saving alternative. For
parts which do not require PECL inputs or outputs, see the
ICS553 for a 1 to 4 low skew buffer, or the ICS552-02 for a
1 to 8 low skew buffer. For more than 8 outputs see the
MK74CBxxx Buffalo
TM
series of clock drivers.
IDT makes many non-PLL and PLL based low skew output
devices as well as Zero Delay Buffers to synchronize
clocks. Contact us for all of your clocking needs.
ICS554-01A
Features
•
•
•
•
•
•
•
•
•
Input frequency up to 200 MHz
Advanced CMOS process
Outputs are skew matched to within 50 ps
Packaged in 16-pin TSSOP
One PECL input to 4 PECL output clock drivers
Operating Voltages of 3.3 V or 5 V
Industrial temperature range
Functional equivalent to ICS554-01
Simplified passive termination network compared to
ICS554-01
NOTE: EOL for non-green parts to occur on
5/13/10 per PDN U-09-01
Block Diagram
VDD
IN
IN
Q0
Q0
Q1
Q1
Q2
Q2
Q3
Q3
VSS
IDT™ / ICS™
LOW SKEW 1 TO 4 CLOCK BUFFER PECL IN, PECL OUT
1
ICS554-01A
REV C 092309
ICS554-01A
LOW SKEW 1 TO 4 CLOCK BUFFER PECL IN, PECL OUT
PECL BUFFER
Pin Assignment
NC
VDD
Q0
Q0
Q1
Q1
GND
IN
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
NC
VDD
Q3
Q3
Q2
Q2
GND
IN
16-pin 173 mil (0.65mm) TSSOP
Pin Descriptions
Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Name
NC
VDD
Q0
Q0
Q1
Q1
GND
IN
IN
GND
Q2
Q2
Q3
Q3
VDD
NC
Type
—
Power
Output
Output
Output
Output
Power
Input
Input
Power
Output
Output
Output
Output
Power
—
No Connect.
Pin Description
Connect to +3.3 V or 5 V. Must be same as pin 15.
Clock Output Q0.
Clock Output Q0.
Clock Output Q1.
Clock Output Q1.
Connect to Ground.
PECL Clock Input.
Complementary PECL Clock Input.
Connect to Ground
Clock Output Q2.
Clock Output Q2.
Clock Output Q3.
Clock Output Q3.
Connect to +3.3 V or 5 V. Must be same as pin 2.
No Connect.
IDT™ / ICS™
LOW SKEW 1 TO 4 CLOCK BUFFER PECL IN, PECL OUT
2
ICS554-01A
REV C 092309
ICS554-01A
LOW SKEW 1 TO 4 CLOCK BUFFER PECL IN, PECL OUT
PECL BUFFER
External Components
The ICS554-01A requires a decoupling capacitor of 0.01µF to be connected between VDD on pin 2 and GND on
pin 7, as well as between VDD on pin 15 and GND on pin 10. These decoupling capacitors should be placed as
close to the device as possible.
To achieve the low output skews that the ICS554-01A is capable of, careful attention must be paid to board layout.
Essentially, all 8 outputs must have identical terminations, loads, and trace geometries. If they do not, the output
skew will be degraded. For example, using a 30Ω series termination on one output (with 33Ω on the others) will
cause at least 15ps of skew.
Termination for PECL or LVPECL Outputs
The clock layout topology shown below is a typical termination for PECL or LVPECL outputs. The two different
layouts mentioned are recommended only as guidelines.
FOUT and nFOUT are low impedance follower outputs that generate PECL/LVPECL compatible outputs.
Therefore, termination resistors (DC current path to ground) or current sources must be used for functionality.
These outputs are designed to drive 50 ohm transmission lines. Matched impedance techniques should be used to
maximize operating frequency and minimize signal distortion. There are a few simple termination schemes. The
figures below show two different layouts which are recommended only as guidelines. Other suitable clock layouts
may exist, but it is recommended that board designers simulate to guarantee compatibility across all printed circuit
and clock component process variations.
Z
0
= 50 ohms
F
OUT
Z
0
= 50 ohms
F
IN
3.3 V
5
50 ohms
50 ohms
2
Z
0
5
2
Z
0
Z
0
= 50 ohms
C1
RTT =
1
(V
OH
+ V
OL
/ V
CC
-2) -2
RTT
F
OUT
Z
0
= 50 ohms
F
IN
Z
0
3
2
Z
0
3
2
Z
0
C1 = 0.1µF to 0.01µF
PECL or LVPECL Output Termination
LVPECL Output Termination
IDT™ / ICS™
LOW SKEW 1 TO 4 CLOCK BUFFER PECL IN, PECL OUT
3
ICS554-01A
REV C 092309
ICS554-01A
LOW SKEW 1 TO 4 CLOCK BUFFER PECL IN, PECL OUT
PECL BUFFER
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the ICS554-01A. These ratings, which are
standard values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at
these or any other conditions above those indicated in the operational sections of the specifications is not implied.
Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical
parameters are guaranteed only over the recommended operating temperature range.
Item
Supply Voltage, VDD
All Inputs and Outputs
Ambient Operating Temperature
Storage Temperature
Junction Temperature
Soldering Temperature
7V
Rating
-0.5 V to VDD+0.5 V
-40 to +85
°
C
-65 to +150° C
125° C
260° C
Recommended Operation Conditions
Parameter
Ambient Operating Temperature
Power Supply Voltage (measured in respect to GND)
Min.
-40
+3.15
Typ.
–
Max.
+85
+5.25
Units
°
C
V
IDT™ / ICS™
LOW SKEW 1 TO 4 CLOCK BUFFER PECL IN, PECL OUT
4
ICS554-01A
REV C 092309
ICS554-01A
LOW SKEW 1 TO 4 CLOCK BUFFER PECL IN, PECL OUT
PECL BUFFER
DC Electrical Characteristics
VDD=3.3 V ±5%
Ambient temperature -40 to +85
°
C
Parameter
Operating Voltage
Peak to Peak Input Voltage
Input Common Mode Range
Input Common Mode Range
Output High Voltage
Output Low Voltage
Operating Supply Current
Short Circuit Current, 3.3 V
Short Circuit Current, 5 V
Symbol
VDD
IN
IN
IN
V
OH
V
OL
IDD
I
OS
I
OS
Conditions
Min.
3.15
0.3
Typ.
Max.
5.25
1.0
VDD-0.6
VDD-0.6
Units
V
V
VDD=3.3 V
VDD=5 V
Note 1
Note 1
No Load, 135 MHz
VDD-2
VDD-3.7
VDD-1.2
V
VDD - 2.0
80
±50
±60
V
mA
mA
mA
Note 1: V
OH
and V
OL
can be set by the external resistor values on the PECL outputs.
note 2: IDD includes the current through the external resistors which can be modified.
AC Electrical Characteristics
VDD = 3.3 V ±5
,
Ambient Temperature -40 to +85
°
C
Parameter
Input Frequency
Propagation Delay
Output to Output Skew
Duty Cycle
Symbol
Conditions
VDD = 3.3 V
VDD = 5 V
Crosspoint of pair
Crosspoint of pair
Min.
0
Typ.
2
2
0
Max.
200
Units
MHz
ns
ns
50
55
ps
%
45
50
IDT™ / ICS™
LOW SKEW 1 TO 4 CLOCK BUFFER PECL IN, PECL OUT
5
ICS554-01A
REV C 092309
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