Am29SL800D
8 Megabit (1 M x 8-Bit/512 K x 16-Bit)
CMOS 1.8 Volt-only Super Low Voltage Flash Memory
Data Sheet
Distinctive Characteristics
Single Power Supply Operation
— 1.65 to 2.2 V for read, program, and erase
operations
— Ideal for battery-powered applications
Manufactured on 0.23 µm Process Technology
— Compatible with 0.32 µm Am29SL800C device
High Performance
— Access times as fast as 90 ns
Ultra Low Power Consumption (Typical Values at
5 MHz)
— 0.2 µA Automatic Sleep Mode current
— 0.2 µA standby mode current
— 5 mA read current
— 15 mA program/erase current
Flexible Sector Architecture
— One 16 Kbyte, two 8 Kbyte, one 32 Kbyte, and
fifteen 64 Kbyte sectors (byte mode)
— One 8 Kword, two 4 Kword, one 16 Kword, and
fifteen 32 Kword sectors (word mode)
— Supports full chip erase
— Sector Protection Features:
A hardware method of locking a sector to prevent any
program or erase operations within that sector
Sectors can be locked in-system or via programming
equipment
Temporary Sector Unprotect feature allows code
changes in previously locked sectors
Embedded Algorithms
— Embedded Erase algorithm automatically
preprograms and erases the entire chip or any
combination of designated sectors
— Embedded Program algorithm automatically
writes and verifies data at specified addresses
Minimum 1,000,000 Erase Cycle Guarantee Per
Sector
20-Year Data Retention at 125
°
C
Package Option
— 48-pin TSOP
— 48-ball FBGA
Compatibility with JEDEC Standards
— Pinout and software compatible with single-
power supply Flash
— Superior inadvertent write protection
Data# Polling and Toggle Bits
— Provides a software method of detecting program
or erase operation completion
Ready/Busy# Pin (RY/BY#)
— Provides a hardware method of detecting
program or erase cycle completion
Erase Suspend/Erase Resume
— Suspends an erase operation to read data from,
or program data to, a sector that is not being
erased, then resumes the erase operation
Hardware Reset Pin (RESET#)
— Hardware method to reset the device to reading
array data
Unlock Bypass Program Command
— Reduces overall programming time when issuing
multiple program command sequences
Top or Bottom Boot Block Configurations
Available
This document contains information on a product under development at Advanced Micro Devices. The information
is intended to help you evaluate this product. AMD reserves the right to change or discontinue work on this proposed
product without notice.
Publication#
27546
Rev:
A
Amendment/+4
Issue Date:
April 27, 2005
Refer to AMD’s Website (www.amd.com) for the latest information
D a t a
S h e e t
Table of Contents
Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 3
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . 5
Special Handling Instructions for FBGA Packages .................. 6
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 8
Standard Products .................................................................... 8
Device Bus Operations . . . . . . . . . . . . . . . . . . . . 10
Table 1. Am29SL800D Device Bus Operations ..............................10
Table 6. Write Operation Status ..................................................... 25
Absolute Maximum Ratings. . . . . . . . . . . . . . . . . 26
Figure 7. Maximum Negative Overshoot Waveform Maximum
Negative Overshoot Waveform ...................................................... 26
Figure 8. Maximum Positive Overshoot Waveform........................ 26
Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . . 26
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 27
Table 7. CMOS Compatible ........................................................... 27
Zero Power Flash ................................................................... 28
Figure 9. I
CC1
Current vs. Time (Showing Active and Automatic
Sleep Currents) .............................................................................. 28
Figure 10. Typical I
CC1
vs. Frequency ........................................... 28
Word/Byte Configuration ........................................................ 10
Requirements for Reading Array Data ................................... 10
Writing Commands/Command Sequences ............................ 10
Program and Erase Operation Status .................................... 11
Standby Mode ........................................................................ 11
Automatic Sleep Mode ........................................................... 11
RESET#: Hardware Reset Pin ............................................... 11
Output Disable Mode .............................................................. 12
Table 2. Am29SL800DT Top Boot Block Sector Address Table .....12
Table 3. Am29SL800DB Bottom Boot Block Sector
Address Table .................................................................................13
Test Conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 11. Test Setup..................................................................... 29
Table 8. Test Specifications ........................................................... 29
Table 9. Key to Switching Waveforms ........................................... 29
Figure 12. Input Waveforms and Measurement Levels ................. 29
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 30
Table 10. Read Operations ............................................................ 30
Figure 13. Read Operations Timings ............................................. 30
Table 11. Hardware Reset (RESET#) ............................................ 31
Figure 14. RESET# Timings .......................................................... 31
Table 12. Word/Byte Configuration (BYTE#) ................................. 32
Figure 15. BYTE# Timings for Read Operations............................ 32
Figure 16. BYTE# Timings for Write Operations............................ 32
Table 13. Erase/Program Operations ............................................ 33
Figure 17. Program Operation Timings.......................................... 34
Figure 18. Chip/Sector Erase Operation Timings .......................... 35
Figure 19. Data# Polling Timings (During Embedded Algorithms). 36
Figure 20. Toggle Bit Timings (During Embedded Algorithms)...... 36
Figure 21. DQ2 vs. DQ6................................................................. 37
Table 14. Temporary Sector Unprotect .......................................... 37
Figure 22. Temporary Sector Unprotect Timing Diagram .............. 37
Figure 23. Sector Protect/Unprotect Timing Diagram .................... 38
Table 15. Alternate CE# Controlled Erase/Program Operations .... 39
Figure 24. Alternate CE# Controlled Write Operation Timings ...... 40
Table 16. Erase and Programming Performance ........................... 40
Table 17. Latchup Characteristics .................................................. 41
Table 18. TSOP Pin Capacitance .................................................. 41
Table 19. Data Retention ............................................................... 41
Autoselect Mode ..................................................................... 14
Table 4. Am29SL800D Autoselect Code (High Voltage Method) ...14
Sector Protection/Unprotection ............................................... 14
Temporary Sector Unprotect .................................................. 14
Figure 1. In-System Sector Protect/Unprotect Algorithms .............. 15
Figure 2. Temporary Sector Unprotect Operation........................... 16
Hardware Data Protection ...................................................... 16
Command Definitions . . . . . . . . . . . . . . . . . . . . . 16
Reading Array Data ................................................................ 16
Reset Command ..................................................................... 16
Autoselect Command Sequence ............................................ 17
Word/Byte Program Command Sequence ............................. 17
Figure 3. Program Operation .......................................................... 18
Chip Erase Command Sequence ........................................... 18
Sector Erase Command Sequence ........................................ 18
Erase Suspend/Erase Resume Commands ........................... 19
Figure 4. Erase Operation............................................................... 20
Table 5. Am29SL800D Command Definitions ................................20
Write Operation Status . . . . . . . . . . . . . . . . . . . . 21
DQ7: Data# Polling ................................................................. 21
Figure 5. Data# Polling Algorithm ................................................... 22
RY/BY#: Ready/Busy# ........................................................... 23
DQ6: Toggle Bit I .................................................................... 23
DQ2: Toggle Bit II ................................................................... 23
Reading Toggle Bits DQ6/DQ2 .............................................. 23
Figure 6. Toggle Bit Algorithm......................................................... 24
DQ5: Exceeded Timing Limits ................................................ 24
DQ3: Sector Erase Timer ....................................................... 24
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 42
TS 048–48-Pin Standard TSOP ............................................. 42
TSR048–48-Pin Reverse TSOP ............................................. 43
FBA048–48-Ball Fine-Pitch Ball Grid Array (FBGA)
6 x 8 mm package .................................................................. 44
FBC048 – 48-Ball Fine-Pitch Ball Grid Array (FBGA)
8 x 9 mm package .................................................................. 45
VBK 048 - 48 Ball Fine-Pitch Ball Grid Array (FBGA) ............. 46
8.15 x 6.15 mm ....................................................................... 46
Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 47
2
Am29SL800D
April 27, 2005
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