®
EMIF03-SIM01F2
3 LINES EMI FILTER
INCLUDING ESD PROTECTION
IPAD™
MAIN PRODUCT APPLICATIONS:
EMI filtering and ESD protection for:
■
SIM Interface (Subscriber Identify Module)
■
UIM Interface (Universal Identify Module)
DESCRIPTION
The EMIF03-SIM01F2 is a highly integrated
devices designed to suppress EMI/RFI noise in all
systems subjected to electromagnetic interfer-
ences. The EMIF03 flip chip packaging means the
package size is equal to the die size.
This filter includes an ESD protection circuitry
which prevents the device from destruction when
subjected to ESD surges up 15kV.
BENEFITS
■
EMI symmetrical (I/O) low-pass filter
■
High efficiency in EMI filtering
■
Lead free package
■
Very low PCB space consuming:
1.42mm x 1.42mm
■
Very thin package: 0.65 mm
■
High efficiency in ESD suppression
■
High reliability offered by monolithic integration
■
High reducing of parasitic elements through
integration & wafer level packaging.
COMPLIES WITH THE FOLLOWING STANDARDS:
IEC61000-4-2
Level 4
15kV (air discharge)
8kV (contact discharge)
MIL STD 883E - Method 3015-6 Class 3
Flip-Chip
(8 Bumps)
Table 1: Order Code
Part Number
EMIF03-SIM01F2
Marking
FC
Figure 1: Pin Configuration (Ball side)
3
RST
in
2
RST
out
1
A
CLT
out
CLT
in
Gnd
B
C
Data
in
V
CC
Data
out
Figure 2: Configuration
V
CC
100
Ω
RST in
R1
47
Ω
CLK in
R2
100
Ω
Data in
R3
Data out
CLK out
RST out
Cline = 35pF max.
GND
TM:
IPAD is a trademark of STMicroelectronics.
December 2004
REV. 2
1/7
EMIF03-SIM01F2
Table 2: Absolute Ratings
(limiting values)
Symbol
T
j
T
op
T
stg
Parameter and test conditions
Maximum junction temperature
Operating temperature range
Storage temperature range
Value
125
- 40 to + 85
- 55 to + 150
Unit
°C
°C
°C
Table 3: Electrical Characteristics
(T
amb
= 25°C)
Symbol
V
BR
I
RM
V
RM
V
CL
R
d
I
PP
R
I/O
C
line
Symbol
V
BR
I
RM
R
d
R
1
R
2
R
3
C
line
@ 0V
95
44.65
95
Parameter
Breakdown voltage
Leakage current @ V
RM
Stand-off voltage
Clamping voltage
Dynamic impedance
Peak pulse current
Series resistance between Input &
Output
Input capacitance per line
Test conditions
I
R
= 1 mA
V
RM
= 3V per line
1.5
100
47
100
105
49.35
105
35
Min.
6
1
Typ.
Max.
Unit
V
µA
Ω
Ω
Ω
Ω
pF
I
PP
V
CL
V
BR
V
RM
I
RM
I
R
V
F
V
I
F
I
Figure 3: S21 (dB) attenuation measurement
Aplac 7.60 User: STMicroelectronics Feb 22 2001
0.00
dB
-5.00
-10.00
-15.00
-20.00
-25.00
-30.00
-35.00
-40.00
-45.00
-50.00
100.0k
1.0M
10.0M
f/Hz
B3_B1(CLK)
A3_A2(RST)
C3_C1(DAT)
Figure 4: Analog crosstalk measurements
dB
100.0M
1.0G
MHz
2/7
EMIF03-SIM01F2
Figure 5: Digital crosstalk measurement
Figure 6: ESD response to IEC61000-4-2
(+15kV air discharge) on one input V(in) and on
one output (Vout)
V(in1)
V(out1)
Figure 7: ESD response to IEC61000-4-2
(+15kV air discharge) on one input V(in) and on
one output (Vout)
Figure 8: Line capacitance versus applied
voltage (typical)
V(in1)
35
30
25
20
C(pF)
F=1MHz
Vosc=30mV
Tj=25°C
V(out1)
15
VR(V)
10
0
1
2
3
4
5
6
3/7
EMIF03-SIM01F2
Figure 9: Aplac model
Rseries
Port1
50
MODEL = demif03
MODEL = demif03
Port2
50
sub
sub
Vcc
DEMIF03 diodes Model
- RS = 1.2
- CJO = 17p
- M = 0.3333
- VJ = 0.6
- ISR = 100p
- BV = 6.8
- IBV = 1m
- TT = 100n
50p
0.05
MODEL = demif03_Vcc
0.08nH
Rseries = 47R (CLK line)
= 100R (RST & Data lines)
DEMIF03_Vcc diode Model
- RS = 1.5
- CJO = 20p
- M = 0.3333
- VJ = 0.6
- ISR = 100p
- BV = 6.8
- IBV = 1m
- TT = 100n
sub
0.1
4/7
EMIF03-SIM01F2
Figure 10: Ordering Information Scheme
EMIF
EMI Filter
Number of lines
Information
x = resistance value (Ohms)
z = capacitance value / 10(pF)
or
3 letters = application
2 digits = version
Package
F = Flip-Chip
x = 1: 500µm, Bump = 315µm
= 2: Leadfree Pitch = 500µm, Bump = 315µm
= 3: Leadfree Pitch = 400µm, Bump = 250µm
yy
-
xxx zz
Fx
Figure 11: FLIP-CHIP Package Mechanical Data
500µm ± 50
650µm ± 65
315µm ± 50
500µm ± 50
1.42mm ± 50µm
Figure 12: Foot print recommendations
Figure 13: Marking
1.42mm ± 50µm
365
Dot, ST logo
xx = marking
z = packaging
location
yww = datecode
(y = year
ww = week)
240
365
Copper pad Diameter :
250µm recommended , 300µm max
E
Solder stencil opening : 330µm
Solder mask opening recommendation :
340µm min for 315µm copper pad diameter
x x z
y ww
40
220
All dimensions in µm
5/7
嵌入式系统
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
