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DATA SHEET
BIPOLAR ANALOG INTEGRATED CIRCUIT
μ
PC4572
LOW SUPPLY VOLTAGE, ULTRA LOW-NOISE, HIGH SPEED, WIDE BAND,
LOW I
B
DUAL OPERATIONAL AMPLIFIER
DESCRIPTION
The
μ
PC4572 is a dual wide band, ultra low noise operational amplifier designed for low supply voltage operation of
+4
V
to
+14
V single supply and
±2
V to
±7
V split supplies. Using high h
FE
PNP transistors for the input circuit, Input bias current
and input equivalent noise are better than conventional wide band operational amplifier.
The
μ
PC4572 is an excellent choice for preamplifiers and active filters in audio, instrumentation, and communication
circuit.
FEATURES
•
•
•
•
Ultra low noise: e
n
= 4.0 nV/ Hz
Low input bias current: 100 nA
High slew rate: 6 V/
μ
s
Low supply voltage:
±2
V to
±7
V (Split)
+4
V to
+14
V (Single)
•
Internal frequency compensation
<R>
ORDERING INFORMATION
Part Number
μ
PC4572C
μ
PC4572C(5)
μ
PC4572G2
μ
PC4572G2(5)
<R>
PIN CONFIGURATION (Top View)
Package
8-pin plastic DIP (7.62 mm (300) )
8-pin plastic DIP (7.62 mm (300) )
8-pin plastic SOP (5.72 mm (225) )
8-pin plastic SOP (5.72 mm (225) )
μ
PC4572C, 4572C(5), 4572G2, 4572G2(5)
OUT
1
1
−
+
8 V
+
1
7 OUT
2
2
+
−
I
I1
2
EQUIVALENT CIRCUIT (1/2 Circuit)
V
+
R
1
Q
5
Q
11
Q
8
I
I
I
N
Q
1
Q
2
R
5
C
2
Q
6
Q
3
R
2
V
−
C
1
Q
4
R
3
R
4
Q
10
R
10
Q
17
OUT
R
6
Q
13
R
7
Q
9
R
8
R
9
Q
12
Q
15
R
11
Q
16
I
N1
3
V
−
6 I
I2
5 I
N2
4
Q
7
Q
14
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No. G15972EJ6V0DS00 (6th edition)
Date Published December 2007 NS
Printed in Japan
1986
The mark <R> shows major revised points.
The revised points can be easily searched by copying an "<R>" in the PDF file and specifying it in the "Find what:" field.
μ
PC4572
<R>
ABSOLUTE MAXIMUM RATINGS (T
A
= 25°C)
Parameter
Voltage between V and V
Differential Input Voltage
Input Voltage
Note2
Note3
+
−
Note1
Symbol
V
+
−
V
−
V
ID
V
I
V
O
Ratings
−0.3
to
+15
±10
V
−
−
0.3 to V
+
0.3
V
−
−
0.3 to V
+
0.3
350
440
+
+
Unit
V
V
V
V
mW
mW
sec
°C
°C
Output Voltage
Power Dissipation
C
Package
Note4
Note5
P
T
G2 Package
Output Short Circuit Duration
Note6
ts
T
A
T
stg
10
−20
to
+80
−55
to
+125
Operating Ambient Temperature
Storage Temperature
Notes 1.
Reverse connection of supply voltage can cause destruction.
2.
The input voltage should be allowed to input without damage or destruction. Even during the transition
period of supply voltage, power on/off etc., this specification should be kept. The normal operation will
establish when the both inputs are within the Common Mode Input Voltage Range of electrical
characteristics.
3.
This specification is the voltage, which should be allowed to supply to the output terminal from external
without damage or destructive. Even during the transition period of supply voltage, power on/off etc., this
specification should be kept. The output voltage of normal operation will be the Output Voltage Swing of
electrical characteristics.
4.
Thermal derating factor is
−5.0
mW/°C when ambient temperature is higher than 55°C.
5.
Thermal derating factor is
−4.4
mW/°C when ambient temperature is higher than 25°C.
6.
Pay careful attention to the total power dissipation not to exceed the absolute maximum ratings, Note 4 and
Note 5.
RECOMMENDED OPERATING CONDITIONS
Parameter
Supply Voltage (Split)
Supply Voltage (V
−
= GND)
Output Current
Capacitive Load (A
V
=
+1)
Symbol
V
±
V
+
I
O
C
L
MIN.
±2
+4
TYP.
±5
+5/ +12
MAX.
±7
+14
±10
100
Unit
V
V
mA
pF
2
Data Sheet G15972EJ6V0DS
FPGA/CPLD
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