19-2274; Rev 0; 1/02
Dual LVDS Line Receiver
General Description
The MAX9159 dual low-voltage differential signaling
(LVDS) receiver is ideal for applications requiring high
speed, low power, and low noise. The MAX9159 is pin
compatible with the SN65LVDS9637. The MAX9159
conforms to the ANSI TIA/EIA-644 LVDS standard and
converts LVDS to LVTTL-compatible outputs. A fail-safe
feature sets the output high when the inputs are undriv-
en and open, terminated, or shorted. The MAX9159 is
available in an 8-pin SO package and fully specified for
the -40°C to +85°C extended temperature range.
Refer to the MAX9111/MAX9113 data sheet for higher
performance single/dual LVDS line receivers in SOT23
and SO packages. Refer to the MAX9110/MAX9112
data sheet for single/dual LVDS line drivers in SOT23
and SO packages.
o
Pin Compatible with SN65LVDS9637
o
Fail-Safe Circuit Sets Output High for Undriven
Inputs
o
Conforms to ANSI TIA/EIA-644 Standard
o
Single 3.3V Supply
o
Designed for Data Rates up to 400Mbps
o
±100mV (max) Differential Input Threshold
o
2.2ns (typ) Propagation Delay
o
41mW (typ) Power Dissipation per Receiver at
200MHz
o
±8kV ESD Protection for LVDS Inputs
o
Low-Voltage TTL (LVTTL) Logic Output Levels
Features
MAX9159
Applications
Network Switches/Routers
Telecom Switching Equipment
Cellular Phone Base Stations
Digital Copiers
LCD Displays
Backplane Interconnect
Clock Distribution
PART
MAX9159ESA
Ordering Information
TEMP RANGE
-40°C to +85°C
PIN-PACKAGE
8 SO
Typical Operating Circuit
3.3V
0.001µF
0.1µF
_A
1Y
DIN_
DRIVER
R
T
= 100Ω
_B
GND
4
MAX9110
MAX9112
MAX9159
RECEIVER
_Y
2Y
LVDS
3
2
3.3V
0.001µF
0.1µF
Pin Configuration
TOP VIEW
V
CC
1
8
1A
MAX9159
7
1B
6
2A
5
2B
SO
________________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Dual LVDS Line Receiver
MAX9159
ABSOLUTE MAXIMUM RATINGS
V
CC
to GND ..............................................................-0.5V to +4V
1A, 1B, 2A, 2B to GND ............................................-0.5V to +4V
Y1, Y2 to GND ............................................-0.5V to (V
CC
+ 0.5V)
Continuous Power Dissipation ................................(T
A
= +70°C)
8-Pin SO (derate 5.88mW/°C above +70°C)................471mW
Maximum Junction Temperature .....................................+150°C
Operating Temperature Range ...........................-40°C to +85°C
Storage Temperature Range .............................-65°C to +150°C
ESD Protection LVDS Inputs (1A, 1B, 2A, 2B)
Human Body Model ........................................................±8kV
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
CC
= 3.0V to 3.6V, differential input voltage |V
ID
| = 0.1V to 0.6V, common-mode input voltage V
CM
= |V
ID
/2| to 2.4V - |V
ID
/2|, T
A
=
-40°C to +85°C. Typical values are at V
CC
= 3.3V, T
A
= +25°C, unless otherwise noted.) (Notes 1 and 2)
PARAMETER
LVDS INPUTS (1A, 1B, 2A, 2B)
Differential Input High
Threshold
Differential Input Low
Threshold
Input Current
Input Current with Differential
Input
Power-Off Input Current
Power-Off Input Current
with Differential Input
Input Resistor 1
Input Resistor 2
LVTTL OUTPUTS (Y1, Y2)
Output High Voltage
Output Low Voltage
SUPPLY
Supply Current
I
CC
No load
5.7
10
mA
V
OH
V
OL
I
OH
= -8mA
I
OH
= -4mA
I
OL
= 8mA
2.4
2.8
3.14
3.2
0.19
0.4
V
V
V
TH
V
TL
I
I
I
ID
I
I(OFF)
I
ID(OFF)
R
IN1
R
IN2
_A or _B inputs
V
IN
= 0
V
IN
= 2.4V
-100
-1.0
-0.3
-20
2.3
-15
35
157
-2.3
-0.67
20
20
15
-20
100
mV
mV
µA
µA
µA
µA
kΩ
kΩ
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
0.1V
≤
|
V
ID
|
≤
0.6V; _A or _B inputs
V
CC
= 0, V
IN
= 3.6V; _A or _B inputs
0.1V
≤
|
V
ID
|
≤
0.6V, V
CC
= 0; _A or _B inputs
V
CC
= 0 or 3.6V, Figure 1
V
CC
= 0 or 3.6V, Figure 1
2
_______________________________________________________________________________________
Dual LVDS Line Receiver
SWITCHING CHARACTERISTICS
(V
CC
= 3.0V to 3.6V, differential input voltage |V
ID
| = 0.1V to 0.6V, common-mode input voltage V
CM
= |V
ID
/2| to 2.4V - |V
ID
/2|, C
L
=
10pF, T
A
= -40°C to +85°C. Typical values are at V
CC
= 3.3V, T
A
= +25°C, unless otherwise noted.) (Figures 2 and 3) (Notes 3, 4,
PARAMETER
Propagation Delay High to Low
Propagation Delay Low to High
Pulse Skew | t
PHL
- t
PLH
|
Channel-to-Channel Output Skew (Note 6)
Part-to-Part Skew (Note 7)
Output Signal Rise Time (20% to 80%)
Output Signal Fall Time (80% to 20%)
SYMBOL
t
PHL
t
PLH
t
SK(P)
t
SK(O)
t
SK(PP)
t
R
t
F
0.40
0.42
CONDITIONS
MIN
1.5
1.5
TYP
2.2
2.13
0.07
0.03
MAX
3
3
0.4
0.3
1
0.8
0.8
UNITS
ns
ns
ns
ns
ns
ns
ns
MAX9159
Note 1:
Maximum and minimum limits over temperature are guaranteed by design and characterization. Devices are production
tested at T
A
= +25°C.
Note 2:
Current into a pin is defined as positive. Current out of a pin is defined as negative. All voltages are referenced to ground,
except V
TH
, V
TL
, and V
ID
.
Note 3:
AC parameters are guaranteed by design and characterization.
Note 4:
C
L
includes scope probe and test jig capacitance.
Note 5:
All input pulses are supplied by a generator having the following characteristics: t
R
or t
F
≤
1ns, pulse repetition rate (PRR) =
50Mpps, pulse width = 10 ±0.2ns.
Note 6:
t
SK(O)
is the skew between specified outputs of a single device with all driving inputs connected together and the outputs
switching in the same direction while driving identical specified loads.
Note 7:
t
SK(PP)
is the magnitude of the difference in propagation delay times between any specified terminals of two devices when
both devices operate with the same supply voltages, same temperature, and have identical packages and test circuits.
Typical Operating Characteristics
(V
CC
= 3.3V, |V
ID
| = 200mV, V
CM
= 1.2V, f
IN
= 200MHz, C
L
= 10pF, T
A
= +25°C, unless otherwise noted.)
OUTPUT LOW VOLTAGE
vs. SUPPLY VOLTAGE
MAX9159 toc01
OUTPUT HIGH VOLTAGE
vs. SUPPLY VOLTAGE
3.7
3.6
3.5
3.4
3.3
3.2
3.1
3.0
2.9
2.8
2.7
2.6
2.5
3.0
MAX9159 toc02
OUTPUT SHORT-CIRCUIT
CURRENT vs. SUPPLY VOLTAGE
MAX9159 toc03
200
OUTPUT
SINKING 8mA
OUTPUT LOW VOLTAGE (mV)
195
100
SHORT-CIRCUIT CURRENT (mA)
OUTPUT
SOURCING 8mA
OUTPUT HIGH VOLTAGE (V)
90
80
190
70
185
60
180
3.0
3.1
3.2
3.3
3.4
3.5
3.6
SUPPLY VOLTAGE (V)
50
3.1
3.2
3.3
3.4
SUPPLY VOLTAGE (V)
3.5
3.6
3.0
3.1
3.2
3.3
3.4
3.5
3.6
SUPPLY VOLTAGE (V)
_______________________________________________________________________________________
3
Dual LVDS Line Receiver
MAX9159
Typical Operating Characteristics (continued)
(V
CC
= 3.3V, |V
ID
| = 200mV, V
CM
= 1.2V, f
IN
= 200MHz, C
L
= 10pF, T
A
= +25°C, unless otherwise noted.)
DIFFERENTIAL INPUT THRESHOLD
VOLTAGE vs. SUPPLY VOLTAGE
MAX9159 toc04
SUPPLY CURRENT vs. FREQUENCY
MAX9159 toc05
SUPPLY CURRENT vs. TEMPERATURE
f
IN
= 1MHz
BOTH CHANNELS
SWITCHING
MAX9159 toc06
0
DIFFERENTIAL INPUT THRESHOLD (mV)
-0.5
-1.0
-1.5
-2.0
-2.5
-3.0
-3.5
-4.0
-4.5
-5.0
3.0
3.1
3.2
3.3
3.4
3.5
V
TL
V
TH
40
35
SUPPLY CURRENT (mA)
30
25
20
15
10
5
0
0.01
0.1
1
10
100
ONE CHANNEL
SWITCHING
TWO CHANNELS
SWITCHING
8
7
SUPPLY CURRENT (mA)
6
5
4
3.6
1000
3
-40
-15
10
35
60
85
TEMPERATURE (°C)
SUPPLY VOLTAGE (V)
FREQUENCY (MHz)
PROPAGATION DELAY
vs. SUPPLY VOLTAGE
MAX9159 toc07
PROPAGATION DELAY vs. TEMPERATURE
MAX9159 toc08
PULSE SKEW vs. SUPPLY VOLTAGE
MAX9159 toc09
2.4
2.5
2.4
PROPAGATION DELAY (ns)
2.3
2.2
t
PHL
2.1
2.0
1.9
t
PLH
150
125
PULSE SKEW (ps)
100
75
50
25
0
3.0
PROPAGATION DELAY (ns)
2.3
t
PHL
2.2
t
PLH
2.1
2.0
3.0
3.1
3.2
3.3
3.4
3.5
3.6
SUPPLY VOLTAGE (V)
1.8
-40
-15
10
35
60
85
TEMPERATURE (°C)
3.1
3.2
3.3
3.4
3.5
3.6
SUPPLY VOLTAGE (V)
PULSE SKEW vs. TEMPERATURE
MAX9159 toc10
PROPAGATION DELAY vs. DIFFERENTIAL
INPUT VOLTAGE
MAX9159 toc11
PROPAGATION DELAY
vs. COMMON-MODE VOLTAGE
MAX9159 toc12
100
90
80
PULSE SKEW (ps)
70
60
50
40
30
20
-40
-15
10
35
60
2.6
2.5
PROPAGATION DELAY (ns)
2.4
2.3
2.2
2.1
2.0
2.6
2.5
PROPAGATION DELAY (ns)
2.4
2.3
t
PHL
2.2
2.1
2.0
t
PLH
t
PHL
t
PLH
85
0
500
1000
1500
2000
2500
0
0.5
1.0
1.5
2.0
2.5
3.0
TEMPERATURE (°C)
DIFFERENTIAL INPUT VOLTAGE (mV)
COMMON-MODE VOLTAGE (V)
4
_______________________________________________________________________________________
Dual LVDS Line Receiver
Typical Operating Characteristics (continued)
(V
CC
= 3.3V, |V
ID
| = 200mV, V
CM
= 1.2V, f
IN
= 200MHz, C
L
= 10pF, T
A
= +25°C, unless otherwise noted.)
PROPAGATION DELAY
vs. LOAD CAPACITANCE
MAX9159 toc14
MAX9159 toc13
MAX9159
TRANSITION TIME vs. TEMPERATURE
0.6
3.6
3.4
PROPAGATION DELAY (ns)
3.2
3.0
2.8
2.6
2.4
2.2
0.2
-40
-15
10
35
60
85
TEMPERATURE (°C)
2.0
10
15
TRANSITION TIME
vs. LOAD CAPACITANCE
2.0
1.8
TRANSITION TIME (ns)
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
t
F
t
R
MAX9159 toc15
2.2
TRANSITION TIME (ns)
0.5
t
F
0.4
t
R
0.3
t
PHL
t
PLH
20
25
30
35
40
45
50
10
15
20
25
30
35
40
45
50
LOAD CAPACITANCE (pF)
LOAD CAPACITANCE (pF)
Pin Description
PIN
1
2
3
4
5
6
7
8
NAME
V
CC
1Y
2Y
GND
2B
2A
1B
1A
Power Supply
Channel 1 Output
Channel 2 Output
Ground
Channel 2 Inverting Differential Input
Channel 2 Noninverting Differential Input
Channel 1 Inverting Differential Input
Channel 1 Noninverting Differential Input
FUNCTION
The 250mV to 450mV differential output of an LVDS dri-
ver is nominally centered around a 1.25V offset. This
offset, coupled with the receiver’s 0 to 2.4V input volt-
age range, allows an approximate ±1V shift in the sig-
nal (as seen by the receiver). This allows for a
difference in ground references of the driver and the
receiver, the common-mode effects of coupled noise,
or both. The LVDS standards specify an input voltage
range of 0 to 2.4V referenced to receiver ground.
Fail-Safe
The fail-safe feature of the MAX9159 sets the output
high and reduces supply current when:
• Inputs are open.
• Inputs are undriven and shorted.
• Inputs are undriven and terminated.
A fail-safe circuit is important because under these
conditions, noise at the input may switch the receiver
and it may appear to the system that data is being
received. Open or undriven terminated input conditions
can occur when a cable is disconnected or cut, or
when an LVDS driver output is in high impedance. A
short condition can occur because of a cable failure.
The fail-safe input network (Figure 1) samples the input
common-mode voltage and compares it to V
CC
- 0.3V
(nominal). When the input is driven to levels specified in
the LVDS standards, the input common-mode voltage is
less than V
CC
- 0.3V and the fail-safe circuit is not acti-
Detailed Description
LVDS is intended for point-to-point communication over
a controlled-impedance medium as defined by the
ANSI TIA/EIA-644 and IEEE 1596.3 standards. LVDS
uses a lower voltage swing than other common commu-
nication standards, achieving higher data rates with
reduced power consumption, while reducing EMI
emissions and system susceptibility to noise.
The MAX9159 is a dual LVDS line receiver ideal for
applications requiring high data rates, low power, and
low noise. The device accepts an LVDS input and
translates it to an LVTTL output. The receiver detects
differential signals as low as 100mV and as high as
0.6V within an input voltage range of 0 to 2.4V.
_______________________________________________________________________________________
5
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