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®
TM
BU-6474X/6484X/6486X
MINI-ACE
®
MARK3/MICRO-ACE
®
*-TE
FEATURES
•
Fully Integrated 3.3 or 5.0 Volt, 1553
A/B Notice 2 Terminal
•
World’s First all 3.3 Volt Terminal
•
Transceiver Power-Down Options
•
World’s Smallest CQFP MIL-STD-1553
Device
•
80-pin Ceramic Flat/Gull Wing
Package or 324-Ball BGA Package
•
Enhanced Mini-ACE Architecture
•
Multiple Configurations:
- RT-only, 4K RAM
- BC/RT/Monitor, 4K RAM
DESCRIPTION
The Mini-ACE Mark3 and Micro-ACE-TE are the world's first MIL-STD-1553
terminals which can be powered entirely by +3.3 volts, thus eliminating the
need for a +5 volt power supply. With a package body of 0.880 inches square
and a gull wing "toe-to-toe" dimension of 1.110 inches, the Mini-ACE Mark3
is the industry's smallest ceramic gull-lead 1553 terminal. At 0.815 inches
square, the Micro-ACE-TE (BGA package) provides the smallest industry
footprint, enabling its use in applications where PC board space is at a pre-
mium.
These devices integrate dual 3.3 or 5 volt transceivers, 3.3 or 5.0 volt protocol
logic, and either 4K or 64K words of internal RAM. The architecture is identi-
cal to that of the Enhanced Mini-ACE, and most features are functionally and
software compatible with the previous Mini-ACE (Plus) and ACE genera-
tions.
A salient feature of the Mini-ACE Mark3 and Micro-ACE-TE is the advanced
bus controller architecture. This provides methods to control message sched-
uling, the means to minimize host overhead for asynchronous message
insertion, facilitate bulk data transfers and double buffering, and support
various message retry and bus switching strategies.
The remote terminal architecture provides flexibility in meeting all common
MIL-STD-1553 protocols. The choice of RT data buffering and interrupt
options provides robust support for synchronous and asynchronous messag-
ing, while ensuring data sample consistency and supporting bulk data trans-
fers. The monitor mode provides true message monitoring, and supports fil-
tering on an RT address/T-R bit/subaddress basis.
The Mini-ACE Mark3 and Micro-ACE-TE incorporate fully autonomous built-
in self-tests of internal protocol logic and RAM. The terminals provide
the
same flexibility in host interface configurations as the ACE/Mini-ACE, along
with a reduction in the host processor's worst case holdoff time.
- BC/RT/Monitor, 64K RAM
•
Supports 1553A/B Notice 2, McAir,
STANAG 3838 Protocols
•
MIL-STD-1553, McAir, and MIL-
STD-1760 Transceiver Options
•
Highly Flexible Host Side Interface
•
Compatible With Mini-ACE and ACE
Generations
•
Highly Autonomous BC with Built-In
Message Sequence Controller
•
Choice of Single, Double, and
Circular RT Buffering Options
•
Selective Message Monitor
•
Comprehensive Built-In Self-Test
•
Choice Of 10, 12, 16, or 20 MHz Clock
Inputs
•
Software Libraries and Drivers
available for Windows® 9x/2000/XP,
Windows NT®, VxWorks® and Linux
•
Available with Full Military
Temperature Range and Screening
FOR MORE INFORMATION CONTACT:
Technical
INFORMATION CONTACT:
FOR MORE
Support:
1-800-DDC-5757 ext. 7771
Technical Support:
1-800-DDC-5757 ext. 7771
Data Device Corporation
105 Wilbur Place
Bohemia, New York 11716
631-567-5600 Fax: 631-567-7358
www.ddc-web.com
subject to one or more patents pending.
All trademarks are the property of their respective owners.
© 2002 Data Device Corporation
*
The technology used in DDC’s Micro-ACE series of products may be
Vcc
SHARED
RAM
(1)
TRANSCEIVER
A
DATA BUS
D15-D0
DUAL
ENCODER/DECODER,
MULTIPROTOCOL
AND
MEMORY
MANAGEMENT
ADDRESS BUS
ADDRESS
BUFFERS
DATA
BUFFERS
PROCESSOR
DATA BUS
TX/RX_A
Data Device Corporation
www.ddc-web.com
A15-A0
PROCESSOR
ADDRESS BUS
TRANSCEIVER
B
TRANSPARENT/BUFFERED, STRBD, SELECT,
RD/WR, MEM/REG, TRIGGER_SEL/MEMENA-IN,
MSB/LSB/DTGRT
IOEN, READYD
ADDR_LAT/MEMOE, ZERO_WAIT/MEMWR,
8/16-BIT/DTREQ, POLARITY_SEL/DTACK
INT
PROCESSOR
AND
MEMORY
CONTROL
INTERRUPT
REQUEST
PROCESSOR
AND
MEMORY
INTERFACE
LOGIC
INCMD/MCRST
CLK_IN, TAG_CLK,
MSTCLR, SSFLAG/EXT_TRG, TX-INH_A, TX-INH_B,
SLEEPIN/UPADDREN
(1:2.07)
CH. A
(Note 2)
TX/RX_A
TX/RX_B
(1:2.07)
CH. B
(Note 2)
2
TX/RX_B
RT ADDRESS
RTAD4-RTAD0, RTADP, RTADD_LAT
MISCELLANEOUS
BU-6474X/6484X/6486X
AL-11/12-0
Notes:
1. See Ordering Information for Available Memory Options.
2. Transformer-coupled configuration and ratio shown.
FIGURE 1. MINI-ACE MARK3 AND MICRO-ACE-TE BLOCK DIAGRAM
TABLE 1. MINI-ACE MARK3 SERIES SPECIFICATIONS
PARAMETER
ABSOLUTE MAXIMUM RATING
Supply Voltage (Note 12)
•
Logic +5V
•
Logic +3.3V
•
RAM +5V
•
Transceivers +5V
•
Transceivers +3.3V (not during transmit)
•
Transceivers +3.3V (during transmit)
Logic
•
+5V Logic Input Range
•
+3.3V Logic Input Range
MIL-STD-1553 Transceiver Signals
•
BU-64XXXX3/4
Powered Input Range (Note 17)
Unpowered Input Range
•
BU-64XXXXC/D
Powered Input Range (Note 18)
Unpowered Input Range
RECEIVER
Differential Input Resistance (Notes 1-6)
+5.0V
+3.3V
Differential Input Capacitance (Notes 1-6)
+5.0V
+3.3V
Threshold Voltage, Transformer Coupled, Measured on Stub
Common-Mode Voltage (Note 7)
TRANSMITTER
Differential Output Voltage
•
Direct Coupled Across 35
Ω,
Measured on Bus
•
Transformer Coupled Across 70
Ω,
Measured on Bus
BU-64XXXXX-XX0
BU-64XXXXX-XX2 (Note 13)
Output Noise, Differential (Direct Coupled)
Output Offset Voltage, Transformer Coupled Across 70
Ω
Rise/Fall Time
BU-64XXXX8/3
BU-64XXXX9/4
LOGIC
V
IH
All signals except CLK_IN
CLK_IN
V
IL
All signals except CLK_IN
CLK_IN
Schmidt Hysteresis
All signals except CLK_IN
CLK_IN
I
IH,
I
IL
All signals except CLK_IN
I
IH
(Vcc=3.6V, V
IN
=Vcc)
I
IH
(Vcc=3.6V, V
IN
=2.7V)
I
IL
(Vcc=3.6V, V
IN
=0.4V)
I
IH,
I
IL
All signals except CLK_IN
I
IH
(Vcc=5.25V, Vin=Vcc)
I
IH
(Vcc=5.25V, I
IH
Vin=2.7V)
I
IL
(Vcc=5.25V, Vin=0.4V)
V
OH
(Vcc=3.0V, V
IH
=2.7V, V
IL
=0.2V, I
OH
=max)
V
OL
(Vcc=3.0V, V
IH
=2.7V, V
IL
=0.2V, I
OL
=max)
V
OH
(Vcc=4.5V, V
IH
=2.7V, V
IL
=0.2V, I
OH
=max)
V
OL
(Vcc=4.5V, V
IH
=2.7V, V
IL
=0.2V, I
OL
=max)
MIN
TYP
MAX
UNITS
-0.3
-0.3
-0.3
-0.3
-0.3
-0.3
-0.3
-0.3
-5V_XCVR - 0.3
-1.5
-3.3V_XCVR - 0.3
-1
6.0
4.1
6.0
7.0
6.0
4.5
6.0
6.0
5V_XCVR + 0.3
+1.5
3.3V_XCVR + 0.3
+1
V
V
V
V
V
V
V
V
V
V
V
V
2.5
2.0
25
40
0.860
10
kΩ
kΩ
pF
pF
Vp-p
Vpeak
0.200
6
18
20
-250
100
200
7
20
21.5
9
27
27
10
250
300
300
Vp-p
Vp-p
Vp-p
mVp-p
mVp
nsec
nsec
150
250
2.1
0.8•V
cc
0.7
0.2•Vcc
0.4
1.0
-10
-350
-350
-10
-350
-350
2.4
2.4
0.4
10
-33
-33
10
-50
-50
0.4
V
V
V
V
V
V
µA
µA
µA
µA
µA
µA
V
V
V
V
Data Device Corporation
www.ddc-web.com
3
BU-6474X/6484X/6486X
AL-11/12-0
TABLE 1. MINI-ACE MARK3 SERIES SPECIFICATIONS (CONT.)
PARAMETER
LOGIC (CONT.)
CLK_IN
I
IH
I
IL
I
OL
(Vcc = 4.5V)
I
OH
(Vcc = 4.5V)
I
OL
(Vcc = 3.0V)
I
OH
(Vcc = 3.0V)
C
I
(Input Capacitance)
C
IO
(Bi-directional signal input capacitance)
POWER SUPPLY REQUIREMENTS
Voltages/Tolerances (Note 12)
•
Logic +3.3V
•
Logic +5.0V
•
RAM +5.0V
•
Transceivers +3.3V
•
Transceivers +5.0V
Current Drain (Total Hybrid) (Note 14)
BU-64743X8/9-XX0, BU-64843X8/9-XX0 (1553&McAir)
• Idle
• 25% Duty Transmitter Cycle
• 50% Duty Transmitter Cycle
• 100% Duty Transmitter Cycle
BU-64743F/G3/4-XX0, BU-64843F/G3/4-XX0 (1553&McAir)
+5V (Ch. A, Ch. B)
• Idle
• 25% Duty Transmitter Cycle
• 50% Duty Transmitter Cycle
• 100% Duty Transmitter Cycle
• +3.3V (Logic)
BU-64745F/G3/4-XX0, BU-64845F/G3/4-XX0 (1553&McAir)
+5V (Logic, RAM, Ch. A, Ch. B)
• Idle
• 25% Duty Transmitter Cycle
• 50% Duty Transmitter Cycle
• 100% Duty Transmitter Cycle
BU-64745F/G3-XX2, BU-64845F/G3-XX2 (1760)
+5V (Logic, RAM, Ch. A, Ch. B)
• Idle
• 25% Duty Transmitter Cycle
• 50% Duty Transmitter Cycle
• 100% Duty Transmitter Cycle
BU-64863X8/9-XX0 (1553&McAir)
• Idle w/ transceiver SLEEPIN enabled
• Idle w/ transceiver SLEEPIN disabled
• 25% Duty Transmitter Cycle
• 50% Duty Transmitter Cycle
• 100% Duty Transmitter Cycle
BU-64863F/G3/4-XX0 (1553&McAir)
+5V (Ch. A, Ch. B)
• Idle
• 25% Duty Transmitter Cycle
• 50% Duty Transmitter Cycle
• 100% Duty Transmitter Cycle
• +3.3V (Logic, 64K RAM)
BU-64743X8-XX2, BU-64843X8-XX2 (1760)
• Idle
• 25% Duty Transmitter Cycle
• 50% Duty Transmitter Cycle
• 100% Duty Transmitter Cycle
MIN
TYP
MAX
UNITS
-10
-10
3.4
2.2
10
10
-3.4
-2.2
50
50
µA
µA
mA
mA
mA
mA
pF
pF
3.00
4.5
4.5
3.14
4.75
3.3
5.0
5.0
3.3
5.0
56
246
436
816
65
169
273
481
25
116
222
328
540
116
233
350
584
31
77
267
457
837
65
169
273
481
21
55
216
377
699
3.60
5.5
5.5
3.46
5.25
95
300
500
900
100
205
310
520
40
160
265
370
580
160
276
392
625
69
110
315
515
915
100
205
310
520
55
95
315
535
975
V
V
V
V
V
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
Data Device Corporation
www.ddc-web.com
4
BU-6474X/6484X/6486X
AL-11/12-0
TABLE 1. MINI-ACE MARK3 SERIES SPECIFICATIONS (CONT.)
PARAMETER
POWER SUPPLY REQUIREMENTS
(CONT.)
BU-64743F/G3-XX2, BU-64843F/G3-XX2 (1760)
+5V (Ch. A, Ch. B)
• Idle
• 25% Duty Transmitter Cycle
• 50% Duty Transmitter Cycle
• 100% Duty Transmitter Cycle
• +3.3V (Logic)
BU-64840B3-X02 (1760)
+5V (Logic, Ch. A, Ch. B)
• Idle
• 25% Duty Transmitter Cycle
• 50% Duty Transmitter Cycle
• 100% Duty Transmitter Cycle
BU-64840B3-X02 (1760)
+5V (Ch. A, Ch. B)
• Idle
• 25% Duty Transmitter Cycle
• 50% Duty Transmitter Cycle
• 100% Duty Transmitter Cycle
• +3.3V (Logic)
BU-64863X8-XX2 (1760)
• Idle w/ transceiver SLEEPIN enabled
• Idle w/ transceiver SLEEPIN disabled
• 25% Duty Transmitter Cycle
• 50% Duty Transmitter Cycle
• 100% Duty Transmitter Cycle
BU-64863F/G3-XX2 (1760)
+5V (Ch. A, Ch. B)
• Idle
• 25% Duty Transmitter Cycle
• 50% Duty Transmitter Cycle
• 100% Duty Transmitter Cycle
• +3.3V (Logic, 64K RAM)
BU-64860B(R)3-X02 (1760)
+5V (Logic, 64K RAM, Ch. A, Ch. B)
• Idle
• 25% Duty Transmitter Cycle
• 50% Duty Transmitter Cycle
• 100% Duty Transmitter Cycle
BU-64860B(R)3-X02 (1760)
+5V (64K RAM, Ch. A, Ch. B)
• Idle
• 25% Duty Transmitter Cycle
• 50% Duty Transmitter Cycle
• 100% Duty Transmitter Cycle
• +3.3V (Logic)
BU-64743X0-XX0, BU-64843X0-XX0 (Xcvrless)
BU-64863X0-XX0 (Xcvrless)
BU-64X43XC/D-XXX
• Idle
• 25% Duty Transmitter Cycle
• 50% Duty Transmitter Cycle
• 100% Duty Transmitter Cycle
BU-64863XC/D-XXX
• Idle
• 25% Duty Transmitter Cycle
• 50% Duty Transmitter Cycle
• 100% Duty Transmitter Cycle
MIN
TYP
MAX
UNITS
65
180
295
525
25
116
233
350
584
65
180
295
525
25
27
76
237
398
720
65
180
295
525
21
116
228
340
563
66
174
282
498
25
25
21
25
158
316
608
46
179
337
629
100
216
332
565
40
160
276
392
625
100
216
332
565
40
69
110
330
550
990
100
216
332
565
55
180
296
412
645
120
236
352
585
40
40
55
51
225
399
747
66
240
414
762
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
Data Device Corporation
www.ddc-web.com
5
BU-6474X/6484X/6486X
AL-11/12-0
FPGA/CPLD
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