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HY57V164010CLTC-10S: 产品描述Synchronous DRAM, 4MX4, 6ns, CMOS, PDSO44, 0.400 X 0.725 INCH, 0.80 MM PITCH, TSOP2-44; 产品类别存储存储; 文件大小117KB，共11页; 制造商SK Hynix(海力士); 官网地址http://www.hynix.com/eng/

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HY57V164010CLTC-10S概述

Synchronous DRAM, 4MX4, 6ns, CMOS, PDSO44, 0.400 X 0.725 INCH, 0.80 MM PITCH, TSOP2-44

HY57V164010CLTC-10S规格参数

参数名称	属性值
零件包装代码	TSOP2
包装说明	TSOP2,
针数	44
Reach Compliance Code	unknown
ECCN代码	EAR99
访问模式	DUAL BANK PAGE BURST
最长访问时间	6 ns
其他特性	AUTO/SELF REFRESH
JESD-30 代码	R-PDSO-G44
JESD-609代码	e6
长度	18.41 mm
内存密度	16777216 bit
内存集成电路类型	SYNCHRONOUS DRAM
内存宽度	4
功能数量	1
端口数量	1
端子数量	44
字数	4194304 words
字数代码	4000000
工作模式	SYNCHRONOUS
最高工作温度	70 °C
最低工作温度
组织	4MX4
封装主体材料	PLASTIC/EPOXY
封装代码	TSOP2
封装形状	RECTANGULAR
封装形式	SMALL OUTLINE, THIN PROFILE
认证状态	Not Qualified
座面最大高度	1.2 mm
自我刷新	YES
最大供电电压 (Vsup)	3.6 V
最小供电电压 (Vsup)	3 V
标称供电电压 (Vsup)	3.3 V
表面贴装	YES
技术	CMOS
温度等级	COMMERCIAL
端子面层	TIN BISMUTH
端子形式	GULL WING
端子节距	0.8 mm
端子位置	DUAL
宽度	10.16 mm
Base Number Matches	1

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HY57V164010C

2 Banks x 2M x 4 Bit Synchronous DRAM

DESCRIPTION

The Hyundai HY57V164010C is a 16,777,216-bits CMOS Synchronous DRAM, ideally suited for the main memory

applications which require large memory density and high bandwidth. HY57V164010C is organized as 2banks of

2,097,152x4.

HY57V164010C is offering fully synchronous operation referenced to a positive edge clock. All inputs and outputs are

synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve very high band-

width. All input and output voltage levels are compatible with LVTTL.

Programmable options include the length of pipeline (Read latency of 1,2, or 3), the number of consecutive read or

write cycles initiated by a single control command (Burst length of 1,2,4,8, or full page), and the burst count

sequence(sequential or interleave). A burst of read or write cycles in progress can be terminated by a burst terminate

command or can be interrupted and replaced by a new burst read or write command on any cycle. (This pipeline

design is not restricted by a `2N` rule.)

FEATURES

•

Single 3.3V

0.3V power supply

All device pins are compatible with LVTTL interface

JEDEC standard 400mil 44pin TSOP-II with 0.8mm

of pin pitch

All inputs and outputs referenced to positive edge of

system clock

Data mask function by DQM

Internal two banks operation

•

Auto refresh and self refresh

4096 refresh cycles / 64ms

Programmable Burst Length and Burst Type

- 1, 2, 4, 8 and Full Page for Sequence Burst

- 1, 2, 4 and 8 for Interleave Burst

Programmable CAS Latency ; 1, 2, 3 Clocks

ORDERING INFORMATION

Part No.

HY57V164010CLTC-8

HY57V164010CLTC-10P

HY57V164010CLTC-10S

HY57V164010CLTC-10

Clock Frequency

125MHz

100MHz

Organization

Interface

Package

2Banks x 2Mbits x 4

100MHz

LVTTL

400mil

44pin TSOP II

This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume any

responsibility for use of circuits described. No patent licenses are implied

Rev. 1.5/Dec.98

HY57V164010CLTC-10S相似产品对比

	HY57V164010CLTC-10S	HY57V164010CLTC-10P	HY57V164010CLTC-8	HY57V164010CLTC-10
描述	Synchronous DRAM, 4MX4, 6ns, CMOS, PDSO44, 0.400 X 0.725 INCH, 0.80 MM PITCH, TSOP2-44	Synchronous DRAM, 4MX4, 6ns, CMOS, PDSO44, 0.400 X 0.725 INCH, 0.80 MM PITCH, TSOP2-44	Synchronous DRAM, 4MX4, 6ns, CMOS, PDSO44, 0.400 X 0.725 INCH, 0.80 MM PITCH, TSOP2-44	Synchronous DRAM, 4MX4, 8ns, CMOS, PDSO44, 0.400 X 0.725 INCH, 0.80 MM PITCH, TSOP2-44
零件包装代码	TSOP2	TSOP2	TSOP2	TSOP2
包装说明	TSOP2,	TSOP2,	TSOP2,	TSOP2,
针数	44	44	44	44
Reach Compliance Code	unknown	unknown	unknown	unknown
ECCN代码	EAR99	EAR99	EAR99	EAR99
访问模式	DUAL BANK PAGE BURST	DUAL BANK PAGE BURST	DUAL BANK PAGE BURST	DUAL BANK PAGE BURST
最长访问时间	6 ns	6 ns	6 ns	8 ns
其他特性	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH
JESD-30 代码	R-PDSO-G44	R-PDSO-G44	R-PDSO-G44	R-PDSO-G44
JESD-609代码	e6	e6	e6	e6
长度	18.41 mm	18.41 mm	18.41 mm	18.41 mm
内存密度	16777216 bit	16777216 bit	16777216 bit	16777216 bit
内存集成电路类型	SYNCHRONOUS DRAM	SYNCHRONOUS DRAM	SYNCHRONOUS DRAM	SYNCHRONOUS DRAM
内存宽度	4	4	4	4
功能数量	1	1	1	1
端口数量	1	1	1	1
端子数量	44	44	44	44
字数	4194304 words	4194304 words	4194304 words	4194304 words
字数代码	4000000	4000000	4000000	4000000
工作模式	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS
最高工作温度	70 °C	70 °C	70 °C	70 °C
组织	4MX4	4MX4	4MX4	4MX4
封装主体材料	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
封装代码	TSOP2	TSOP2	TSOP2	TSOP2
封装形状	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
封装形式	SMALL OUTLINE, THIN PROFILE	SMALL OUTLINE, THIN PROFILE	SMALL OUTLINE, THIN PROFILE	SMALL OUTLINE, THIN PROFILE
认证状态	Not Qualified	Not Qualified	Not Qualified	Not Qualified
座面最大高度	1.2 mm	1.2 mm	1.2 mm	1.2 mm
自我刷新	YES	YES	YES	YES
最大供电电压 (Vsup)	3.6 V	3.6 V	3.6 V	3.6 V
最小供电电压 (Vsup)	3 V	3 V	3 V	3 V
标称供电电压 (Vsup)	3.3 V	3.3 V	3.3 V	3.3 V
表面贴装	YES	YES	YES	YES
技术	CMOS	CMOS	CMOS	CMOS
温度等级	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL
端子面层	TIN BISMUTH	TIN BISMUTH	TIN BISMUTH	TIN BISMUTH
端子形式	GULL WING	GULL WING	GULL WING	GULL WING
端子节距	0.8 mm	0.8 mm	0.8 mm	0.8 mm
端子位置	DUAL	DUAL	DUAL	DUAL
宽度	10.16 mm	10.16 mm	10.16 mm	10.16 mm
Base Number Matches	1	1	1	1

HY57V164010CLTC-10S

HY57V164010CLTC-10S概述

HY57V164010CLTC-10S规格参数

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