Freescale Semiconductor, Inc.
Engineering Bulletin
EB622/D
Rev. 1, 5/2003
Review Draft
Motorola Book E
Implementation Standards:
APU ID Reference
This document contains the following:
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Topic
Section 1.1, “Introduction”
Section 1.2, “Motivation”
Section 1.3, “Implementation”
Section 1.4, “References”
Page
2
2
2
3
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Introduction
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1.1
Introduction
The e500 Application Binary Interface (ABI), and possibly other ABIs, provide a mechanism for specifying
the types and revisions of APUs that are required for proper behavior of a program. This information is
contained in an optional
.PPC.EMB.apuinfo
section in the ELF-format object file. This document
provides the official mapping between Motorola Book E Implementation Standard APUs and the numeric
APU IDs that are used in the APUinfo section. See “APU Information Section” in Chapter 3, “Object Files,”
of the PowerPC
e500 Application Binary Interface
, for more details on the format and usage of this section.
1.2
Motivation
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The APU information is intended primarily to allow link-time checks of compatibility between object files
to avoid obvious errors. For example, because both AltiVec and the signal processing engine (SPE) APU use
the same instruction encodings for different instructions, linking an object file that requires AltiVec
instructions with an object file that requires SPE instructions should provide an error message.
The APU information can also be used by disassemblers to unambiguously disassemble such shared
opcodes. In addition, operating systems can use the APUinfo section in an application to provide transparent
emulation of APUs that are not present in the hardware. Without APU information, an operating system
would not know whether it should emulate AltiVec or SPE semantics for certain instruction encodings.
1.3
Implementation
The APUinfo section contains an entry for each APU that the object file requires. Each entry contains a
32-bit word: an upper 16-bit half word specifying the APU type, and a lower 16-bit half word specifying the
revision of that APU. This document presents the current assignments for the APU types. See the reference
manual for the implementation to determine the revision of an APU for the lower half word of the entry.
Table 1-1 provides the current APU ID assignments. Note that this application note is the definitive source
for APU ID assignments and will be revised as new APUs are added.
Table 1-1. APU IDs
APU ID (16 Bits)
0x0000–0x003E
0x003f
0x0040
0x0041
0x0042
0x0043
0x0044–0x00FF
0x0100
0x0101
0x0102
0x0102–0xFFFF
1
APU
Reserved for legacy use
Motorola AltiVec APU
1
Book E integer select (
isel
) APU
Motorola Book E performance monitor APU
Motorola Book E machine check APU
Motorola Book E cache locking APU
Reserved
Motorola Book E SPE APU
Motorola Book E SPFP APU
e500 branch-locking APU (also called the BTB locking APU)
Reserved
Although AltiVec predates the Book E concept of APUs, AltiVec can be considered an APU.
2
Motorola Book E Implementation Standards: APU ID Reference
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MOTOROLA
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References
1.4
References
PowerPC e500 Application Binary Interface,
Motorola Order Number E500ABIUG/D
AltiVec Technology Programming Environments Manual,
Motorola Order Number ALTIVECPEM/D
PowerPC e500 Core Complex Reference Manual,
Motorola Order Number E500CORERM/D
EREF: A Reference for Motorola Book E and the e500 Core,
Motorola Order Number EREF/D
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MOTOROLA
Motorola Book E Implementation Standards: APU ID Reference
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EB622/D
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