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CN63300-1200BG900-CP

产品描述Microprocessor
产品类别嵌入式处理器和控制器    微控制器和处理器   
文件大小190KB,共2页
制造商Cavium Networks
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CN63300-1200BG900-CP概述

Microprocessor

CN63300-1200BG900-CP规格参数

参数名称属性值
厂商名称Cavium Networks
包装说明,
Reach Compliance Codeunknown
Base Number Matches1

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Networks That Think ...
TM
Multi-Core MIPS64 Processors
R
OCTEON II CN63XX Multi-Core MIPS64 Processors
TM
Product Brief
OVERVIEW
The OCTEON II CN63XX family of Multi-Core MIPS64 Internet Application Processors targets mainstream, high-volume
applications in enterprise routers, switches, appliances, 3G/4G basestations, and intelligent storage and server adapters
up to 10+Gbps. The family includes six software and pin-compatible processors, with two to six cnMIPS64 v2 cores on
a massively integrated SoC that includes the latest SERDES-based I/O’s including PCIe Gen2, XAUI, and sRIO, along with
Cavium’s most advanced third-generation application hardware acceleration to deliver a 2x - 5x performance, power,
and real-estate advantage over alternative solutions.
FEATURES
Up to 1.5 GHz / core with large 2MB L2 cache and
BENEFITS
2x control plane performance per core with total
enhanced core architecture
Packet I/O processors and hardware application
acceleration manager
New security acceleration engine with expanded
algorithm support (3GSNOW)
Third-generation pattern search capability with
new Hyper Finite Automata (HFA) engines
Latest memory and I/O Interfaces: DDR3, SRIO,
PCIe Gen2, 10GbE/GbE
7W to 17W max power and power optimizer technology
Powerful DMA, RAID, and De-dup engines
compute of up to 9 GHz
Up to 10+Gbps of packet processing with QoS
Up to 10+Gbps security, addition of encryption
support for 4G wireless
4Gbps+ Deep Packet Inspection, with mainstream
pattern memory and 10X+ reduction in graph size
Future proof I/O’s along with seamless connectivity
to DSP’s and peripherals
2x performance/watt over best alternatives
Enables 10 Gbps storage HBAs, intelligent server
o oad cards
OCTEON II CN63XX - Block Diagram
1x16b DDR3-1600
Timers
FPA
DMA
Sec Vault
RAID 5/6
De-dup
HFA Engines
(RegEx v3)
Memory
Controller
Compress
/Decomp
Application
Acceleration
Manager
Packet
Input
Crypto
Security
v3
Packet
MIPS64 r2
Integer Core
37K Icache
32K Dcache
2K Write Buffer
x12
Gen2
SERDES
x4
XAUI or
4x SGMII
PCIe v2/
sRIO
PCIe v2/
sRIO
2-6
cnMIPS II
cores
 
Crypto
Security
v3
Packet
MIPS64 r2
Integer Core
37K Icache
32K Dcache
2K Write Buffer
x4
x4
I/O Bridge
Misc I/O
Packet
Output
2 MB Shared
L2 Cache
Hyper Access
Memory
Controller v2
Boot/Flash (NOR & NAND), CF,
16 GPIO, 2x UART, 2x 12C, 2x
USB 2.0 w/PHY, 2 x RG/MII
1 x 72b
DDR3-1600
16GB max
Mountain View, CA 94043
T
650.623.7000
F
650.625.9751
E
sales@caviumnetworks.com
www.caviumnetworks.com

 
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