SiT3372
1 MHz to 220 MHz Ultra-low Jitter Differential VCXO
Features
Any frequency between 1 MHz and 220 MHz accurate to 6
decimal places
Widest pull range options: ±25, ±50, ±80, ±100, ±150, ±200,
±400, ±800, ±1600, ±3200 ppm
0.23 ps RMS phase jitter (typ) over 12 kHz to 20 MHz
bandwidth
Wide temperature range support from -40°C to 105°C
Industry-standard packages: 7.0 x 5.0 mm, 5.0 x 3.2 mm,
3.2 x 2.5 mm packages
For frequencies 220.000001 MHz to 720 MHz, refer to
SiT3373
Applications
Cable Modem Termination System (CMTS), Video,
Broadcasting System, Audio, Industrial Sensors,
Remote Radio Head (RRH)
SATA, SAS, 10Gbps Ethernet, Fibre Channel,
PCI-Express
Electrical Characteristics
Table 1. Electrical Characteristics – Common to LVPECL, LVDS and HCSL
All Min and Max limits in the Electrical Characteristics tables are specified over temperature and rated operating voltage with standard
output termination show in the termination diagrams. Typical values are at 25°C and nominal supply voltage.
Parameter
Output Frequency Range
Frequency Stability
Symbol
f
F_stab
Min.
1
-15
-25
-35
-50
Operating Temperature Range
T_use
-20
-40
-40
-40
Supply Voltage
Vdd
2.97
2.7
2.52
2.25
Pull Range
PR
Typ.
–
–
–
–
–
–
–
–
–
3.3
3.0
2.8
2.5
Max.
220
+15
+25
+35
+50
+70
+85
+95
+105
3.63
3.3
3.08
2.75
Unit
MHz
ppm
ppm
ppm
ppm
°C
°C
°C
°C
V
V
V
V
ppm
See the APR (Absolute Pull Range)
Table 11.
Contact
SiTime
for custom pull range options.
Voltage at which maximum frequency deviation is guaranteed
Voltage at which minimum frequency deviation is guaranteed
Contact
SiTime
for other input bandwidth options
Extended Industrial
Extended Commercial
Industrial.
Condition
Accurate to 6 decimal places
Inclusive of initial tolerance, operating temperature, rated power
supply voltage, load variations, and first year aging at 25°C.
Contact
SiTime
for ±15 ppm.
Frequency Range
Frequency Stability
Temperature Range
Supply Voltage
Voltage Control Characteristics
±25, ±50, ±80, ±100, ±150,
±200, ±400, ±800, ±1600,
±3200
90%
–
–
–
–
–
–
10
10
–
–
10%
–
–
1.0
–
Input Characteristics
Input Voltage High
Input Voltage Low
Input Pull-up Impedance
Duty Cycle
Startup Time
OE Enable/Disable Time
VIH
VIL
Z_in
DC
T_start
T_oe
70%
–
–
45
–
–
–
–
100
–
–
–
–
30%
-
55
3.0
3.8
Vdd
Vdd
kΩ
%
ms
µs
Measured from the time Vdd reaches its rated minimum value.
f = 156.25 MHz. Measured from the time OE pin reaches
rated VIH and VIL to the time clock pins reach 90% of swing
and high-Z. See
Figure 7
and
Figure 8
Pin 2, OE
Pin 2, OE
Pin 2, OE logic high or logic low
Upper Control Voltage
Lower Control Voltage
Control Voltage Input Impedance
Control Voltage Input Bandwidth
Pull Range Linearity
Frequency Change Polarity
VC_U
VC_L
VC_z
V_c
Lin
–
Vdd
Vdd
MΩ
kHz
%
Positive Slope
Output Characteristics
Startup and OE Timing
Rev 1.03
May 10, 2018
www.sitime.com
SiT3372
1 MHz to 220 MHz Ultra-low Jitter Differential VCXO
Table 2. Electrical Characteristics – LVPECL Specific
Parameter
Current Consumption
OE Disable Supply Current
Output Disable Leakage Current
Maximum Output Current
Output High Voltage
Output Low Voltage
Output Differential Voltage Swing
Rise/Fall Time
RMS Period Jitter
[1]
Symbol
Idd
I_OE
I_leak
I_driver
VOH
VOL
V_Swing
Tr, Tf
T_jitt
T_phj
Min.
–
–
–
–
Vdd-1.15
Vdd-2.0
1.2
–
–
–
Typ.
–
–
0.15
–
–
–
1.6
225
1.0
0.225
Max.
92
61
–
33
Vdd-0.7
Vdd-1.5
2.0
290
1.6
0.270
Unit
mA
mA
µA
mA
V
V
V
ps
ps
ps
Condition
Excluding Load Termination Current, Vdd = 3.3V or 2.5V
OE = Low
OE = Low
Maximum average current drawn from OUT+ or OUT-
See
Figure 3
See
Figure 3
See
Figure 4
20% to 80%, see
Figure 4
f = 100, 156.25 or 212.5 MHz, Vdd = 3.3V or 2.5V
f = 156.25 MHz, Integration bandwidth = 12 kHz to 20 MHz, all
Vdd levels, includes spurs, pull range = 100 ppm. Temperature
ranges -20 to 70ºC and -40 to 85ºC.
f = 156.25 MHz, Integration bandwidth = 12 kHz to 20 MHz, all
Vdd levels, includes spurs, pull range = 100 ppm. Temperature
ranges -40 to 95 ºC and -40 to 105ºC
f = 156.25 or 322.265625 MHz, IEEE802.3-2005 10GbE jitter
mask integration bandwidth = 1.875 MHz to 20 MHz, includes
spurs, all Vdd levels.
f = 100, 156.25 or 212.5 MHz, Vdd = 3.3V or 2.5V
f = 156.25 MHz, Integration bandwidth = 12 kHz to 20 MHz, all
Vdd levels, includes spurs, pull range = 100 ppm. Temperature
ranges -20 to 70ºC and -40 to 85ºC.
f = 156.25 MHz, Integration bandwidth = 12 kHz to 20 MHz, all
Vdd levels, includes spurs, pull range = 100 ppm. Temperature
ranges -40 to 95 ºC and -40 to 105ºC
f = 156.25 or 322.265625 MHz, IEEE802.3-2005 10GbE jitter
mask integration bandwidth = 1.875 MHz to 20 MHz, includes
spurs, all Vdd levels.
Current Consumption
Output Characteristics
Jitter – 7.0 x 5.0 mm package
RMS Phase Jitter (random)
–
0.225
0.300
ps
–
0.1
–
ps
Jitter – 5.0 x 3.2 mm and 3.2 x 2.5 mm package
RMS Period Jitter
[1]
T_jitt
T_phj
–
–
1.0
0.225
1.6
0.275
ps
ps
RMS Phase Jitter (random)
–
0.225
0.340
ps
–
0.1
–
ps
Notes:
1. Measured according to JESD65B
Rev 1.03
Page 2 of 16
www.sitime.com
SiT3372
1 MHz to 220 MHz Ultra-low Jitter Differential VCXO
Table 3. Electrical Characteristics – LVDS
Parameter
Current Consumption
OE Disable Supply Current
Output Disable Leakage Current
Differential Output Voltage
VOD Magnitude Change
Offset Voltage
VOS Magnitude Change
Rise/Fall Time
Symbol
Idd
I_OE
I_leak
VOD
∆VOD
VOS
∆VOS
Tr, Tf
Min.
–
–
–
250
–
1.125
–
–
Typ.
–
–
0.15
–
–
–
–
400
Max.
84
62
–
450
50
1.375
50
470
Unit
mA
mA
µA
mV
mV
V
mV
ps
Condition
Excluding Load Termination Current, Vdd = 3.3V or 2.5V
OE = Low
OE = Low
See
Figure 5
See
Figure 5
See
Figure 5
See
Figure 5
Measured with 2 pF capacitive loading to GND, 20% to 80%,
see
Figure 6
f = 100, 156.25 or 212.5 MHz, Vdd = 3.3V or 2.5V
f = 156.25 MHz, Integration bandwidth = 12 kHz to 20 MHz, all Vdd
levels, includes spurs, pull range = 100 ppm.
Temperature ranges -20 to 70ºC and -40 to 85ºC.
f = 156.25 MHz, Integration bandwidth = 12 kHz to 20 MHz, all Vdd
levels, includes spurs, pull range = 100 ppm.
Temperature ranges -40 to 95 ºC and -40 to 105ºC
f = 156.25 or 322.265625 MHz, IEEE802.3-2005 10GbE jitter mask
integration bandwidth = 1.875 MHz to 20 MHz, includes spurs, all
Vdd levels.
f = 100, 156.25 or 212.5 MHz, Vdd = 3.3V or 2.5V
f = 156.25 MHz, Integration bandwidth = 12 kHz to 20 MHz, all Vdd
levels, includes spurs, pull range = 100 ppm.
Temperature ranges -20 to 70ºC and -40 to 85ºC.
f = 156.25 MHz, Integration bandwidth = 12 kHz to 20 MHz, all Vdd
levels, includes spurs, pull range = 100 ppm.
Temperature ranges -40 to 95 ºC and -40 to 105ºC
f = 156.25 or 322.265625 MHz, IEEE802.3-2005 10GbE jitter mask
integration bandwidth = 1.875 MHz to 20 MHz, includes spurs, all
Vdd levels.
Current Consumption
Output Characteristics
Jitter – 7.0 x 5.0 mm package
RMS Period Jitter
[2]
T_jitt
T_phj
–
–
1.0
0.215
1.6
0.265
ps
ps
RMS Phase Jitter (random)
–
0.215
0.300
ps
–
0.1
–
ps
Jitter – 5.0 x 3.2 mm and 3.2 x 2.5 mm package
RMS Period Jitter
[2]
T_jitt
T_phj
–
–
1.0
0.235
1.6
0.275
ps
ps
RMS Phase Jitter (random)
–
0.235
0.320
ps
–
0.1
–
ps
Notes:
2. Measured according to JESD65B
Rev 1.03
Page 3 of 16
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SiT3372
1 MHz to 220 MHz Ultra-low Jitter Differential VCXO
Table 4. Electrical Characteristics – HCSL
Parameter
Current Consumption
OE Disable Supply Current
Output Disable Leakage Current
Maximum Output Current
Output High Voltage
Output Low Voltage
Output Differential Voltage Swing
Rise/Fall Time
Symbol
Idd
I_OE
I_leak
I_driver
VOH
VOL
V_Swing
Tr, Tf
Min.
–
–
–
–
0.60
-0.05
1.2
–
Typ.
–
–
0.15
–
–
–
1.4
360
Max.
97
62
–
35
0.90
0.08
1.80
495
Unit
mA
mA
µA
mA
V
V
V
ps
Condition
Excluding Load Termination Current, Vdd = 3.3V or 2.5V
OE = Low
OE = Low
Maximum average current drawn from OUT+ or OUT-
See
Figure 3
See
Figure 3
See
Figure 4
Measured with 2 pF capacitive loading to GND, 20% to 80%,
See
Figure 4
f = 100, 156.25 or 212.5 MHz, Vdd = 3.3V or 2.5V
f = 156.25 MHz, Integration bandwidth = 12 kHz to 20 MHz, all Vdd
levels, includes spurs, pull range = 100 ppm.
Temperature ranges -20 to 70ºC and -40 to 85ºC.
f = 156.25 MHz, Integration bandwidth = 12 kHz to 20 MHz, all Vdd
levels, includes spurs, pull range = 100 ppm.
Temperature ranges -40 to 95 ºC and -40 to 105ºC
f = 156.25 or 322.265625 MHz, IEEE802.3-2005 10GbE jitter mask
integration bandwidth = 1.875 MHz to 20 MHz, includes spurs, all Vdd
levels.
f = 100, 156.25 or 212.5 MHz, Vdd = 3.3V or 2.5V
f = 156.25 MHz, Integration bandwidth = 12 kHz to 20 MHz, all Vdd
levels, includes spurs, pull range = 100 ppm.
Temperature ranges -20 to 70ºC and -40 to 85ºC.
f = 156.25 MHz, Integration bandwidth = 12 kHz to 20 MHz, all Vdd
levels, includes spurs, pull range = 100 ppm.
Temperature ranges -40 to 95 ºC and -40 to 105ºC
f = 156.25 or 322.265625 MHz, IEEE802.3-2005 10GbE jitter mask
integration bandwidth = 1.875 MHz to 20 MHz, includes spurs, all
Vdd levels.
Current Consumption
Output Characteristics
Jitter – 7.0 x 5.0 mm package
RMS Period Jitter
[3]
T_jitt
T_phj
–
–
1.0
0.220
1.6
0.270
ps
ps
RMS Phase Jitter (random)
–
0.220
0.300
ps
–
0.1
–
ps
Jitter – 5.0 x 3.2 mm and 3.2 x 2.5 mm package
RMS Period Jitter
[3]
T_jitt
T_phj
–
–
1.0
0.230
1.6
0.275
ps
ps
RMS Phase Jitter (random)
–
0.230
0.340
ps
–
0.1
–
ps
Notes:
3. Measured according to JESD65B
Rev 1.03
Page 4 of 16
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SiT3372
1 MHz to 220 MHz Ultra-low Jitter Differential VCXO
Table 5. Pin Description
Pin
1
Symbol
VIN
Input
No Connect
(NC)
2
NC/OE
Output Enable
(OE)
Power
Output
Output
Power
Control Voltage
No Connect: Leave floating or connect to GND for better heat dissipation. NC for all 3.2 x 2.5 mm
package options.
H
: specified frequency output
L: output is high impedance. Only output driver is disabled. OE function only available on 7050
package. Pin 2 on 3225 package is NC.
Vdd Power Supply Ground
Oscillator output
Complementary oscillator output
Power supply voltage
[6]
[4,5]
Functionality
3
4
5
6
GND
OUT+
OUT-
Vdd
Top View
Top View
Figure 1. Pin Assignments
(7.0 x 5.0 mm and
5.0 x 3.2 mm packages)
Figure 2. Pin Assignments
(3.2 x 2.5 mm package)
Notes:
4. A pull-up resistor of 10 kΩ or less is recommended if pin 1 is not externally driven.
5. OE mode is only available in the 7050 and 5032 packages. 3225 package is NC.
6. A capacitor of value 0.1 µF or higher between Vdd and GND is required. An additional 10 µF capacitor between Vdd and GND is required for the best
phase jitter performance.
Rev 1.03
Page 5 of 16
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stm32/stm8
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