CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. The Input Control Voltage, V
IN
, may range from -0.85V to +7V for a V
CC
supply voltage of 0V to +25V.
2.
θ
JA
is measured with the component mounted on an evaluation PC board in free air.
3. The worst case thermal resistance,
θ
JC
for the SIP TS-001AA 5 pin package is 4
o
C/W. The calculation for dissipation and junction
temperature rise due to dissipation is:
P
D
= (V
CC
-V
OUT
)(I
OUT
) + (V
CC
)(I
CCMAX
- I
OUT
) or (V
CC
)(
I
CCMAX)
- (V
OUT
)(I
OUT
)
T
J
= T
AMBIENT
+ (P
D
) (θ
JC
) for an infinite Heat Sink.
Refer to Figure 1 for Derating based on Dissipation and Thermal Resistance. Derating from 150
o
C is based on the reciprocal of thermal
resistance,
θ
JC
+θ
HS
. For example: Where
θ
JC
= 4
o
C/W and given
θ
HS
= 6
o
/W as the thermal resistance of an external Heat Sink, the
junction-to-air thermal resistance,
θ
JA
= 10
o
C/W. Therefore, for the maximum allowed dissipation, derate 0.1W/
o
C for each degree from
T
AMB
to the maximum rated junction temperature of 150
o
C. If T
AMB
= 100
o
C, the maximum P
D
is (150 - 100) x 0.1W/
o
C = 5W.
Electrical Specifications
PARAMETER
Operating Voltage Range
Over-Voltage Shutdown
Over-Temperature Limiting
Negative Pulse
Output Clamp Voltage
Short Circuit Current Limiting
Input Control ON
Input Control OFF
Input Current High
Input Current Low
Supply Current, Full Load,
Input Control ON
Supply Current, No Load,
Input Control OFF
Input-Output Forward Voltage
Drop (V
CC
- V
OUT
)
Output Leakage
Turn-On Time
Turn-OFF Time
NOTE:
T
A
= -40
ο
C to 125
ο
C, V
IN
= 2V, V
CC
= +12V, Unless Otherwise Specified
SYMBOL
V
CC
V
OVSD
T
SD
V
CL
I
CL
= -100mA, V
CC
= 4.5V to 25V,
V
IN
= 0.8V
(Note 4)
R
L
= 1kΩ, V
IN
= 2V
TEST CONDITIONS
MIN
4.5
26
-
(V
CC
- 62)
TYP
-
33
150
(V
CC
- 37)
MAX
25
38
-
(V
CC
- 28)
UNITS
V
V
o
C
V
I
SC
V
IH
V
IL
I
IH
I
IL
I
CCMAX
0.7
2.0
-
1.1
-
-
-
-
-
1.7
-
0.8
40
30
0.6
A
V
V
µA
µA
A
V
IN
= 5.5V, V
CC
= 6V to 24
V
IN
= 0.8V, V
CC
= 6V to 24V
V
IN
= 2V; I
OUT
= 0.55A
10
10
-
I
CCMIN
V
IN
= 0V; I
OUT
= 0A
-
55
150
µA
V
SAT
I
OUT
= 0.6A, V
CC
= 4.5V to 25V
-
-
1.0
V
I
OUT_LK
t
ON
t
OFF
V
IN
= 0.8V, V
CC
= 6V to 24V
R
L
= 80Ω, T
A
= 125
°
C
R
L
= 80Ω, T
A
= 125
°
C
-
-
-
-
6
17
50
20
65
µA
µs
µs
4. Short Circuit current will be reduced when Thermal Shutdown occurs. Testing of a short circuit current may require a short duration pulse.
2
HIP1031
Typical Application
HIP1031 HIGH SIDE DRIVER
0.47
µ
F
POWER
SUPPLY
V
CC
1
NEG.
CLAMP
ZENER
R
S
V
OUT
2
LOADS:
RELAYS
SOLENOIDS
LAMPS
MOTORS
OVER-
VOLTAGE
SHUTDOWN
CURRENT
LIMIT
THERMAL
LIMIT
CONTROL
CIRCUIT
TYPICAL
LOAD
V
IN
5
CMOS/TTL
INPUT
LOGIC SWITCH
TO V
IN
3
HIP1031
TAB
V
BATT
V
OUT
4
GND
V
SAT
GND
GND
V
CLAMP
V
CL
Typical Performance Curves
16
14
DISSIPATION WATTS (W)
12
10
8
6
4
2
0
-50
WITH EXT. 6
o
C/W
HEAT SINK
WITH EXT.
0
o
C/W
HEAT SINK
(INFINITE
HEAT SINK)
0.8
FORWARD VOLTAGE DROP (V)
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
-25
0
25
50
75
100
125
150
-50
-25
0
25
50
75
100
125
AMBIENT TEMPERATURE (
o
C)
AMBIENT TEMPERATURE (
o
C)
V
SAT
AT I
OUT
= 0.5A
V
SAT
AT I
OUT
= 0.25A
V
SAT
AT I
OUT
= 0.75A
HIP1031 V
SAT
WITH
20Ω RESISTIVE LOAD
FIGURE 1. DISSIPATION DERATING CURVES
FIGURE 2. TYPICAL V
SAT
CHARACTERISTIC vs
TEMPERATURE
3
HIP1031
Single-In-Line Plastic Packages (SIP)
Ø
P
E
A
A
1
Q
H
1
Z5.067C
(ALTERNATE VERSION)
5 LEAD PLASTIC SINGLE-IN-LINE PACKAGE
INCHES
SYMBOL
A
MIN
0.170
0.048
0.030
0.031
0.018
0.590
0.395
MAX
0.180
0.052
0.034
0.041
0.022
0.610
0.405
MILLIMETERS
MIN
4.32
1.22
0.77
0.79
0.46
14.99
10.04
MAX
4.57
1.32
0.86
1.04
0.55
15.49
10.28
NOTES
-
3, 4
3, 4
3, 4
3, 4
-
-
5
5
-
6
-
2
-
-
Rev. 1 4/96
NOTES:
1. These dimensions are within allowable dimensions of Rev. A of
JEDEC TS-001AA outline dated 8-89.
2. Solder finish uncontrolled in this area.
3. Lead dimension (without solder).
4. Add typically 0.002 inches (0.05mm) for solder plating.
5. Position of lead to be measured 0.250 inches (6.35mm) from
bottom of dimension D.
6. Position of lead to be measured 0.100 inches (2.54mm) from
bottom of dimension D.
7. Controlling dimension: Inch.
D
A
1
b
b
1
c
L
1
b
1
c
D
E
e
e
1
L
0.067 TYP
0.268 BSC
0.235
0.095
0.530
0.110
0.149
0.105
0.255
0.105
0.550
0.130
0.153
0.115
1.70 TYP
6.80 BSC
5.97
2.42
13.47
2.80
3.79
2.66
6.47
2.66
13.97
3.30
3.88
2.92
60
o
1 2 3 4 5
H
1
e
e
1
J
1
J
1
L
L
1
ØP
Q
b
All Intersil semiconductor products are manufactured, assembled and tested under
ISO9000
quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site
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