HIP0050
December 1996
0.3A/50V Octal Low Side Power Driver with
Serial Bus Control and Over-Current Fault Flag
Description
The HIP0050 is a logic controlled, eight channel Octal Low Side
Power Driver. As shown in the block diagram, the outputs are con-
trolled via the serial data interface which allows the data to be
shifted out, allowing control of other cascaded serial devices. If an
Over-Current (OC) short circuit exists in one output, it may be inde-
pendently shutdown while the other outputs remain in operation.
When a shorted output is latched off, it may be turned back on
when the next serial input data is latched. A fault flag (FLT) is set to
a low status to indicate current-limited shutdown. The outputs are
independently latched off when an OC fault is detected. The fault
latch is cleared on the next data strobe. Over-Temperature (OT)
shutdown is provided with hysteresis to force global shutdown of
all output drivers. Shutdown is maintained until the on-chip temper-
ature falls below the minimum hysteresis threshold point.
The HIP0050 is fabricated in a Power BiMOS IC process, and is
intended for use in automotive and other applications having a
wide range of temperature and electrical stress conditions. It is
particularly suited for driving lamps, displays, relays, and solenoids in
applications where low operating power, high breakdown voltage,
and high output current at high temperature is required. Higher
current needs can be met by paralleling adjacent output drivers
.
Features
• Octal NDMOS Output Drivers in a High Voltage
Power BiMOS Process
- Each Capable of Sinking 300mA
- Low Idle and Standby Current
• Over-Stress Protection - Each Output:
- Over-Current Latch Off . . . . . . . . . 300mA Min
- Over-Voltage Clamp . . . . . . . . . . . . . . . 50V Typ
• Thermal Shutdown with Hysteresis
• Serial Data Input, Parallel Output Power Drive
• Short Circuit Latch Off for Each Output
• Common Enable for Output Drivers and
Data Storage Register
• Ambient Operating
Temperature Range. . . . . . . . . . . . .-40
o
C to 85
o
C
- Optional 125
o
C Maximum Ambient Operating
Temperature Range (Dissipation Limited)
Applications
• Automotive and Industrial Systems
• Solenoids, Relays and Lamp Drivers
• Logic and
µP
Controlled Drivers
• Robotic Controls
Ordering Information
PART
NUMBER
HIP050IP
HIP0050IB
TEMP.
RANGE (
o
C)
-40 to 85
-40 to 85
PACKAGE
20 Ld PDIP
24 Ld SOIC
PKG. NO.
E20.3
M24.3
Pinouts
HIP0050
(PDIP)
TOP VIEW
DR2
DR3
FLT
EN
GND
GND
STR
SCK
DR4
1
2
3
4
5
6
7
8
9
20 DR1
19 DR0
18 SI
17 V
CC
16 GND
15 GND
14 LGND
13 SO
12 DR7
11 DR6
DR2 1
DR3 2
FLT 3
EN 4
GND 5
GND 6
GND 7
GND 8
STR 9
SCK 10
DR4 11
DR5 12
HIP0050
(SOIC)
TOP VIEW
24 DR1
23 DR0
22 SI
21 V
CC
20 GND
19 GND
18 GND
17 GND
16 LGND
15 SO
14 DR7
13 DR6
DR5 10
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207
|
Copyright
©
Intersil Corporation 1999
File Number
4034.1
1
HIP0050
Block Diagram
OUTPUT DRIVER
(ENABLE)
EN
(STROBE)
STR
Q0
SI
SERIAL
(SPI)
INPUT
REGISTER
(DATA IS
PARALLEL
OUTPUT
LATCHED
WHEN
STROBED)
Q1
Q2
POR
Q3
Q4
Q5
Q6
Q7
OVER-TEMPERATURE
SHUTDOWN W/HYS
FLT
S
R
FAULT
LATCH
OC
SHUT-
DOWN
(CHANNEL 1 OF 8)
DR#0
OUTPUT
LATCH
SCK
SO
Output Control Logic Table
STROBE
D1
0
1
1
1
1
0
1
D2
0
0
1
1
1
0
1
8-BIT SERIAL DATA (LATCHED)
D3
0
0
0
1
1
0
1
D4
0
0
0
0
1
0
1
D5
0
0
0
0
0
1
1
D6
0
0
0
0
0
1
1
D7
0
0
0
0
0
1
1
D8
0
0
0
0
0
1
1
DR1
OFF
ON
ON
ON
ON
OFF
ON
DR2
OFF
OFF
ON
ON
ON
OFF
ON
DR3
OFF
OFF
OFF
ON
ON
OFF
ON
OUTPUT
DR4
OFF
OFF
OFF
OFF
ON
OFF
ON
DR5
OFF
OFF
OFF
OFF
OFF
ON
ON
DR6
OFF
OFF
OFF
OFF
OFF
ON
ON
DR7
OFF
OFF
OFF
OFF
OFF
ON
ON
DR8
OFF
OFF
OFF
OFF
OFF
ON
ON
2
HIP0050
Absolute Maximum Ratings
Output Voltage, V
OUT
(Note 1) . . . . . . . . . . . . . . . . . . . -0.3V to V
OC
Input Voltage, V
IN
. . . . . . . . . . . . . . . . . . . . . . . . -0.3V to V
CC
+0.3V
Logic Supply Voltage, V
CC
. . . . . . . . . . . . . . . . . . . . . . -0.3V to +7V
Max Output Load Current, I
LOAD
(Per Output, Note 2) . . . . . . . . . I
CL
Max. Output Load Current, I
LOAD
(All Outputs ON, Note 2) . . . . . 2A
Operating Ambient Temperature Range, T
A
. . . . . . . . -40
o
C to 85
o
C
Operating Junction Temperature Range. . . . . . . . . . -40
o
C to 150
o
C
Storage Temperature Range, T
STG
. . . . . . . . . . . . . -55
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s Max). . . . . . . . . 300
o
C
(Lead Tips Only)
Thermal Information
θ
JC
(
o
C/W)
†
Package
PDIP . . . . . . . . . . . . .
SOIC . . . . . . . . . . . . .
10
10
θ
JA
(
o
C/W)
††
0
50
60
2
35
40
†
††
Versus Additional Square Inches 1oz. copper on PCB.
Standard Test Board, 0.002 diameter T/C located at lead
shoulder, middle lead.
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Operating Conditions
Typical Logic Supply Voltage, V
CC
. . . . . . . . . . . . . . . . . . . . . . +5V
I
CC
Supply Current, with 200mA each Output . . . . . . . . . . . . 2mA
I
CC
Supply Current, with No Load . . . . . . . . . . . . . . . . . . . . . 2mA
Input Low Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.0V
Input High Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.5V
Power Output Driver Voltage Range . . . . . . . . . . . . . . . . . 0 to V
OC
Power Output Driver Current Load, I
DR
. . . . . . . . . . . . . . . . 0 to I
CL
Typical Output r
DSON
Channel Resistance . . . . . . . . . . . . . . . . 2Ω
Typical Output Rise Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4µs
Typical Output Fall Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10µs
Electrical Specifications
PARAMETER
V
CC
= 4.5V to 5.5V, V
BATT
= 8V to 16V, T
A
= -40
o
C to 85
o
C; Unless Otherwise Specified
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
OUTPUTS DRIVERS
(DR0 TO DR7)
Output Channel Resistance
Output Over-Current Shutdown
Threshold
Output Clamping Voltage
Output Clamping Energy
Output OFF Leakage Current
Output Rise Time
Output Fall Time
Output Delay from Strobe, High
to Low Output Transition
Output Delay from Strobe, Low to
High Output Transition
LOGIC SUPPLY
Logic Supply Current, Loaded
Logic Supply Current, No Load
Logic Supply Under-Voltage
Reset Threshold
LOGIC INPUTS
(EN, SI, SCK, STR)
Threshold Voltage at Falling
Edge
Threshold Voltage at Rising
Edge
Hysteresis Voltage
Leakage Current
V
T
-
V
T
+
V
H
V
CC
= 5V
±10%
V
CC
= 5V
±10%
V
T
+ - V
T
-
0.2V
CC
-
0.85
-10
0.3V
CC
0.6V
CC
1.4
-
-
0.7V
CC
2.25
10
V
V
V
µA
I
CC
I
CC
All Outputs ON, 0.2A Load Per Output
All Outputs OFF
All Outputs OFF
-
-
3.5
2
2
-
4
4
4
mA
mA
V
r
DSON
I
CL
V
OC
E
OC
I
OFF
t
RISE
t
FALL
t
DHL
t
DLH
Outputs OFF
1ms Single Pulse Width, T
A
= 25
o
C,
(Refer to Figure 2 for SOA).
Output Voltage = 40V, T
A
= 85
o
C
Load = 75Ω, 0.01µF (Parallel)
Load = 75Ω, 0.01µF (Parallel)
Output Current = 200mA, T
A
= 85
o
C
-
300
42
-
-
0.5
0.5
1
0.2
2
-
50
25
-
4
10
4
2.6
4.0
500
58
-
10
30
30
10
10
Ω
mA
V
mJ
µA
µs
µs
µs
µs
I
LIN
SERIAL DATA CLOCK
(SCK) (Refer to Figure 1 for Waveform Detail)
Frequency
Pulse Width High
f
SCK
t
W(SCKH)
-
-
-
27
1.6
175
MHz
ns
3
HIP0050
Electrical Specifications
PARAMETER
Pulse Width Low
V
CC
= 4.5V to 5.5V, V
BATT
= 8V to 16V, T
A
= -40
o
C to 85
o
C; Unless Otherwise Specified
(Continued)
SYMBOL
t
W(SCKL)
CONDITIONS
MIN
-
TYP
27
MAX
175
UNITS
ns
SERIAL DATA IN
(SI) (Refer to Figure 1 for Waveform Detail)
Input Setup Time
Input Hold Time
STROBE (STR)
Strobe Pulse Width
Clock to Strobe Delay
t
W(S)
t
D(CS)
-
-
12
5
150
75
ns
ns
t
SUI
T
HI
-
-
1.1
1.5
75
75
ns
ns
SERIAL DATA OUT
(SO) (Refer to Figure 1 for Waveform Detail)
Low Level Output Voltage
High Level Output Voltage
Propagation Delay
PROTECTION PARAMETERS
Fault Output (FLT) Low
Over-Temp. (OT) Shutdown
OT Shutdown Hysteresis
NOTES:
1. The MOSFET Output Drain is internally clamped with a Drain-to-Gate Zener Diode that turns on the MOSFET; holding the drain at the
output clamp voltage V
OC
.
2. The HIP0050 Output Drive is protected by an internal current shutdown. The I
CL
over-current shutdown threshold parameter specification
defines the maximum current. The minimum limit for this threshold is 300mA. The maximum current with all outputs ON may be further
limited by dissipation.
3. Package dissipation is based on thermal resistance capability in a normal operating environment. The junction to ambient thermal resis-
tance values are defined here as a PC Board mounted device with minimal copper. Due to the heat conducting capability of the DIP and
SOIC package lead frames, 35
o
C/W thermal resistance can be achieved with approximately 2 square inches of 1 oz. copper PC Board
area. The junction to lead thermal resistance values are based on measurements from the chip to the ground leads of the package.
V
OL
T
SD
T
H
Sink Current = 1.6mA
-
145
5
-
155
10
0.4
165
20
V
o
C
o
V
OL
V
OH
t
P(CD)
Sink Current = 1.6mA
Source Current = -1.6mA
-
3.7
75
0.2
4.4
260
0.4
-
500
V
V
ns
C
t
W(SCK)
SCK (CLOCK)
t
SUI
SI (SERIAL DATA IN)
t
W(SCK)
t
HI
t
D(CS)
STR (STROBE)
t
D(HL)
t
D(LH)
t
W(S)
90%
DRx (POWER OUTPUT DRIVER)
t
P(CD)
SO (SERIAL DATA OUT)
10%
t
FALL
, t
RISE
FIGURE 1. LOGIC TIMING CONTROL WAVEFORMS
4
HIP0050
Pin Descriptions
V
CC
Power Pin
The V
CC
pin is the positive 5V logic voltage supply input for
the IC. The normal operating voltage range is 4.5V to 5.5V.
When switched on, the POR forces all outputs off.
SCK Serial Clock Pin
SCK is the clock input for the SPI Interface. Output ON/OFF
control data is clocked into an eight stage shift register on
the rising edge of an external clock. This input has a Schmitt
trigger.
SI Serial Data In Pin
SI is the Serial Data Input Pin for the SPI Interface. The eight
power outputs are controlled by the serial data via the output
data buffer. This input has a Schmitt Trigger.
STR Strobe Pin for the SPI Interface
When the STR Pin is high, data from the 8-bit shift register is
passed into the output data buffers where it controls the ON-
OFF state of each output driver. The data is latched in the
output data buffers when STR goes low. This input has a
Schmitt trigger.
SO Serial Data Out Pin
The serial data out allows other ICs to be serially cascaded.
For example, a 10-bit LED driver may be located behind the
HIP0050. A controlling microprocessor may then clock out
18-bits of information and simultaneously strobe both parts.
The cascaded ICs may be the same or different from the
HIP0050.
DR0 - DR7 Outputs 0 Thru 7
The drain output pins of the DMOS Power Drivers are capa-
ble of sinking 300mA. Each output has short circuit protection
to independently shutdown the output under excessive high
load current conditions.
FLT Fault Flag
The fault flag pin indicates an over-current in any one of the
output drivers. (It is not an indicator for the thermal shutdown
mode.) The FLT output is active low and can sink 1.6mA
when activated. When latched low, it will remain latched until
the next data strobe.
EN Enable Pin
The enable pin is an active low enable function for all eight
output drivers. When EN is high, drive from the output data
buffer is held low and all output drivers are disabled. When
EN is low, the output drivers are enabled and data in the 8-bit
shift register is transparent to the output data buffer. This input
has a Schmitt trigger.
LGND and GND Pins
The LGND Pin is the 5V Logic Supply Ground for the IC and
GND is a common ground for the power output drivers.
1000
100
ENERGY (mJ)
SAFE OPERATING AREA
BELOW LINE
10
1
0.1
1
TIME (ms)
10
100
FIGURE 2. MAXIMUM SINGLE PULSE ENERGY SAFE OPERATING AREA FOR EACH CLAMPED OUTPUT DRIVER, T
A
= 25
o
C
5
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