Artix-7 FPGAs Data Sheet:
DC and Switching Characteristics
DS181 (v1.2) February 13, 2012
Advance Product Specification
Artix-7 FPGA Electrical Characteristics
Artix™-7 FPGAs are available in -3, -2, -1, and -2L speed
grades, with -3 having the highest performance. The -2L
devices can operate at either of two V
CCINT
voltages, 0.9V
and 1.0V and are screened for lower maximum static power.
When operated at V
CCINT
= 1.0V, the speed specification of
a -2L device is the same as the -2 speed grade. When
operated at V
CCINT
= 0.9V, the -2L static and dynamic
power is reduced.
Artix-7 FPGA DC and AC characteristics are specified in
commercial, extended, and industrial temperature ranges.
Except the operating temperature range or unless
otherwise noted, all the DC and AC electrical parameters
are the same for a particular speed grade (that is, the timing
characteristics of a -1 speed grade industrial device are the
same as for a -1 speed grade commercial device). However,
only selected speed grades and/or devices are available in
each temperature range.
All supply voltage and junction temperature specifications
are representative of worst-case conditions. The
parameters included are common to popular designs and
typical applications.
This Artix-7 FPGA data sheet, part of an overall set of
documentation on the 7 series FPGAs, is available on the
Xilinx website at
www.xilinx.com/7.
All specifications are subject to change without notice.
Artix-7 FPGA DC Characteristics
Table 1:
Absolute Maximum Ratings
(1)
Symbol
V
CCINT
V
CCAUX
V
CCO
V
CCBRAM
V
CCADC
V
CCBATT
V
REF
V
REFP
V
IN(2)
V
TS
T
STG
T
SOL
T
j
Notes:
1.
2.
3.
4.
Stresses beyond those listed under Absolute Maximum Ratings might cause permanent damage to the device. These are stress ratings only,
and functional operation of the device at these or any other conditions beyond those listed under Operating Conditions is not implied.
Exposure to Absolute Maximum Ratings conditions for extended periods of time might affect device reliability.
The 3.3V I/O absolute maximum limit applied to DC and AC signals.
For I/O operation, refer to
UG471:
7 Series FPGAs SelectIO Resources User Guide.
For soldering guidelines and thermal considerations, see
UG475:
7 Series FPGA Packaging and Pinout Specification.
Description
Internal supply voltage relative to GND
Auxiliary supply voltage relative to GND
Output drivers supply voltage relative to GND for 3.3V HR I/O banks
Supply voltage for the block RAM memories
XADC supply relative to GNDADC
Key memory battery backup supply
Input reference voltage
XADC reference input relative to GNDADC
I/O input voltage relative to GND
(3)
(user and dedicated I/Os)
Voltage applied to 3-state 3.3V or below output
(3)
(user and dedicated I/Os)
Storage temperature (ambient)
Maximum soldering temperature
(4)
Maximum junction temperature
(4)
–0.5 to 1.1
–0.5 to 2.0
–0.5 to 3.6
–0.5 to 1.1
–0.5 to 2.0
–0.5 to 2.0
–0.5 to 2.0
–0.5 to 2.0
–0.5 to V
CCO
+ 0.5
–0.5 to V
CCO
+ 0.5
–65 to 150
+220
+125
Units
V
V
V
V
V
V
V
V
V
V
°C
°C
°C
© 2011– 2012 Xilinx, Inc. XILINX, the Xilinx logo, Artix, Virtex, Kintex, Zynq, Spartan, ISE, and other designated brands included herein are trademarks of Xilinx in the United
States and other countries. All other trademarks are the property of their respective owners.
DS181 (v1.2) February 13, 2012
Advance Product Specification
www.xilinx.com
1
Artix-7 FPGAs Data Sheet: DC and Switching Characteristics
Table 2:
Recommended Operating Conditions
(1)
Symbol
V
CCINT
V
CCAUX
V
CCO(2)(4)
V
CCBRAM
V
CCBATT(3)
V
IN
I
IN(5)
Description
Internal supply voltage relative to GND
For -2L (0.9V) devices: internal supply voltage relative to GND
Auxiliary supply voltage relative to GND
Supply voltage for 3.3V HR I/O banks relative to GND
Block RAM supply voltage
Battery voltage relative to GND
I/O input voltage relative to GND
Maximum current through any pin in a powered or unpowered bank when forward
biasing the clamp diode.
Junction temperature operating range for commercial (C) temperature devices
Min
0.95
0.87
1.71
1.14
0.95
1.0
GND – 0.20
–
0
0
–40
Max
1.05
0.93
1.89
3.465
1.05
1.89
V
CCO
+ 0.2
10
85
100
100
Units
V
V
V
V
V
V
V
mA
°C
°C
°C
T
j
Junction temperature operating range for extended (E) temperature devices
Junction temperature operating range for industrial (I) temperature devices
Notes:
1.
2.
3.
4.
5.
All voltages are relative to ground.
Configuration data is retained even if V
CCO
drops to 0V.
V
CCBATT
is required only when using bitstream encryption. If battery is not used, connect V
CCBATT
to either ground or V
CCAUX
.
Includes V
CCO
of 1.2V, 1.5V, 1.8V, 2.5V, and 3.3V.
A total of 100 mA per bank should not be exceeded.
Table 3:
DC Characteristics Over Recommended Operating Conditions
Symbol
V
DRINT
V
DRI
I
REF
I
L
C
IN(2)
Description
Data retention V
CCINT
voltage (below which configuration data might be lost)
Data retention V
CCAUX
voltage (below which configuration data might be lost)
V
REF
leakage current per pin
Input or output leakage current per pin (sample-tested)
Die input capacitance at the pad
Pad pull-up (when selected) @ V
IN
= 0V, V
CCO
= 3.3V
Pad pull-up (when selected) @ V
IN
= 0V, V
CCO
= 2.5V
Min
Typ
(1)
Max
Units
V
V
µA
µA
pF
µA
µA
µA
µA
µA
µA
µA
I
RPU
Pad pull-up (when selected) @ V
IN
= 0V, V
CCO
= 1.8V
Pad pull-up (when selected) @ V
IN
= 0V, V
CCO
= 1.5V
Pad pull-up (when selected) @ V
IN
= 0V, V
CCO
= 1.2V
Pad pull-down (when selected) @ V
IN
= 3.3V
Pad pull-down (when selected) @ V
IN
= 1.8V
Battery supply current
Temperature diode ideality factor
Series resistance
150
1.0002
2
I
RPD
I
BATT(3)
n
r
Notes:
1.
2.
3.
nA
–
Typical values are specified at nominal voltage, 25°C.
This measurement represents the die capacitance at the pad, not including the package.
Maximum value specified for worst case process at 25°C.
DS181 (v1.2) February 13, 2012
Advance Product Specification
www.xilinx.com
2
Artix-7 FPGAs Data Sheet: DC and Switching Characteristics
Static Power Consumption
Table 4:
Typical Quiescent Supply Current
Speed Grade
Symbol
Description
Device
-3
I
CCINTQ
Quiescent V
CCINT
supply current
XC7A100T
XC7A200T
XC7A350T
I
CCOQ
Quiescent V
CCO
supply current
XC7A100T
XC7A200T
XC7A350T
I
CCAUXQ
Quiescent V
CCAUX
supply current
XC7A100T
XC7A200T
XC7A350T
I
CCBRAMQ
Quiescent V
CCBRAM
supply current
XC7A100T
XC7A200T
XC7A350T
Notes:
1.
2.
3.
Typical values are specified at nominal voltage, 85°C junction temperatures (T
j
) with single-ended SelectIO resources.
Typical values are for blank configured devices with no output current loads, no active input pull-up resistors, all I/O pins are 3-state and
floating.
Use the XPower™ Estimator (XPE) spreadsheet tool (download at
http://www.xilinx.com/power)
to calculate static power consumption for
conditions other than those specified.
1.0V
-2/-2L
-1
0.9V
-2L
Units
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
DS181 (v1.2) February 13, 2012
Advance Product Specification
www.xilinx.com
3
Artix-7 FPGAs Data Sheet: DC and Switching Characteristics
Power-On/Off Power Supply Sequencing
The recommended power-on sequence is V
CCINT
, V
CCBRAM
, V
CCAUX
, and V
CCO
to achieve minimum current draw and
ensure that the I/Os are 3-stated at power-on. The recommended power-off sequence is the reverse of the power-on
sequence. If V
CCINT
and V
CCBRAM
have the same recommended voltage levels then both can be powered by the same
supply and ramped simultaneously. If V
CCAUX
and V
CCO
have the same recommended voltage levels then both can be
powered by the same supply and ramped simultaneously.
For V
CCO
voltages of 3.3V in HR I/O banks and configuration bank 0:
•
•
The voltage difference between V
CCO
and V
CCAUX
must not exceed 2.625V for longer than T
VCCO2VCCAUX
for each
power-on/off cycle to maintain device reliability levels.
The T
VCCO2VCCAUX
time can be allocated in any percentage between the power-on and power-off ramps.
There are no sequencing requirements for the GTP transceiver supplies with respect to the other FPGA supply voltages.
Table 5
shows the minimum current, in addition to I
CCQ
, that are required by Artix-7 devices for proper power-on and
configuration. If the current minimums shown in
Table 4
and
Table 5
are met, the device powers on after all four supplies
have passed through their power-on reset threshold voltages. The FPGA must not be configured until after V
CCINT
is
applied.
Once initialized and configured, use the XPOWER tools to estimate current drain on these supplies.
Table 5:
Power-On Current for Artix-7 Devices
Device
XC7A100T
XC7A200T
XC7A350T
Notes:
1.
2.
Typical values are specified at nominal voltage, 25°C.
Use the XPOWER™ Estimator (XPE) spreadsheet tool (download at
http://www.xilinx.com/power)
to calculate maximum power-on currents.
I
CCINTMIN
Typ
(1)
I
CCAUXMIN
Typ
(1)
I
CCOMIN
Typ
(1)
I
CCBRAM
Typ
(1)
Units
mA
mA
mA
Table 6:
Power Supply Ramp Time
Symbol
T
VCCINT
T
VCCO
T
VCCAUX
T
VCCBRAM
T
VCCO2VCCAUX
T
MGTAVCC
T
MGTAVTT
Notes:
1.
Based on 240,000 power cycles with nominal V
CCO
of 3.3V or 36,500 power cycles with worst case V
CCO
of 3.465V.
Description
Ramp time from GND to 90% of V
CCINT
Ramp time from GND to 90% of V
CCO
Ramp time from GND to 90% of V
CCAUX
Ramp time from GND to 90% of V
CCBRAM
Allowed time per power cycle for V
CCO
– V
CCAUX
2.625V
Ramp time from GND to 90% of MGTAVCC
Ramp time from GND to 90% of MGTAVTT
Conditions
Min
0.2
0.2
0.2
0.2
Max
50
50
50
50
500
800
50
50
Units
ms
ms
ms
ms
ms
ms
ms
T
J
= 100°C
(1)
T
J
= 85°C
(1)
–
–
0.2
0.2
DS181 (v1.2) February 13, 2012
Advance Product Specification
www.xilinx.com
4
Artix-7 FPGAs Data Sheet: DC and Switching Characteristics
SelectIO™ DC Input and Output Levels
Values for V
IL
and V
IH
are recommended input voltages. Values for I
OL
and I
OH
are guaranteed over the recommended
operating conditions at the V
OL
and V
OH
test points. Only selected standards are tested. These are chosen to ensure that
all standards meet their specifications. The selected standards are tested at a minimum V
CCO
with the respective V
OL
and
V
OH
voltage levels shown. Other standards are sample tested.
Table 7:
SelectIO DC Input and Output Levels
(1)(2)
I/O Standard
HSTL_I
HSTL_I_12
HSTL_I_18
HSTL_II
HSTL_II_18
HSUL_12
LVCMOS12
LVCMOS15
LVCMOS18
LVCMOS25
LVCMOS33
LVTTL
MOBILE_DDR
PCI33_3
SSTL12
SSTL135
SSTL135_R
SSTL15
SSTL15_R
SSTL18_I
SSTL18_II
Notes:
1.
2.
3.
4.
5.
6.
Tested according to relevant specifications.
3.3V and 2.5V standards are only supported in 3.3V I/O banks.
Supported drive strengths of 4, 8, or 12 mA in HR I/O banks.
Supported drive strengths of 4, 8, 12, or 16 mA in HR I/O banks.
Supported drive strengths of 4, 8, 12, 16, or 24 mA in HR I/O banks.
For detailed interface specific DC voltage levels, see
UG471:
7 Series FPGAs SelectIO Resources User Guide.
V
IL
V, Min
–0.300
–0.300
–0.300
–0.300
–0.300
–0.300
–0.300
–0.300
–0.300
–0.300
–0.300
–0.300
–0.300
–0.500
–0.300
–0.300
–0.300
–0.300
–0.300
–0.300
–0.300
V
IH
V, Max
V, Min
V
REF
+ 0.100
V
REF
+ 0.100
V
REF
+ 0.100
V
REF
+ 0.100
V
REF
+ 0.100
V
REF
+ 0.120
65% V
CCO
70% V
CCO
65% V
CCO
1.700
2.000
2.000
80% V
CCO
50% V
CCO
V
REF
+ 0.100
V
REF
+ 0.900
V
REF
+ 0.900
V
REF
+ 0.100
V
REF
+ 0.100
V
REF
+ 0.125
V
REF
+ 0.125
V
OL
V, Max
V
CCO
+ 0.300
V
CCO
+ 0.300
V
CCO
+ 0.300
V
CCO
+ 0.300
V
CCO
+ 0.300
V
CCO
+ 0.300
V
CCO
+ 0.300
V
CCO
+ 0.300
V
CCO
+ 0.300
3.450
3.450
V
CCO
+ 0.300
V
CCO
+ 0.500
V
OH
V, Min
V
CCO
– 0.400
75% V
CCO
V
CCO
– 0.400
V
CCO
– 0.400
V
CCO
– 0.400
V
REF
+ 0.120
V
CCO
– 0.400
75% V
CCO
V
CCO
– 0.450
V
CCO
– 0.400
V
CCO
– 0.400
2.400
90% V
CCO
90% V
CCO
V
REF
+ 0.150
V
REF
+ 0.150
V
REF
+ 0.150
V
TT
+ 0.175
V
TT
+ 0.175
V
TT
+ 0.470
V
TT
+ 0.600
I
OL
mA
8
6.3
8
16
16
I
OH
mA
–8
–6.3
–8
–16
–16
V, Max
0.400
25% V
CCO
0.400
0.400
0.400
V
REF
– 0.100
V
REF
– 0.100
V
REF
– 0.100
V
REF
– 0.100
V
REF
– 0.100
V
REF
– 0.120
35% V
CCO
30% V
CCO
35% V
CCO
0.700
0.800
0.800
20% V
CCO
30% V
CCO
V
REF
– 0.100
V
REF
– 0.900
V
REF
– 0.900
V
REF
– 0.100
V
REF
– 0.100
V
REF
– 0.125
V
REF
– 0.125
V
CCO
+ 0.300 V
REF
– 0.120
0.400
25% V
CCO
0.450
0.400
0.400
0.400
10% V
CCO
10% V
CCO
Note 3
Note 4
Note 5
Note 4
Note 4
Note 5
0.1
1.5
Note 3
Note 4
Note 5
Note 4
Note 4
Note 5
–0.1
–0.5
V
CCO
+ 0.300 V
REF
– 0.150
V
CCO
+ 0.300 V
REF
– 0.150
V
CCO
+ 0.300 V
REF
– 0.150
V
CCO
+ 0.300 V
TT
– 0.175
V
CCO
+ 0.300 V
TT
– 0.175
V
CCO
+ 0.300 V
TT
– 0.470
V
CCO
+ 0.300 V
TT
– 0.600
17.8
–17.8
8
13.4
–8
–13.4
DS181 (v1.2) February 13, 2012
Advance Product Specification
www.xilinx.com
5
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