SN74LS251
8-Input Multiplexer
with 3-State Outputs
The TTL/MSI SN74LS251 is a high speed 8-Input Digital
Multiplexer. It provides, in one package, the ability to select one bit of
data from up to eight sources. The LS251 can be used as a universal
function generator to generate any logic function of four variables.
Both assertion and negation outputs are provided.
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•
•
•
•
•
Schottky Process for High Speed
Multifunction Capability
On-Chip Select Logic Decoding
Inverting and Non-Inverting 3-State Outputs
Input Clamp Diodes Limit High Speed Termination Effects
LOW
POWER
SCHOTTKY
GUARANTEED OPERATING RANGES
Symbol
V
CC
T
A
I
OH
I
OL
Parameter
Supply Voltage
Operating Ambient
Temperature Range
Output Current – High
Output Current – Low
Min
4.75
0
Typ
5.0
25
Max
5.25
70
– 2.6
24
Unit
V
°C
mA
mA
16
1
PLASTIC
N SUFFIX
CASE 648
16
1
SOIC
D SUFFIX
CASE 751B
ORDERING INFORMATION
Device
SN74LS251N
SN74LS251D
Package
16 Pin DIP
16 Pin
Shipping
2000 Units/Box
2500/Tape & Reel
©
Semiconductor Components Industries, LLC, 1999
1
December, 1999 – Rev. 6
Publication Order Number:
SN74LS251/D
SN74LS251
CONNECTION DIAGRAM DIP
(TOP VIEW)
V
CC
16
I
4
15
I
5
14
I
6
13
I
7
12
S
0
11
S
1
10
S
2
9
1
I
3
2
I
2
3
I
1
4
I
0
5
Z
6
Z
7
E
0
8
GND
LOADING
(Note a)
PIN NAMES
S
0
– S
2
E
0
I
0
– I
7
Z
Z
Select Inputs
Output Enable (Active LOW) Inputs
Multiplexer Inputs
Multiplexer Output
Complementary Multiplexer Output
HIGH
0.5 U.L.
0.5 U.L.
0.5 U.L.
65 U.L.
65 U.L.
LOW
0.25 U.L.
0.25 U.L.
0.25 U.L.
15 U.L.
15 U.L.
NOTES:
a) 1 TTL Unit Load (U.L.) = 40
m
A HIGH/1.6 mA LOW.
LOGIC DIAGRAM
I
0
S
2
S
1
S
0
E
1
9
10
11
7
4
I
1
3
I
2
2
I
3
1
I
4
15
I
5
14
I
6
13
I
7
12
V
CC
= PIN 16
GND = PIN 8
= PIN NUMBERS
Z
5
6
Z
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2
SN74LS251
FUNCTIONAL DESCRIPTION
The LS251 is a logical implementation of a single pole,
8-position switch with the switch position controlled by the
state of three Select inputs, S
0
, S
1
, S
2
. Both assertion and
negation outputs are provided. The Output Enable input
(E
O
) is active LOW. When it is activated, the logic function
provided at the output is:
Z = E
O
⋅
(I
0
⋅
S
0
⋅
S
1
⋅
S
2
+ I
1
⋅
S
0
⋅
S
1
⋅
S
2
+ I
2
⋅
S
0
⋅
S
1
⋅
Z = E
O
⋅
S
2
+ I
3
⋅
S
0
⋅
S
1
⋅
S
2
+ I
4
⋅
S
0
⋅
S
1
⋅
S
2
+ I
5
⋅
S
0
⋅
Z = E
O
⋅
S
1
⋅
S
2
+ I
6
⋅
S
0
⋅
S
1
⋅
S
2
+ I
7
⋅
S
0
⋅
S
1
⋅
S
2
).
When the Output Enable is HIGH, both outputs are in the
high impedance (high Z) state. This feature allows
multiplexer expansion by tying the outputs of up to 128
devices together. When the outputs of the 3-state devices are
tied together, all but one device must be in the high
impedance state to avoid high currents that would exceed the
maximum ratings. The Output Enable signals should be
designed to ensure there is no overlap in the active LOW
portion of the enable voltage.
TRUTH TABLE
E
0
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
S
2
X
L
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
S
1
X
L
L
L
L
H
H
H
H
L
L
L
L
H
H
H
H
S
0
X
L
L
H
H
L
L
H
H
L
L
H
H
L
L
H
H
I
0
X
L
H
X
X
X
X
X
X
X
X
X
X
X
X
X
X
I
1
X
X
X
L
H
X
X
X
X
X
X
X
X
X
X
X
X
I
2
X
X
X
X
X
L
H
X
X
X
X
X
X
X
X
X
X
I
3
X
X
X
X
X
X
X
L
H
X
X
X
X
X
X
X
X
I
4
X
X
X
X
X
X
X
X
X
L
H
X
X
X
X
X
X
I
5
X
X
X
X
X
X
X
X
X
X
X
L
H
X
X
X
X
I
6
X
X
X
X
X
X
X
X
X
X
X
X
X
L
H
X
X
I
7
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
L
H
Z
(Z)
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
Z
(Z)
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
(Z) = High impedance (Off)
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3
SN74LS251
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE
(unless otherwise specified)
Limits
Symbol
V
IH
V
IL
V
IK
V
OH
Parameter
Input HIGH Voltage
Input LOW Voltage
Input Clamp Diode Voltage
Output HIGH Voltage
2.4
– 0.65
3.1
0.25
V
O
OL
I
OZH
I
OZL
I
IH
I
IL
I
OS
I
CC
Output LOW Voltage
0.35
Output Off Current HIGH
Output Off Current LOW
Input HIGH Current
0.1
Input LOW Current
Short Circuit Current (Note 1)
Power Supply Current
12
mA
– 30
– 0.4
– 130
10
0.5
20
– 20
20
V
µA
µA
µA
mA
mA
mA
mA
I
OL
= 24 mA
0.4
Min
2.0
0.8
– 1.5
Typ
Max
Unit
V
V
V
V
V
Test Conditions
Guaranteed Input HIGH Voltage for
All Inputs
Guaranteed Input LOW Voltage for
All Inputs
V
CC
= MIN, I
IN
= – 18 mA
V
CC
= MIN, I
OH
= MAX, V
IN
= V
IH
or V
IL
per Truth Table
I
OL
= 12 mA
V
CC
= V
CC
MIN,
V
IN
= V
IL
or V
IH
per Truth Table
V
CC
= MAX, V
OUT
= 2.7 V
V
CC
= MAX, V
OUT
= 0.4 V
V
CC
= MAX, V
IN
= 2.7 V
V
CC
= MAX, V
IN
= 7.0 V
V
CC
= MAX, V
IN
= 0.4 V
V
CC
= MAX
V
CC
= MAX, V
E
= 0 V
V
CC
= MAX, V
E
= 4.5 V
Note 1: Not more than one output should be shorted at a time, nor for more than 1 second.
AC CHARACTERISTICS
(T
A
= 25°C, V
CC
= 5.0 V)
Limits
Symbol
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PZH
t
PZL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
PHZ
t
PLZ
Parameter
Propagation Delay,
Select to Z Output
Propagation Delay,
Select to Z Output
Propagation Delay,
Data to Z Output
Propagation Delay,
Data to Z Output
Output Enable Time
to Z Output
Output Enable Time
to Z Output
Output Disable Time
to Z Output
Output Disable Time
to Z Output
Min
Typ
20
21
29
28
10
9.0
17
18
17
24
30
26
37
15
30
15
Max
33
33
45
45
15
15
28
28
27
40
45
40
55
25
45
25
Unit
ns
ns
ns
ns
ns
ns
ns
ns
Figure 1
Figure 2
Figure 1
Figures 2
Figures 4, 5
Figures 3, 5
Figures 3, 5
Figures 4, 5
C
L
= 5.0 pF,
R
L
= 667 kΩ
C
L
= 15 pF,
R
L
= 2.0 kΩ
Test Conditions
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4
SN74LS251
3-STATE AC WAVEFORMS
V
IN
1.3 V
t
PLH
1.3 V
t
PHL
1.3 V
V
IN
1.3 V
t
PHL
1.3 V
t
PLH
1.3 V
V
OUT
1.3 V
V
OUT
1.3 V
Figure 1.
Figure 2.
V
E
t
PZL
V
OUT
1.3 V
1.3 V
t
PLZ
V
E
t
PZH
≈
1.3 V
V
OL
V
OUT
1.3 V
t
PHZ
1.3 V
1.3 V
≥
V
OH
≈
1.3 V
0.5 V
1.3 V
0.5 V
Figure 3.
0.5 V
Figure 4.
AC LOAD CIRCUIT
V
CC
SWITCH POSITIONS
R
L
SYMBOL
t
PZH
t
PZL
t
PLZ
t
PHZ
SW1
Open
Closed
Closed
Closed
SW2
Closed
Open
Closed
Closed
SW1
TO OUTPUT
UNDER TEST
5 kΩ
C
L
*
SW2
* Includes Jig and Probe Capacitance.
Figure 5.
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