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IS61VPS51236-200TQI

产品描述Cache SRAM, 512KX36, 3.1ns, CMOS, PQFP100, TQFP-100
产品类别存储    存储   
文件大小162KB,共24页
制造商Integrated Silicon Solution ( ISSI )
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IS61VPS51236-200TQI概述

Cache SRAM, 512KX36, 3.1ns, CMOS, PQFP100, TQFP-100

IS61VPS51236-200TQI规格参数

参数名称属性值
是否无铅含铅
是否Rohs认证不符合
厂商名称Integrated Silicon Solution ( ISSI )
零件包装代码QFP
包装说明TQFP-100
针数100
Reach Compliance Codecompliant
ECCN代码3A991.B.2.A
最长访问时间3.1 ns
其他特性PIPELINED ARCHITECTURE
JESD-30 代码R-PQFP-G100
JESD-609代码e0
长度20 mm
内存密度18874368 bit
内存集成电路类型CACHE SRAM
内存宽度36
功能数量1
端子数量100
字数524288 words
字数代码512000
工作模式SYNCHRONOUS
最高工作温度85 °C
最低工作温度-40 °C
组织512KX36
封装主体材料PLASTIC/EPOXY
封装代码LQFP
封装形状RECTANGULAR
封装形式FLATPACK, LOW PROFILE
并行/串行PARALLEL
峰值回流温度(摄氏度)240
认证状态Not Qualified
座面最大高度1.6 mm
最大供电电压 (Vsup)2.625 V
最小供电电压 (Vsup)2.375 V
标称供电电压 (Vsup)2.5 V
表面贴装YES
技术CMOS
温度等级INDUSTRIAL
端子面层Tin/Lead (Sn/Pb)
端子形式GULL WING
端子节距0.65 mm
端子位置QUAD
处于峰值回流温度下的最长时间30
宽度20 mm
Base Number Matches1

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IS61VPS51232
IS61VPS51236
IS61VPS10018
512K x 32, 512K x 36, 1024K x 18
SYNCHRONOUS PIPELINED,
SINGLE-CYCLE DESELECT STATIC RAM
FEATURES
• Internal self-timed write cycle
• Individual Byte Write Control and Global Write
• Clock controlled, registered address, data and
control
• Linear burst sequence control using MODE input
• Three chip enable option for simple depth expansion
and address pipelining
• Common data inputs and data outputs
• JEDEC 100-Pin TQFP and
119-pin PBGA package
• Single +2.5V, ±5% operation
• Auto Power-down during deselect
• Single cycle deselect
• Snooze MODE for reduced-power standby
• JTAG Boundary Scan for PBGA package
ISSI
®
ADVANCE INFORMATION
MAY 2001
DESCRIPTION
The
ISSI
IS61VPS51232, IS61VPS51236, and
IS61VPS10018 are high-speed, low-power synchronous
static RAMs designed to provide burstable, high-performance
memory for communication and networking applications.
The IS61VPS51232 is organized as 524,288 words by 32 bits
and the IS61VPS51236 is organized as 524,288 words by
36 bits. The IS61VPS10018 is organized as 1,048,576
words by 18 bits. Fabricated with
ISSI
's advanced CMOS
technology, the device integrates a 2-bit burst counter,
high-speed SRAM core, and high-drive capability outputs
into a single monolithic circuit. All synchronous inputs
pass through registers controlled by a positive-edge-
triggered single clock input.
Write cycles are internally self-timed and are initiated by
the rising edge of the clock input. Write cycles can be one
to four bytes wide as controlled by the write control inputs.
Separate byte enables allow individual bytes to be written.
Byte write operation is performed by using byte write
enable (BWE).input combined with one or more individual
byte write signals (BWx). In addition, Global Write (GW)
is available for writing all bytes at one time, regardless of
the byte write controls.
Bursts can be initiated with either
ADSP
(Address Status
Processor) or
ADSC
(Address Status Cache Controller)
input pins. Subsequent burst addresses can be generated
internally and controlled by the
ADV
(burst address
advance) input pin.
The mode pin is used to select the burst sequence order,
Linear burst is achieved when this pin is tied LOW.
Interleave burst is achieved when this pin is tied HIGH or
left floating.
FAST ACCESS TIME
Symbol
t
KQ
t
KC
Parameter
Clock Access Time
Cycle Time
Frequency
-200
3.1
5
200
-166
3.5
6
166
Units
ns
ns
MHz
This document contains ADVANCE INFORMATION data. ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best
possible product. We assume no responsibility for any errors which may appear in this publication. © Copyright 2001, Integrated Silicon Solution, Inc.
Integrated Silicon Solution, Inc. — 1-800-379-4774
ADVANCE INFORMATION
05/31/01
Rev. 00A
1

IS61VPS51236-200TQI相似产品对比

IS61VPS51236-200TQI IS61VPS51236-200TQ IS61VPS51232-166TQ IS61VPS10018-166B IS61VPS10018-200B IS61VPS10018-200TQI IS61VPS10018-200TQ IS61VPS51232-200TQ
描述 Cache SRAM, 512KX36, 3.1ns, CMOS, PQFP100, TQFP-100 Cache SRAM, 512KX36, 3.1ns, CMOS, PQFP100, TQFP-100 Cache SRAM, 512KX32, 3.5ns, CMOS, PQFP100, TQFP-100 Cache SRAM, 1MX18, 3.5ns, CMOS, PBGA119, PLASTIC, BGA-119 Cache SRAM, 1MX18, 3.1ns, CMOS, PBGA119, PLASTIC, BGA-119 Cache SRAM, 1MX18, 3.1ns, CMOS, PQFP100, TQFP-100 Cache SRAM, 1MX18, 3.1ns, CMOS, PQFP100, TQFP-100 Cache SRAM, 512KX32, 3.1ns, CMOS, PQFP100, TQFP-100
是否无铅 含铅 含铅 含铅 含铅 含铅 含铅 含铅 含铅
是否Rohs认证 不符合 不符合 不符合 不符合 不符合 不符合 不符合 不符合
厂商名称 Integrated Silicon Solution ( ISSI ) Integrated Silicon Solution ( ISSI ) Integrated Silicon Solution ( ISSI ) Integrated Silicon Solution ( ISSI ) Integrated Silicon Solution ( ISSI ) Integrated Silicon Solution ( ISSI ) Integrated Silicon Solution ( ISSI ) Integrated Silicon Solution ( ISSI )
零件包装代码 QFP QFP QFP BGA BGA QFP QFP QFP
包装说明 TQFP-100 TQFP-100 TQFP-100 PLASTIC, BGA-119 PLASTIC, BGA-119 TQFP-100 TQFP-100 TQFP-100
针数 100 100 100 119 119 100 100 100
Reach Compliance Code compliant compliant compliant compliant compliant compliant compliant compliant
ECCN代码 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A
最长访问时间 3.1 ns 3.1 ns 3.5 ns 3.5 ns 3.1 ns 3.1 ns 3.1 ns 3.1 ns
JESD-30 代码 R-PQFP-G100 R-PQFP-G100 R-PQFP-G100 R-PBGA-B119 R-PBGA-B119 R-PQFP-G100 R-PQFP-G100 R-PQFP-G100
JESD-609代码 e0 e0 e0 e0 e0 e0 e0 e0
长度 20 mm 20 mm 20 mm 22 mm 22 mm 20 mm 20 mm 20 mm
内存密度 18874368 bit 18874368 bit 16777216 bit 18874368 bit 18874368 bit 18874368 bit 18874368 bit 16777216 bit
内存集成电路类型 CACHE SRAM CACHE SRAM CACHE SRAM CACHE SRAM CACHE SRAM CACHE SRAM CACHE SRAM CACHE SRAM
内存宽度 36 36 32 18 18 18 18 32
功能数量 1 1 1 1 1 1 1 1
端子数量 100 100 100 119 119 100 100 100
字数 524288 words 524288 words 524288 words 1048576 words 1048576 words 1048576 words 1048576 words 524288 words
字数代码 512000 512000 512000 1000000 1000000 1000000 1000000 512000
工作模式 SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS
最高工作温度 85 °C 70 °C 70 °C 70 °C 70 °C 85 °C 70 °C 70 °C
组织 512KX36 512KX36 512KX32 1MX18 1MX18 1MX18 1MX18 512KX32
封装主体材料 PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
封装代码 LQFP LQFP LQFP BGA BGA LQFP LQFP LQFP
封装形状 RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
封装形式 FLATPACK, LOW PROFILE FLATPACK, LOW PROFILE FLATPACK, LOW PROFILE GRID ARRAY GRID ARRAY FLATPACK, LOW PROFILE FLATPACK, LOW PROFILE FLATPACK, LOW PROFILE
并行/串行 PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL
峰值回流温度(摄氏度) 240 240 240 240 240 240 240 240
认证状态 Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
座面最大高度 1.6 mm 1.6 mm 1.6 mm 2.41 mm 2.41 mm 1.6 mm 1.6 mm 1.6 mm
最大供电电压 (Vsup) 2.625 V 2.625 V 2.625 V 2.625 V 2.625 V 2.625 V 2.625 V 2.625 V
最小供电电压 (Vsup) 2.375 V 2.375 V 2.375 V 2.375 V 2.375 V 2.375 V 2.375 V 2.375 V
标称供电电压 (Vsup) 2.5 V 2.5 V 2.5 V 2.5 V 2.5 V 2.5 V 2.5 V 2.5 V
表面贴装 YES YES YES YES YES YES YES YES
技术 CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS
温度等级 INDUSTRIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL INDUSTRIAL COMMERCIAL COMMERCIAL
端子面层 Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb)
端子形式 GULL WING GULL WING GULL WING BALL BALL GULL WING GULL WING GULL WING
端子节距 0.65 mm 0.65 mm 0.65 mm 1.27 mm 1.27 mm 0.65 mm 0.65 mm 0.65 mm
端子位置 QUAD QUAD QUAD BOTTOM BOTTOM QUAD QUAD QUAD
处于峰值回流温度下的最长时间 30 30 30 30 30 30 30 30
宽度 20 mm 20 mm 14 mm 14 mm 14 mm 14 mm 14 mm 14 mm

 
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