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HIP6521
Data Sheet
December 27, 2004
FN4837.3
PWM and Triple Linear Power Controller
The HIP6521 provides the power control and protection for
four output voltages in high-performance microprocessor
and computer applications. The IC integrates a voltage-
mode PWM controller and three linear controllers, as well as
monitoring and protection functions into a 16-lead SOIC
package. The PWM controller is intended to regulate the
microprocessor memory core voltage with a synchronous-
rectified buck converter. The linear controllers are intended
to regulate the computer system’s AGP 1.5V bus power, the
2.5V clock power, and the 1.8V power for the North/South
Bridge core voltage and/or cache memory circuits. Both the
switching regulator and linear voltage references provide
±2%
of static regulation over line, load, and temperature
ranges. All outputs are user-adjustable by means of an
external resistor divider. All linear controllers employ bipolar
NPNs for the pass transistors.
The HIP6521 monitors all the output voltages. The PWM
controller’s adjustable overcurrent function monitors the
output current by using the voltage drop across the upper
MOSFET’s r
DS(ON)
. The linear regulator outputs are
monitored via the FB pins for undervoltage events.
Features
• Provides 4 Regulated Voltages
- Memory Core, AGP, Clock, and Memory Controller Hub
Power
• ACPI Compatible
• Drives Bipolar Linear Pass Transistors
• Externally Resistor-Adjustable Outputs
• Simple Single-Loop Control Design
- Voltage-Mode PWM Control
• Fast PWM Converter Transient Response
- High-Bandwidth Error Amplifier
- Full 0% to 100% Duty Ratio
• Excellent Output Voltage Regulation
- All Outputs:
±2%
Over Temperature
• Overcurrent Fault Monitors
- Switching Regulator Does Not Require Extra Current
Sensing Element, Uses MOSFET’s r
DS(ON)
• Small Converter Size
- 300kHz Constant Frequency Operation
- Small External Component Count
•
Pb-Free Available (RoHS Compliant)
Ordering Information
PART NUMBER
HIP6521CB
HIP6521CBZ
(Note)
HIP6521CBZA
(Note)
HIP6521EVAL1
TEMP.
RANGE (°C)
0 to 70
0 to 70
0 to 70
PACKAGE
16 Ld SOIC
PKG.
DWG. #
M16.15
Applications
• Motherboard Power Regulation for Computers
16 Ld SOIC
(Pb-free)
M16.15
16 Ld SOIC
(Pb-free)
M16.15
Related Literature
• Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”
Evaluation Board
NOTE: Intersil Pb-free products employ special Pb-free material
sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which are RoHS compliant and compatible
with both SnPb and Pb-free soldering operations. Intersil Pb-free
products are MSL classified at Pb-free peak reflow temperatures that
meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
Add “-T” suffix for tape and reel.
Pinout
HIP6521 (SOIC)
TOP VIEW
DRIVE2 1
FB2 2
FB 3
COMP 4
GND 5
PHASE 6
BOOT 7
UGATE 8
16 FB3
15 DRIVE3
14 FB4
13 DRIVE4
12 OCSET
11 VCC
10 LGATE
9 PGND
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2000, 2004. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
Block Diagram
FB3
OCSET
VCC
VCC
EA4
DRIVE4
+
x 0.70
-
+
0.8V
-
FB4
INHIBIT/SOFT-START
DRIVE2
+
DRIVE1
UGATE
++
BOOT
EA2
FB2
+
GND
OSCILLATOR
SYNC
DRIVE
-
+
+
-
-
2
EA3
DRIVE3
+
POWER-ON
RESET (POR)
40µA
-
UV3
-
UV4
HIP6521
SOFT-
START
AND FAULT
LOGIC
OCC
--
PHASE
UV2
+
-
+
PWM
EA1
-
GATE
CONTROL
COMP1
VCC
LGATE
PGND
FB
FN4837.3
December 27, 2004
COMP
HIP6521
Simplified Power System Diagram
+5V
SB
(+5V
DUAL
)
+5V
DUAL
+3.3V
IN
PWM
CONTROLLER
Q2
Q1
V
OUT1
Q3
V
OUT2
+
LINEAR
CONTROLLER
+
HIP6521
LINEAR
CONTROLLER
LINEAR
CONTROLLER
+
V
OUT3
Q4
+
Q5
V
OUT4
Typical Application
+5V
SB
+5V
DUAL
L
IN
C
IN
+
VCC
+3.3V
IN
DRIVE2
FB2
Rs2
+
C
OUT2
Rp2
UGATE
PHASE
Q1
L
OUT1
BOOT
OCSET
C
BOOT
V
OUT1
2.5V
V
OUT2
2.5V
Q3
LGATE
+3.3V
DUAL
Q4
DRIVE3
FB3
+
Rs3
Rp3
COMP
PGND
Q2
C
OUT1
CR1
+
HIP6521
V
OUT3
1.8V
FB
Rs1
C
OUT3
V
OUT4
1.5V
+
C
OUT4
Q5
DRIVE4
FB4
Rs4
Rp4
GND
Rp1
3
FN4837.3
December 27, 2004
HIP6521
Absolute Maximum Ratings
UGATE, BOOT . . . . . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to 15V
VCC, PHASE . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to +7V
DRIVE, LGATE, all other pins . . . . . . . . GND - 0.3V to VCC + 0.3V
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TBD
Thermal Information
Thermal Resistance (Typical, Note 1)
θ
JA
(°C/W)
Operating Conditions
Supply Voltage on VCC . . . . . . . . . . . . . . . . . . . . . . . . . . +5V
±10%
Ambient Temperature Range . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Junction Temperature Range . . . . . . . . . . . . . . . . . . . . 0°C to 125°C
SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
110
Maximum Junction Temperature (Plastic Package) . . . . . . . 150°C
Maximum Storage Temperature Range . . . . . . . . . . -65°C to 150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300°C
(SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1.
θ
JA
is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications
PARAMETER
VCC SUPPLY CURRENT
Nominal Supply Current
POWER-ON RESET
Rising VCC Threshold
Falling VCC Threshold
Recommended Operating Conditions, Unless Otherwise Noted. Refer to Block and Simplified Power System
Diagrams, and Typical Application Schematic
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
I
CC
UGATE, LGATE, DRIVE2, DRIVE3, and
DRIVE4 Open
-
5
-
mA
4.25
3.75
-
-
4.5
4.0
V
V
OSCILLATOR AND SOFT-START
Free Running Frequency
Ramp Amplitude
Soft-Start Interval
REFERENCE VOLTAGE
Reference Voltage (All Regulators)
All Outputs Voltage Regulation
LINEAR REGULATORS (OUT2, OUT3, AND OUT4)
Output Drive Current (All Linears)
Undervoltage Level (V
FB
/V
REF
)
V
UV
VCC > 4.5V
100
-
120
70
-
-
mA
%
V
REF
-
-2.0
0.800
-
-
+2.0
V
%
F
OSC
∆V
OSC
T
SS
275
-
6.25
300
1.5
6.83
325
-
7.40
kHz
V
P-P
ms
SYNCHRONOUS PWM CONTROLLER ERROR AMPLIFIER
DC Gain
Gain-Bandwidth Product
Slew Rate
PWM CONTROLLER GATE DRIVERS
UGATE Source
UGATE Sink
LGATE Source
LGATE Sink
PROTECTION
OCSET Current Source
I
OCSET
34
40
46
µA
I
UGATE
I
UGATE
I
LGATE
I
LGATE
VCC = 5V, V
UGATE
= 2.5V
V
UGATE-PHASE
= 2.5V
VCC = 5V, V
LGATE
= 2.5V
V
LGATE
= 2.5V
-
-
-
-
-1
1
-1
2
-
-
-
-
A
A
A
A
GBWP
SR
COMP = 10pF
-
15
-
80
-
6
-
-
-
dB
MHz
V/µs
4
FN4837.3
December 27, 2004
微控制器 MCU
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