Features
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16 Mbit SRAM Multi Chip Module
Allows 32-, 16- or 8-bit access configuration
Operating Voltage: 3.3V
+
0.3V, 5V Tolerant
Access Time:
– 25 ns, 20 ns
– 18 ns (preliminary information)
Very Low Power Consumption
– Active: 595 mW per byte (Max) @ 20 ns
(1)
, 415mW per byte (Max) @ 50ns
(2)
– Standby: 15 mW (Typ)
Military Temperature Range: -55 to +125°C
TTL-Compatible Inputs and Outputs
Asynchronous
Die manufactured on Atmel 0.25 µm Radiation Hardened Process
No Single Event Latch Up below LET Threshold of 80 MeV/mg/cm
2
Tested up to a Total Dose of 300 krads (Si) according to MIL-STD-883 Method 1019
ESD Better than 2000V
Quality Grades:
– QML-Q or V with SMD 5962-06229
– ESCC
950 Mils Wide MQFP 68 Package
Mass : 8.5 grams
1. For AT68166FT-20 only. 540mW for AT68166FT-25.
2. For AT68166FT-20 only. 450mW for AT68166FT-25.
Rad Hard
16 MegaBit 3.3V
5V Tolerant
SRAM Multi-
Chip Module
AT68166FT
Notes:
Description
The AT68166FT is a 16Mbit SRAM packaged in a hermetic Multi Chip Module (MCM)
for space applications.
The AT68166FT MCM incorporates four 4Mbit AT60142FT SRAM dice. It can be orga-
nized as either one bank of 512Kx8, two banks of 512Kx16 or four banks of 512Kx8. It
combines rad-hard capabilities, a latch-up threshold of 80MeV.cm²/mg, a Multiple Bit
Upset immunity and a total dose tolerance of 300Krads, with a fast access time.
The MCM packaging technology allows a reduction of the PCB area by 50% with a
weight savings of 75% compared to four 4Mbit packages.
Thanks to the small size of the 4Mbit SRAM die, Atmel has been able to accommo-
date the assembly of the four dice on one side of the package which facilitates the
power dissipation.
The compatibility with other products allows designers to easily migrate to the Atmel
AT68166FT memory.
The AT68166FT is powered at 3.3V and is 5V tolerant.
The AT68166FT is processed according to the test methods of the latest revision of
the MIL-PRF-38535 or the ESCC 9000.
7531H–AERO–04/09
Block Diagram
Figure 1.
AT68166FT Block Diagram
CS3
WE3
CS2
WE2
CS1
WE1
CS0
WE0
A[18:0]
OE
BANK3
512k x 8
BANK2
512k x 8
BANK1
512k x 8
BANK0
512k x 8
I/O[31:24]
or
I/O2[31:16]
or
I/O3[7:0]
I/O[23:16]
or
I/O2[15:0]
or
I/O2[7:0]
I/O[15:8]
or
I/O1[31:16]
or
I/O1[7:0]
I/O[7:0]
or
I/O1[15:0]
or
I/O[7:0]
Figure 2.
512K x 8 Banks Block Diagram (AT60142FT)
A
0
-
-
-
A
10
I/Ox
0
I/Ox
7
CSx
WEx
OE
Packages
AT68166FT is packed in MQFP68.
Access Times
25 ns
AT68166FT
YM
20 ns
YS
18 ns
YS
The pin assignment depends on the access time. There are 2 versions:
–
–
YM package where 3 pins are not connected.
YS package where the 3 above pins are connected to GND or V
CC
.
2
AT68166FT
7531H–AERO–04/09
NXP MCU
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