HD74ALVCH162827
20-bit Buffers / Drivers with 3-state Outputs
REJ03D0042-0400Z
(Previous ADE-205-188B (Z) )
Rev.4.00
Oct.02.2003
Description
The HD74ALVCH162827 is composed of two 10-bit sections with separate output enable signals. For
either 10-bit buffer section, the two output enable (1OE1 and 1OE2 or 2OE1 and 2OE2) inputs must both
be low for the corresponding Y outputs to be active. If either output enable input is high, the outputs of that
10-bit buffer section are in the high impedance state. Active bus hold circuitry is provided to hold unused
or floating data inputs at a valid logic level. All outputs, which are designed to sink up to 12 mA, include
26
Ω
resistors to reduce overshoot and undershoot.
Features
•
•
•
•
•
•
V
CC
= 2.3 V to 3.6 V
Typical V
OL
ground bounce < 0.8 V (@V
CC
= 3.3 V, Ta = 25°C)
Typical V
OH
undershoot > 2.0 V (@V
CC
= 3.3 V, Ta = 25°C)
High output current ±12 mA (@V
CC
= 3.0 V)
Bus hold on data inputs eliminates the need for external pullup / pulldown resistors
All outputs have equivalent 26
Ω
series resistors, so no external resistors are required.
Rev.4.00, Oct.02.2003, page 1 of 9
HD74ALVCH162827
Function Table
Inputs
OE1
L
L
H
X
H : High level
L : Low level
X : Immaterial
Z : High impedance
OE2
L
L
X
H
A
L
H
X
X
L
H
Z
Z
Output Y
Rev.4.00, Oct.02.2003, page 2 of 9
HD74ALVCH162827
Pin Arrangement
1OE1 1
1Y1 2
1Y2 3
GND 4
1Y3 5
1Y4 6
V
CC
7
1Y5 8
1Y6 9
1Y7 10
GND 11
1Y8 12
1Y9 13
1Y10 14
2Y1 15
2Y2 16
2Y3 17
GND 18
2Y4 19
2Y5 20
2Y6 21
V
CC
22
2Y7 23
2Y8 24
GND 25
2Y9 26
2Y10 27
2OE1 28
56 1OE2
55 1A1
54 1A2
53 GND
52 1A3
51 1A4
50 V
CC
49 1A5
48 1A6
47 1A7
46 GND
45 1A8
44 1A9
43 1A10
42 2A1
41 2A2
40 2A3
39 GND
38 2A4
37 2A5
36 2A6
35 V
CC
34 2A7
33 2A8
32 GND
31 2A9
30 2A10
29 2OE2
(Top view)
Rev.4.00, Oct.02.2003, page 3 of 9
HD74ALVCH162827
Absolute Maximum Ratings
Item
Supply voltage
Input voltage
*1
Output voltage
*1, 2
Input clamp current
Output clamp current
Continuous output current
V
CC
, GND current / pin
Maximum power dissipation
*3
at Ta = 55°C (in still air)
Storage temperature
Symbol
V
CC
V
I
V
O
I
IK
I
OK
I
O
I
CC
or I
GND
P
T
Tstg
Ratings
–0.5 to 4.6
–0.5 to 4.6
–0.5 to V
CC
+0.5
–50
±50
±50
±100
1
–65 to 150
Unit
V
V
V
mA
mA
mA
mA
W
°C
TSSOP
V
I
< 0
V
O
< 0 or V
O
> V
CC
V
O
= 0 to V
CC
Conditions
Notes: Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to
the device. These are stress ratings only, and functional operation of the device at these or any
other conditions beyond those indicated under “recommended operating conditions” is not implied.
Exposure to absolute maximum rated conditions for extended periods may affect device reliability.
1. The input and output negative voltage ratings may be exceeded if the input and output clamp
current ratings are observed.
2. This value is limited to 4.6 V maximum.
3. The maximum package power dissipation is calculated using a junction temperature of 150°C
and a board trace length of 750 mils.
Recommended Operating Conditions
Item
Supply voltage
Input voltage
Output voltage
High level output current
Symbol
V
CC
V
I
V
O
I
OH
Min
2.3
0
0
—
—
—
Low level output current
I
OL
—
—
—
Input transition rise or fall rate
Operating temperature
∆t
/
∆v
Ta
0
–40
Max
3.6
V
CC
V
CC
–6
–8
–12
6
8
12
10
85
ns / V
°C
mA
Unit
V
V
V
mA
V
CC
= 2.3 V
V
CC
= 2.7 V
V
CC
= 3.0 V
V
CC
= 2.3 V
V
CC
= 2.7 V
V
CC
= 3.0 V
Conditions
Note: Unused control inputs must be held high or low to prevent them from floating.
Rev.4.00, Oct.02.2003, page 4 of 9
HD74ALVCH162827
Logic Diagram
1OE1
1
1OE2
56
1A1
55
2
1Y1
To nine other channels
2OE1
28
2OE2
29
2A1
42
15
2Y1
To nine other channels
Rev.4.00, Oct.02.2003, page 5 of 9
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