HY62UF16201A Series
128Kx16bit full CMOS SRAM
Document Title
128K x16 bit 3.0V Super Low Power Full CMOS Slow SRAM
Revision History
Revision No
05
History
Draft Date
Remark
06
07
Divide output load into two factors
Dec.10. 2000 Final
- tCLZ,tOLZ,tBLZ,tCHZ,tOHZ,tBHZ,tWHZ,tOW
- Others
Add the marking information
Correct the PKG dimension(E1)
Aug. 01. 2001
Add the dimension and the marking information of the 6x8 PKG size
Separate the part number(HY62UF16201AF1) for the 6x8 PKG Aug. 31. 2001
size from the 7x8 PKG size(HY62UF16201AF)
This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any
responsibility for use of circuits described. No patent licenses are implied.
Rev.07 / Aug. 2001
Hynix Semiconductor
HY62UF16201A Series
DESCRIPTION
The HY62UF16201A is a high speed, super low
power and 2Mbit full CMOS SRAM organized as
131,072 words by 16bits. The HY62UF16201A
uses high performance full CMOS process
technology and is designed for high speed and
low power circuit technology. It is particularly well-
suited for the high density low power system
application. This device has a data retention
mode that guarantees data to remain valid at a
minimum power supply voltage of 1.2V.
FEATURES
•
Fully static operation and Tri-state output
•
TTL compatible inputs and outputs
•
Battery backup(LL/SL-part)
-. 1.2V(min) data retention
•
Standard pin configuration
-. 48-FBGA
Product
Voltage
Speed
No.
(V)
(ns)
HY62UF16201A
2.7~3.3
55/70/85/100
HY62UF16201A-I
2.7~3.3
55/70/85/100
Notes :
1. Blank : Commercial, I : Industrial
2. Current value is max.
Operation
Current/Icc(mA)
3
3
Standby Current(uA)
LL
SL
10
2
10
2
Temperature
(°C)
0~70
-40~85(I)
PIN CONNECTION
/LB
/OE A0
A1
A4
A6
A7
A2
NC
A0
BLOCK DIAGRAM
ROW
DECODER
SENSE AMP
ADD INPUT BUFFER
I/O1
IO9 /UB A3
IO10 IO11 A5
Vss IO12 NC
Vcc IO13 NC
/CS IO1
IO2 IO3
IO4 Vcc
COLUMNDECODER
DATA I/O
BUFFER
A16 IO5 Vss
MEMORY ARRAY
128K x 16
WRITE DRIVER
IO15 IO14 A14 A15 IO6 IO7
IO16 NC
NC
A8
A12 A13 /WE IO8
A9
A10 A11 NC
/CS
/OE
/LB
/UB
/WE
CONTROL
LOGIC
A16
I/O16
48-FBGA(Top View)
PIN DESCRIPTION
Pin Name
/CS
/WE
/OE
/LB
/UB
Pin Function
Chip Select
Write Enable
Output Enable
Lower Byte Control(I/O1~I/O8)
Upper Byte Control(I/O9~I/O16)
Pin Name
I/O1~I/O16
A0~A16
Vcc
Vss
NC
Pin Function
Data Inputs / Outputs
Address Inputs
Power(2.7V~3.3V)
Ground
No Connection
Rev.07 / Aug. 2001
2
HY62UF16201A Series
ORDERING INFORMATION
Part No.
HY62UF16201ALLF
HY62UF16201ALLF-I
HY62UF16201ASLF
HY62UF16201ASLF-I
HY62UF16201ALLF1
HY62UF16201ALLF1-I
HY62UF16201ASLF1
HY62UF16201ASLF1-I
Speed
55/70/85/100
55/70/85/100
55/70/85/100
55/70/85/100
55/70/85/100
55/70/85/100
55/70/85/100
55/70/85/100
Power
LL-part
LL-part
SL-part
SL-part
LL-part
LL-part
SL-part
SL-part
Temp.
I
I
I
I
Package
FBGA(7mm X 8mm)
FBGA(7mm X 8mm)
FBGA(7mm X 8mm)
FBGA(7mm X 8mm)
FBGA(6mm X 8mm)
FBGA(6mm X 8mm)
FBGA(6mm X 8mm)
FBGA(6mm X 8mm)
Note :
1. Blank : Commercial, I : Industrial
ABSOLUTE MAXIMUM RATINGS (1)
Symbol
V
IN,
V
OUT
Vcc
T
A
Parameter
Input/Output Voltage
Power Supply
Operating Temperature
Rating
-0.2 to 3.6
-0.2 to 4.6
0 to 70
-40 to 85
-55 to 150
1.0
260
•
10
Unit
V
V
°C
°C
°C
W
°C•sec
Remark
HY62UF16201A
HY62UF16201A-I
T
STG
Storage Temperature
P
D
Power Dissipation
T
SOLDER
Ball Soldering Temperature & Time
Note
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent
damage to the device. This is stress rating only and the functional operation of the device under these or
any other conditions above those indicated in the operation of this specification is not implied.
Exposure to the absolute maximum rating conditions for extended period may affect reliability.
TRUTH TABLE
/CS
H
X
L
L
L
/WE
X
X
H
H
H
/OE
X
X
H
H
L
/LB
X
H
L
X
L
H
L
L
H
L
/UB
X
H
X
L
H
L
L
H
L
L
Mode
Deselected
Deselected
Output Disabled
Output Disabled
Read
I/O
I/O1~I/O8 I/O9~I/O16
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
D
OUT
High-Z
High-Z
D
OUT
D
OUT
D
OUT
D
IN
High-Z
High-Z
D
IN
D
IN
D
IN
Power
Standby
Standby
Active
Active
Active
L
L
X
Write
Active
Note :
1. H=V
IH
, L=V
IL
, X=don't care
2. UB, LB(Upper, Lower Byte enable)
These active LOW inputs allow individual bytes to be written or read.
When LB is LOW, data is written or read to the lower byte, I/O 1 -I/O 8.
When UB is LOW, data is written or read to the upper byte, I/O 9 -I/O 16.
Rev.07 / Aug. 2001
2
HY62UF16201A Series
RECOMMENDED DC OPERATING CONDITION
Symbol
Parameter
Min.
Vcc
Supply Voltage
2.7
Vss
Ground
0
V
IH
Input High Voltage
2.2
V
IL
Input Low Voltage
-0.3
(1)
Note :
1. VIL = -1.5V for pulse width less than 30ns
Typ.
3.0
0
-
-
Max.
3.3
0
Vcc+0.3
0.6
Unit
V
V
V
V
DC ELECTRICAL CHARACTERISTICS
T
A
= 0°C to 70°C/ -40°C to 85°C (I)
Symbol
Parameter
I
LI
Input Leakage Current
I
LO
Output Leakage Current
Test Condition
Vss < V
IN
< Vcc
Vss < V
OUT
< Vcc, /CS = V
IH
or
/
OE
=
V
IH
or /WE = V
IL,
/
UB
=
/LB = V
IH
/CS = V
IL
, V
IN
= V
IH
or V
IL,
I
I/O =
0mA
Cycle Time=Min.100% duty,
/CS = V
IL,
V
IN
= V
IH
or V
IL,
I
I/O =
0mA
Cycle time = 1us,
/CS < 0.2V, V
IN
<0.2V, I
I/O =
0mA
/CS = V
IH
or
/UB & /LB = V
IH,
V
IN
= V
IH
or V
IL
/CS > Vcc - 0.2V or
SL
/UB = /LB > Vcc - 0.2V,
V
IN
> Vcc - 0.2V or
LL
V
IN
< Vss + 0.2V
I
OL
= 2.1mA
I
OH =
-1.0mA
Min.
-1
-1
Typ.
-
-
Max.
1
1
Unit
uA
uA
Icc
I
CC1
Operating Power Supply
Current
Average Operating
Current
-
-
-
-
3
45
5
mA
mA
mA
mA
uA
uA
V
V
I
SB
I
SB1
Standby
Current
(TTL Input)
-
-
-
-
2.4
-
-
0.5
-
-
0.3
2
10
0.4
-
Standby Current
(CMOS Input)
V
OL
Output Low Voltage
V
OH
Output High Voltage
Notes :
1. Typical values are at Vcc = 3.0V, T
A
= 25°C
2. Typical values are sampled and not 100% tested
CAPACITANCE
(Temp = 25°C, f= 1.0MHz)
Symbol
Parameter
Condition
C
IN
Input Capacitance(Add, /CS, /WE, /OE) V
IN
= 0V
C
OUT
Output Capacitance(I/O)
V
I/O
= 0V
Note :
1. These parameters are sampled and not 100% tested
Max.
8
10
Unit
pF
pF
Rev.07 / Aug. 2001
3
HY62UF16201A Series
AC CHARACTERISTICS
T
A
=0°C to 70°C/ -40°C to 85°C (I),unless otherwise specified
-55
# Symbol
Parameter
Min
Max
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
READ CYCLE
tRC
Read Cycle Time
tAA
Address Access Time
tACS
Chip Select Access Time
tOE
Output Enable to Output Valid
tBA
/LB, /UB Access Time
tCLZ
Chip Select to Output in Low Z
tOLZ
Output Enable to Output in Low Z
tBLZ
/LB, /UB Enable to Output in Low Z
tCHZ
Chip Deselection to Output in High Z
tOHZ
Out Disable to Output in High Z
tBHZ
/LB, /UB Disable to Output in High Z
tOH
Output Hold from Address Change
WRITE CYCLE
tWC
Write Cycle Time
tCW
Chip Selection to End of Write
tAW
Address Valid to End of Write
tBW
/LB, /UB Valid to End of Write
tAS
Address Set-up Time
tWP
Write Pulse Width
tWR
Write Recovery Time
tWHZ
Write to Output in High Z
tDW
Data to Write Time Overlap
tDH
Data Hold from Write Time
tOW
Output Active from End of Write
55
-
-
-
-
10
5
5
0
0
0
10
55
50
50
50
0
45
0
0
25
0
5
-
55
55
30
55
-
-
-
30
30
30
-
-
-
-
-
-
-
-
20
-
-
-
-70
Min
Max
Min
-85
Max
Min
-10
Max
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
70
-
-
-
-
10
5
5
0
0
0
10
70
60
60
60
0
50
0
0
30
0
5
-
70
70
35
70
-
-
-
30
30
30
-
-
-
-
-
-
-
-
25
-
-
-
85
-
-
-
-
10
5
5
0
0
0
10
85
70
70
70
0
55
0
0
35
0
5
-
85
85
40
85
-
-
-
30
30
30
-
-
-
-
-
-
-
-
30
-
-
-
100
-
-
-
-
20
5
5
0
0
0
15
100
80
80
80
0
75
0
0
45
0
10
-
100
100
50
100
-
-
-
30
30
30
-
-
-
-
-
-
-
-
35
-
-
-
AC TEST CONDITIONS
T
A
= 0°C to 70°C/ -40°C to 85°C (I),unless otherwise specified
Parameter
Input Pulse Level
Input Rise and Fall Time
Input and Output Timing Reference Level
Output Load tCLZ,tOLZ,tBLZ,tCHZ,tOHZ,tBHZ,tWHZ,tOW
Others
Value
0.4V to 2.2V
5ns
1.5V
CL = 5pF + 1TTL Load
CL = 30pF + 1TTL Load
AC TEST LOADS
V
TM
= 2.8V
1029 Ohm
D
OUT
CL(1)
1728 Ohm
Note :
1. Including jig and scope capacitance
Rev.07 / Aug. 2001
4
FPGA/CPLD
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