IDT54/74FCT299T/AT/CT
FAST CMOS 8-INPUT UNIVERSAL SHIFT REGISTER
MILITARY AND INDUSTRIAL TEMPERATURE RANGES
FAST CMOS
8-INPUT UNIVERSAL
SHIFT REGISTER
FEATURES:
•
•
•
•
IDT54/74FCT299T/AT/CT
•
•
•
•
•
Std., A, and C grades
Low input and output leakage
≤
1µA (max.)
CMOS power levels
True TTL input and output compatibility:
– V
OH
= 3.3V (typ.)
– V
OL
= 0.3V (typ.)
High Drive outputs (-15mA I
OH
, 48mA I
OL
)
Meets or exceeds JEDEC standard 18 specifications
Military product compliant to MIL-STD-883, Class B and DESC
listed (dual marked)
Power off disable outputs permit "live insertion"
Available in the following packages:
– Industrial: SOIC, QSOP
– Military: CERDIP, LCC
The FCT299T is built using an advanced dual metal CMOS technology.
The FCT299T is an 8-input universal shift/storage register with 3-state
outputs. Four modes of operation are possible: hold (store), shift left, shift
right and load data. The parallel load inputs and flip-flop outputs are
multiplexed to reduce the total number of package pins. Additional outputs
are provided for flip-flops Q
0
and Q
7
to allow easy serial cascading. A
separate active low Master Reset is used to reset the register.
DESCRIPTION:
FUNCTIONAL BLOCK DIAGRAM
S
1
S
0
DS
7
DS
0
CP
D
C
D
Q
Q
0
MR
OE
1
OE
2
I/O
0
I/O
1
I/O
2
I/O
3
I/O
4
I/O
5
I/O
6
I/O
7
Q
7
C
P
D
C
D
Q
C
P
D
C
D
Q
C
P
D
C
D
Q
C
P
D
C
D
Q
C
P
D
C
D
Q
C
P
D
C
D
Q
C
P
D
C
D
Q
C
P
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND INDUSTRIAL TEMPERATURE RANGES
1
JUNE 2002
DSC-2632/8
© 2002 Integrated Device Technology, Inc.
IDT54/74FCT299T/AT/CT
FAST CMOS 8-INPUT UNIVERSAL SHIFT REGISTER
MILITARY AND INDUSTRIAL TEMPERATURE RANGES
PIN CONFIGURATION
OE
2
OE
1
S
0
OE
1
OE
2
I/O
6
I/O
4
I/O
2
I/O
0
Q
0
MR
GND
2
3
4
5
6
7
8
9
10
19
18
17
16
15
14
13
12
11
S
1
DS
7
Q
7
I/O
7
I/O
5
I/O
3
I/O
1
CP
DS
0
GND
3
2
1
20
19
18
17
16
15
14
9
10
11
12
13
I/O
6
I/O
4
I/O
2
I/O
0
Q
0
S
1
S
0
1
20
V
CC
INDEX
V
CC
4
5
6
7
8
DS
7
Q
7
I/O
7
I/O
5
I/O
3
DS
0
CERDIP/ SOIC/ QSOP
TOP VIEW
LCC
TOP VIEW
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
TERM
(2)
V
TERM
(3)
T
STG
I
OUT
Description
Terminal Voltage with Respect to GND
Terminal Voltage with Respect to GND
Storage Temperature
DC Output Current
Max
–0.5 to +7
–0.5 to V
CC
+0.5
–65 to +150
–60 to +120
Unit
V
V
°C
mA
PIN DESCRIPTION
Pin Names
CP
DS
0
DS
7
S
0
, S
1
MR
OE
1
,
OE
2
I/O
0
–I/O
7
O
0
, O
7
Description
Clock Pulse Input (Active Edge Rising)
Serial Data Input for Right Shift
Serial Data Input for Left Shift
Mode Select Inputs
Asynchronous Master Reset Input (Active LOW)
3-State Output Enable Inputs (Active LOW)
Parallel Data Inputs or 3-State Parallel Outputs
Serial Outputs
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability. No terminal voltage may exceed
Vcc by +0.5V unless otherwise noted.
2. Inputs and Vcc terminals only.
3. Output and I/O terminals only.
FUNCTION TABLE
(1)
Inputs
MR
S
1
X
H
L
H
L
S
0
X
H
H
L
L
CP
X
↑
↑
↑
X
Response
Asynchronous Reset Q
0
–Q
7
= LOW
Parallel Load; I/O
x
→
Q
x
Shift Right; DS
0
→
Q
0
, Q
0
→
Q
1
, etc.
Shift Left; DS
7
→
Q
7
, Q
7
→
Q
6
, etc.
Hold
CAPACITANCE
(T
A
= +25°C, F = 1.0MHz)
Symbol
C
IN
C
OUT
Parameter
(1)
Input Capacitance
Output Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Typ.
6
8
Max.
10
12
Unit
pF
pF
L
H
H
H
H
NOTE:
1. This parameter is measured at characterization but not tested.
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
↑
= LOW-to-HIGH clock transition
2
I/O
1
MR
CP
IDT54/74FCT299T/AT/CT
FAST CMOS 8-INPUT UNIVERSAL SHIFT REGISTER
MILITARY AND INDUSTRIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Industrial: T
A
= –40°C to +85°C, V
CC
= 5.0V ±5%; Military: T
A
= –55°C to +125°C, V
CC
= 5.0V ±10%
Symbol
V
IH
V
IL
I
IH
I
IL
I
I
V
IK
I
OS
V
OH
Parameter
Input HIGH Level
Input LOW Level
Input HIGH Current
(4)
Input LOW Current
(4)
Input HIGH Current
(4)
Clamp Diode Voltage
Short Circuit Current
Output HIGH Voltage
Test Conditions
(1)
Guaranteed Logic HIGH Level
Guaranteed Logic LOW Level
V
CC
= Max.
V
CC
= Max.
V
CC
= Max., V
I
= V
CC
(Max.)
V
CC
= Min., I
IN
= –18mA
V
CC
= Max., V
O
= GND
(3)
V
CC
= Min
V
IN
= V
IH
or V
IL
I
OH
= –6mA MIL
I
OH
= –8mA IND
I
OH
= –12mA MIL
I
OH
= –15mA IND
I
OL
= 32mA MIL
I
OL
= 48mA IND
—
V
CC
= Max.
V
IN
= GND or V
CC
V
I
= 2.7V
V
I
= 0.5V
Min.
2
—
—
—
—
—
–60
2.4
2
—
—
—
—
Typ.
(2)
—
—
—
—
—
–0.7
–120
3.3
3
0.3
—
200
0.01
Max.
—
0.8
±1
±1
±1
–1.2
–225
—
—
0.5
±1
—
1
V
µA
mV
mA
µA
V
mA
V
Unit
V
V
µA
V
OL
I
OFF
V
H
I
CC
Output LOW Voltage
Input/Output Power Off Leakage
(5)
Input Hysteresis
Quiescent Power Supply Current
V
CC
= Min
V
IN
= V
IH
or V
IL
V
CC
= 0V, V
IN
or V
O
≤
4.5V
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient.
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.
4. The test limit for this parameter is ±5µA at T
A
= –55°C.
5. This parameter is guaranteed but not tested.
3
IDT54/74FCT299T/AT/CT
FAST CMOS 8-INPUT UNIVERSAL SHIFT REGISTER
MILITARY AND INDUSTRIAL TEMPERATURE RANGES
POWER SUPPLY CHARACTERISTICS
Symbol
∆I
CC
I
CCD
Parameter
Quiescent Power Supply
Current TTL Inputs HIGH
Dynamic Power Supply Current
(4)
Vcc = Max.
V
IN
= 3.4V
(3)
Test Conditions
(1)
Min.
—
V
IN
= V
CC
V
IN
= GND
—
Typ.
(2)
0.5
0.15
Max.
2
0.25
Unit
mA
mA/MHz
Vcc = Max.
Outputs Open
OE
1
=
OE
2
= GND
MR
= V
CC
S
0
= S
1
= V
CC
DS
0
= DS
1
= GND
One Input Toggling
50% Duty Cycle
Vcc = Max.
Outputs Open
f
CP
= 10MHz
50% Duty Cycle
OE
1
=
OE
2
= GND
MR
= V
CC
S
0
= S
1
= V
CC
DS
0
= DS
7
= GND
One Bit Toggling
at f
i
= 5MHz
50% Duty Cycle
Vcc = Max.
Outputs Open
f
CP
= 10MHz
50% Duty Cycle
OE
1
=
OE
2
= GND
MR
= V
CC
S
0
= S
1
= V
CC
DS
0
= DS
7
= GND
Eight Bits Toggling
at f
i
= 2.5MHz
50% Duty Cycle
I
C
Total Power Supply Current
(6)
V
IN
= V
CC
V
IN
= GND
—
1.5
3.5
mA
V
IN
= 3.4V
V
IN
= GND
—
2
5.5
V
IN
= V
CC
V
IN
= GND
—
3.8
7.3
(5)
V
IN
= 3.4V
V
IN
= GND
—
6
16.3
(5)
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient.
3. Per TTL driven input; (V
IN
= 3.4V). All other inputs at V
CC
or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of
∆I
CC
formula. These limits are guaranteed but not tested.
6. I
C
= I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
∆I
CC
D
H
N
T
+ I
CCD
(f
CP
/2+ f
i
N
i
)
I
CC
= Quiescent Current
∆I
CC
= Power Supply Current for a TTL High Input (V
IN
= 3.4V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current caused by an Input Transition Pair (HLH or LHL)
f
CP
= Clock Frequency for Register Devices (Zero for Non-Register Devices)
f
i
= Output Frequency
N
i
= Number of Outputs at f
i
All currents are in milliamps and all frequencies are in megahertz.
4
IDT54/74FCT299T/AT/CT
FAST CMOS 8-INPUT UNIVERSAL SHIFT REGISTER
MILITARY AND INDUSTRIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
IDT54FCT299T
Mil.
Symbol
t
PLH
t
PHL
t
PLH
t
PHL
t
PHL
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
SU
t
SU
t
H
t
H
t
W
t
W
t
REM
Parameter
Propagation Delay
CP to Q
0
or Q
7
Propagation Delay
CP to I/Ox
Propagation Delay
MR
to Q
0
or Q
7
Propagation Delay
MR
to I/Ox
Output Enable Time
OEx
to I/Ox
Output Disable Time
OEx
to I/Ox
Set-up Time HIGH or LOW
S
0
or S
1
to CP
Set-up Time HIGH or LOW
I/On, DS
0
or DS
7
to CP
Hold Time HIGH or LOW
S
0
or S
1
to CP
Hold Time HIGH or LOW
I/Ox, DS
0
or DS
7
to CP
CP Pulse Width, HIGH or LOW
MR
Pulse Width LOW
Recovery Time
7
7
7
—
—
—
5
5
5
—
—
—
6
6
6
—
—
—
5
5
5
—
—
—
6
6
6
—
—
—
ns
ns
ns
1.5
—
1.5
—
1.5
—
1.5
—
1.5
—
ns
1
—
1
—
1
—
1
—
1
—
ns
5.5
—
4
—
4.5
—
4
—
4.5
—
ns
7.5
—
3.5
—
4
—
3.5
—
4
—
ns
1.5
9
1.5
6
1.5
6.5
1.5
6
1.5
6.5
ns
1.5
15
1.5
6.5
1.5
7.5
1.5
6.5
1.5
7.5
ns
2
15
2
8.7
2
11.5
2
6.5
2
7.5
ns
2
10.5
2
7.2
2
9.5
2
6.5
2
7.5
ns
Condition
(1)
C
L
= 50pF
R
L
= 500Ω
2
12
2
7.2
2
9.5
2
6.5
2
7.5
ns
Min
. (2)
Max
.
2
14
2
IDT54/74FCT299AT
Ind.
7.2
2
Mil.
9.5
2
Min
. (2)
Max
.
Min
. (2)
Max
.
IDT54/74FCT299CT
Ind.
6.5
2
Mil.
7.5
ns
Min
. (2)
Max
.
Min
. (2)
Max
.
Unit
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
5
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