SiT9102
Features
• Extremely low RMS phase jitter (random)
• <1 ps (typical)
• Wide frequency range
• 1 MHz to 220 MHz
• 220 MHz to 800 MHz (contact SiTime)
• High frequency stability
• ±10 PPM, ±15 PPM, ±20 PPM
• ±25 PPM, ±50 PPM
• Operating voltage
• 1.8, 2.5 or 3.3 V
• Operating temperature range
• Industrial, -40 to 85 °C
• Extended Commercial, -20 to 70 °C
• Commercial, 0 to 70 °C
• Small footprint
• 5.0 x 3.2 x 0.85 mm
• 7.0 x 5.0 x 0.85 mm
• Pb-free and ROHs compliant
• For Spread Spectrum see SiT9002
• Ultra-reliable start up and greater immunity from interfer-
ence
PRELIMINARY
LVPECL / HCSL / LVDS / CML
1 to 800 MHz High Performance Oscillator
Benefits
•
•
•
•
•
Ultra fast lead time: 2 to 3 weeks
No crystal or capacitors required
Eliminates crystal qualification time
50% + board saving space
More cost effective than quartz oscillators, quartz crystals
and clock ICs.
• Completely quartz-free
Applications
•
•
•
•
•
•
•
•
•
•
•
Server
Router
RAID controller
Gigabit Ethernet
10 Gigabit Ethernet
Fiber Channel
SATA / SAS
PCI-Express
Fully Buffered DIMM
System clock
Networking and computing
Block Diagram
VDD
OUT- OUT+
Pinout
ST/OE
1
6
VDD
NC
2
5
OUT-
MEMS
Resonator
High Performance
Phase Lock Loop
GND
3
4
OUT+
ST/OE
GND
SiTime Corporation
Rev. 1.3
990 Almanor Avenue, Suite 200
Sunnyvale, CA 94085
(408) 328-4400
www.sitime.com
Revised March 12, 2009
SiT9102
PRELIMINARY
Pin Description
Pin No.
1
Name
ST/OE
Input
Pin Description
Standby or Output Enable pin for OUT+ and OUT-.
OE:
When High or Open : OUT+ and OUT- = active
When Low : OUT+ and OUT- = High Impedance state
ST:
When High or Open : OUT+ and OUT- = active
When Low : OUT+ and OUT- = High Impedance State
Do Not connect pin, leave it floating.
VDD power supply ground. Connect to Ground
1 to 220 MHz programmable clock output .
1 to 220 MHz programmable clock output .
2
3
4
5
NC
GND
OUT+
OUT-
NA
Power
Output
Output
Absolute Maximum Ratings
Attempted operation outside the absolute maximum ratings of the part may cause permanent damage to the part. Actual
performance of the IC is only guaranteed within the operational specifications, not at absolute maximum ratings.
Ab
solute Maximum Table
Parameter
Storage Temperature
VDD
Theta JA ( with copper plane on VDD and GND)
Theta JC (with PCB traces of 0.010 inch to all pins)
Soldering Temperature (follow standard Pb free soldering guidelines)
Number of Program Writes
Program Retention over -40 to 125C, Process, VDD (0 to 3.6V)
Human Body Model (JESD22-A114)
Charged Device Model (JESD22-C101)
Machine Model (JESD22-A115)
Min.
-65
-0.5
–
–
–
–
–
2000
750
200
Max.
150
+4.00
TBD
TBD
260
1
1,000+
–
–
–
Unit
°C
V
°C/W
°C/W
°C
NA
years
–
–
–
Environmental Compliance
Parameter
Mechanical Shock
Mechanical Vibration
Temperature Cycle
Solderability
Moisture Sensibility Level
Condition/Test Method
MIL-STD-883F, Method 2002, 50 KG Shock
MIL-STD-883F, Method 2007, 70 G Vibration
MIL-STD-883F, Method 1010-65-150°C (1000 cycle)
MIL-STD-883F, Method 2003
MSL1
Page 2 of 13
SiT9102
DC Electrical Specifications
PRELIMINARY
LVCMOS, OE and ST pins, 3.3V ±10% or 2.5V ±10% or 1.8V ±5%,-40 to 85°C
Symbol
V
IH
V
IL
I
IH
I
IL
Parameter
Input High Voltage
Input Low Voltage
Input High Current
Input Low Current
OE or ST pin
OE or ST pin
Condition
Min.
70
–
–
TBD
Typ.
–
–
–
–
Max.
–
30
TBD
–
Unit
%Vdd
%Vdd
µA
µA
LVPECL, 3.3V ±10% or 2.5V ±10%, -40 to 85°C
Symbol
V
DD
I
DD
V
OH
V
OL
V
swing
Parameter
Supply Voltage
Supply Current
Output High Voltage
Output Low Voltage
Pk-PK Output Voltage Swing
V
DD
= 3.3V
V
DD
= 2.5V
50 Ohm termination to V
DD
- 2.0V
See Figure 2, 3.
Condition
Min.
2.97
2.25
–
–
V
DD
-1.1
V
DD
-2.0
600
Typ.
3.3
2.5
70
70
–
–
800
Max.
3.63
2.75
TBD
TBD
V
DD
-0.7
V
DD
-1.4
1000
Unit
V
V
mA
mA
V
V
mV
HCSL, 3.3V ±10% or 2.5V ±10%, -40 to 85°C
Symbol
V
DD
I
DD
V
OH
V
OL
V
swing
Parameter
Supply Voltage
Supply Current
Output High Voltage
Output Low Voltage
Pk-PK Output Voltage Swing
V
DD
= 3.3V
V
DD
= 2.5V
50 Ohm termination to GND
See Figure 4.
Condition
Min.
2.97
2.25
–
–
1.0
0.1
600
Typ.
3.3
2.5
70
70
–
–
750
Max.
3.63
2.75
TBD
TBD
1.4
0.4
900
Unit
V
V
mA
mA
V
V
mV
LVDS, 3.3V ±10% or 2.5V ±10%, -40 to 85°C
Symbol
V
DD
I
DD
V
OD1
Parameter
Supply Voltage
Supply Current
Differential Output Voltage
V
OD
Magnitude Change
Offset Voltage
V
OS
Magnitude Change
Differential Output Voltage
V
OD
Magnitude Change
Offset Voltage
V
OS
Magnitude Change
Differential Output Voltage
V
OD
Magnitude Change
Offset Voltage
V
OS
Magnitude Change
Swing Mode = High
Double load termination.
See Figure 6.
Swing Mode = High
Single load termination.
See Figure 5.
V
DD
= 3.3V
V
DD
= 2.5V
Swing Mode = Normal
Single load termination.
See Figure 5.
Condition
Min.
2.97
2.25
–
–
250
–
–
–
500
–
–
–
250
–
–
–
Typ.
3.3
2.5
70
70
350
–
1.2
–
700
–
1.2
–
350
–
1.2
–
Max.
3.63
2.75
TBD
TBD
400
50
–
50
800
50
–
50
400
50
–
50
Unit
V
V
mA
mA
mV
mV
V
mV
mV
mV
V
mV
mV
mV
V
mV
Δ
V
OD1
Δ
V
OS1
Δ
V
OD2
Δ
V
OS2
Δ
V
OD3
Δ
V
OS3
V
OS3
V
OD3
V
OS2
V
OD2
V
OS1
Page 3 of 13
SiT9102
PRELIMINARY
CML, 3.3V ±10% or 2.5V ±10% or 1.8V ±5%,-40 to 85°C
Symbol
V
DD
Parameter
Supply Voltage
Condition
Min.
2.97
2.25
1.71
I
DD
Supply Current
V
DD
= 3.3V
V
DD
= 2.5V
V
DD
= 1.8V
V
OH1
V
OL1
V
swing1
V
OH2
V
OL2
V
swing2
V
OH3
V
OL3
V
swing3
Output High Voltage
Output Low Voltage
Pk-PK Output Voltage Swing
Output High Voltage
Output Low Voltage
Pk-PK Output Voltage Swing
Output High Voltage
Output Low Voltage
Pk-PK Output Voltage Swing
Swing Mode = Normal
Single Load Termination
See Figure 7.
Swing Mode = High
Single Load Termination
See Figure 7.
Swing Mode = High
Double Load Termination
See Figure 8.
Excluding Load
Termination
Current
–
–
–
V
DD
-0.1
Typ.
3.3
2.5
1.8
40
40
40
–
Max.
3.63
2.75
1.89
TBD
TBD
TBD
V
DD
Unit
V
V
V
mA
mA
mA
V
V
mV
V
V
mV
V
V
mV
V
DD
-0.5 V
DD
-0.4 V
DD
-0.3
300
400
500
V
DD
-0.1
–
V
DD
V
DD
-1.0 V
DD
-0.8 V
DD
-0.6
600
800
1000
V
DD
-0.1
300
–
400
V
DD
500
V
DD
-0.5 V
DD
-0.4 V
DD
-0.3
AC Electrical Specifications
LVPECL, 3.3V ±10% ,-40 to 85°C
Symbol
F
out
F
sta
Parameter
Output Frequency
Frequency Stability
Inclusive of initial tolerance,
operating temp., rated power
supply voltage change, load
change
0 to 70°C
-20 to 70°C
-40 to 85°C
Condition
Min.
1.0
-10
-15
-20
-25
-50
F
age
DC
t
R
/t
F
PH
J
Aging
Duty Cycle
Output Rise/Fall Time
RMS Phase Jitter (random)
20% to 80%
F
out
= 106.25 MHz @ BW: 637 kHz to10 MHz
F
out
= 156.25 MHz @ BW: 1.87 to 20 MHz
F
out
= 200 MHz @ BW: 1 to 20 MHz
P
J
RMS Period Jitter
F
out
= 106.25 MHz
F
out
= 156.25 MHz
F
out
= 200 MHz
First year @ 25°C
–
45
TBD
–
–
–
–
–
–
–
–
300
0.8
0.5
0.5
3.0
2.5
2.0
Typ.
–
–
–
–
Max.
220
+10
+15
+20
+25
+50
1
55
TBD
–
–
–
TBD
TBD
TBD
Unit
MHz
PPM
PPM
PPM
PPM
PPM
PPM
%
ps
ps
ps
ps
ps
ps
ps
Page 4 of 13
SiT9102
PRELIMINARY
LVPECL, 2.5V ±10% ,-40 to 85°C
Symbol
F
out
F
sta
Parameter
Output Frequency
Frequency Stability
Inclusive of initial tolerance,
operating temp., rated
power supply voltage
change, load change
0 to 70°C
-20 to 70°C
-40 to 85°C
Condition
Min.
1.0
-10
-15
-20
-25
-50
F
age
DC
t
R
/t
F
PH
J
Aging
Duty Cycle
Output Rise/Fall Time
RMS Phase Jitter (random)
20% to 80%
F
out
= 106.25 MHz @ BW: 637 kHz to10 MHz
F
out
= 156.25 MHz @ BW: 1.87 to 20 MHz
F
out
= 200 MHz @ BW: 1 to 20 MHz
P
J
RMS Period Jitter
F
out
= 106.25 MHz
F
out
= 156.25 MHz
F
out
= 200 MHz
First year @ 25°C
–
45
–
–
–
–
–
–
–
–
–
300
0.8
0.5
0.5
3.0
2.5
2.0
Typ.
–
–
–
–
Max.
220
+10
+15
+20
+25
+50
1
55
TBD
–
–
–
TBD
TBD
TBD
Unit
MHz
PPM
PPM
PPM
PPM
PPM
PPM
%
ps
ps
ps
ps
ps
ps
ps
HCSL, 3.3V ±10% ,-40 to 85°C
Symbol
F
out
F
sta
Parameter
Output Frequency
Frequency Stability
Inclusive of initial tolerance,
operating temp., rated power
supply voltage change, load
change
0 to 70°C
-20 to 70°C
-40 to 85°C
Condition
Min.
1.0
-10
-15
-20
-25
-50
F
age
DC
t
R
/t
F
PH
J
P
J
Aging
Duty Cycle
Output Rise/Fall Time
RMS Phase Jitter (random)
RMS Period Jitter
20% to 80%
F
out
= 100 MHz @ BW: 1.5 MHz to 22 MHz
F
out
= 200 MHz @ BW: 1.5 MHz to 22 MHz
F
out
= 100 MHz
F
out
= 200 MHz
First year @ 25°C
–
45
TBD
–
–
–
–
–
–
300
TBD
TBD
TBD
TBD
Typ.
–
–
–
–
Max.
220
+10
+15
+20
+25
+50
1
55
TBD
–
–
TBD
TBD
Unit
MHz
PPM
PPM
PPM
PPM
PPM
PPM
%
ps
ps
ps
ps
ps
Page 5 of 13
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