IDT74FCT863A/B
HIGH-PERFORMANCE CMOS 9-BIT NON-INVERTING TRANSCEIVER
COMMERCIAL TEMPERATURE RANGE
HIGH-PERFORMANCE
CMOS 9-BIT NON-INVERTING
TRANSCEIVER
FEATURES:
DESCRIPTION:
IDT74FCT863A/B
• Equivalent to AMD's Am29861-64 bipolar registers in pinout/
function, speed, and output drive over full temperature and
voltage supply extremes
• IDT74FCT863A equivalent to FAST™ speed
• IDT74FCT863B 25% faster than FAST
• High-speed symmetrical bidirectional transceivers
• I
OL
= 48mA
• Clamp diodes on all inputs for ringing suppression
• CMOS power levels (1mW typ. static)
• TTL input and output level compatible
• CMOS output level compatible
• Substantially lower input current levels than AMD's bilopar
Am29800 series (5µA max.)
µ
• Available in SOIC package
The IDT74FCT800 series is built using an advanced dual metal CMOS
technology. The IDT74FCT863 9-bit transceivers have NAND-ed output
enables for maximum control flexibility.
All of the IDT74FCT800 high-performance interface family is designed
for high-capacitance load drive capability while providing low-capacitance
bus loading at both inputs and outputs. All inputs have clamp diodes and
all outputs are designed for low-capacitance bus loading in the high-
impedance state.
FUNCTIONAL BLOCK DIAGRAM
T
0
T
1
- T
8
OER
1
OER
2
R
0
R
1
- R
8
OET
1
OET
2
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
COMMERCIAL TEMPERATURE RANGE
1
JULY 2000
DSC-5424/1
© 2000 Integrated Device Technology, Inc.
IDT74FCT863A/B
HIGH-PERFORMANCE CMOS 9-BIT NON-INVERTING TRANSCEIVER
COMMERCIAL TEMPERATURE RANGE
PIN CONFIGURATION
OER
1
R
0
R
1
R
2
R
3
R
4
R
5
R
6
R
7
R
8
OER
2
GND
1
2
3
4
5
6
7
8
9
10
11
12
SOIC
TOP VIEW
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
Description
Terminal Voltage with Respect to GND
Terminal Voltage with Respect to GND
Operating Temperature
Temperature under BIAS
Storage Temperature
Power Dissipation
DC Output Current
Max
–0.5 to +7
–0.5 to V
CC
0 to +70
–55 to +125
–55 to +125
0.5
120
Unit
V
V
°C
°C
°C
W
mA
24
23
22
21
20
19
18
17
16
15
14
13
V
CC
T
0
T
1
T
2
T
3
T
4
T
5
T
6
T
7
T
8
OET
2
OET
1
V
TERM
(2)
V
TERM
(3)
T
A
T
BIAS
T
STG
P
T
I
OUT
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability. No terminal voltage may exceed
Vcc by +0.5V unless otherwise noted.
2. Input and Vcc terminals only.
3. Output and I/O terminals only.
CAPACITANCE
(T
A
= +25°C, F = 1.0MHz)
Symbol
C
IN
C
OUT
Parameter
(1)
Input Capacitance
Output Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Typ.
6
8
Max.
10
12
Unit
pF
pF
NOTE:
1. This parameter is measured at characterization but not tested.
LOGIC SYMBOL
PIN DESCRIPTION
Name
OER
I
I/O
I
I
I/O
I/O
Description
When LOW in conjunction with
OET
I
HIGH
activates the RECEIVE mode.
When LOW in conjunction with
OER
I
HIGH
activates the TRANSMIT mode.
9-bit RECEIVE input/output.
9-bit TRANSMIT input/output.
OET
1
OET
2
OET
I
R
I
T
I
9
9
R
OER
1
OER
2
T
FUNCTION TABLE
(1)
Inputs
OET
L
L
H
H
H
OER
H
H
L
L
H
R
I
L
H
N/A
N/A
X
T
I
N/A
N/A
L
H
X
Outputs
R
I
N/A
N/A
L
H
Z
T
I
L
H
N/A
N/A
Z
Function
Transmitting
Transmitting
Receiving
Receiving
High Z
NOTE:
1. H = HIGH
L = LOW
Z = High Impedance
X = Don’t Care
N/A = Not Applicable
2
IDT74FCT863A/B
HIGH-PERFORMANCE CMOS 9-BIT NON-INVERTING TRANSCEIVER
COMMERCIAL TEMPERATURE RANGE
Following Conditions Apply Unless Otherwise Specified: V
LC
= 0.2V; V
HC
= V
CC
- 0.2V
Commercial: T
A
= 0°C to +70°C, V
CC
= 5.0V ±5%
Symbol
V
IH
V
IL
I
IH
I
IL
I
IH
I
IL
V
IK
I
OS
V
OH
Parameter
Input HIGH Level
Input LOW Level
Input HIGH Current
(Except I/O pins)
Input LOW Current
(Except I/O pins)
Input HIGH Current
(I/O pins Only)
Input LOW Current
(I/O pins Only)
Clamp Diode Voltage
Short Circuit Current
Output HIGH Voltage
V
CC
= Min., I
N
= –18mA
V
CC
= Max. , V
O
= GND
(3)
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Test Conditions
(1)
Guaranteed Logic HIGH Level
Guaranteed Logic LOW Level
V
CC
= Max.
V
I
= V
CC
V
I
= 2.7V
V
I
= 0.5V
V
I
= GND
V
CC
= Max.
V
I
= V
CC
V
I
= 2.7V
V
I
= 0.5V
V
I
= GND
Min.
2
—
—
—
—
—
—
—
—
—
—
–75
V
HC
V
HC
2.4
—
—
—
(5)
Typ.
(2)
—
—
—
—
—
—
—
—
—
—
–0.7
–120
V
CC
V
CC
4.3
GND
GND
0.3
Max.
—
0.8
5
5
(4)
–5
(4)
–5
15
15
(4)
–15
(4)
–15
–1.2
—
—
—
—
V
LC
V
LC(4)
0.5
Unit
V
V
µA
µA
V
mA
V
V
CC
= 3V, V
IN
= V
LC
or V
HC
, I
OH
= –32µA
V
CC
= Min.
V
IN
= V
IH
or V
IL
I
OH
= –300µA
I
OH
= –24mA
I
OL
= 300µA
I
OL
= 48mA
V
OL
Output LOW Voltage
V
CC
= 3V, V
IN
= V
LC
or V
HC
, I
OL
= 300µA
V
CC
= Min.
V
IN
= V
IH
or V
IL
V
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient and maximum loading.
3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second.
4. This parameter is guaranteed but not tested.
5. These are maximum I
OL
values per output, for 10 outputs turned on simultaneously. Total maximum I
OL
(all outputs) is 480mA. Derate I
OL
for number of outputs exceeding 10
turned on simultaneously.
3
IDT74FCT863A/B
HIGH-PERFORMANCE CMOS 9-BIT NON-INVERTING TRANSCEIVER
COMMERCIAL TEMPERATURE RANGE
POWER SUPPLY CHARACTERISTICS
V
LC
= 0.2V; V
HC
= V
CC
– 0.2V
Symbol
I
CC
∆I
CC
I
CCD
Parameter
Quiescent Power
Supply Current
Quiescent Power Supply
Current TTL Inputs HIGH
Dynamic Power Supply Current
(4)
Test Conditions
(1)
V
CC
= Max.
V
IN
≥
V
HC
; V
IN
≤
V
LC
V
CC
= Max.
V
IN
= 3.4V
(3)
V
CC
= Max., Outputs Open
OER
or
OET
= GND
One Input Toggling
50% Duty Cycle
V
CC
= Max., Outputs Open
f
i
= 10MHz
50% Duty Cycle
OER
or
OET
= GND
One Bit Toggling
V
CC
= Max., Outputs Open
f
i
= 2.5MHz
50% Duty Cycle
OER
or
OET
= GND
Eight Bits Toggling
V
IN
≥
V
HC
V
IN
≤
V
LC
Min.
—
—
—
Typ.
(2)
0.2
0.5
0.15
Max.
1.5
2
0.25
Unit
mA
mA
mA/
MHz
I
C
Total Power Supply Current
(6)
V
IN
≥
V
HC
V
IN
≤
V
LC
(FCT)
V
IN
= 3.4V
V
IN
= GND
V
IN
≥
V
HC
V
IN
≤
V
LC
(FCT)
V
IN
= 3.4V
V
IN
= GND
—
1.7
4
mA
—
—
2
3.2
5
6.5
(5)
—
5.2
14.5
(5)
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient.
3. Per TTL driven input (V
IN
= 3.4V); all other inputs at V
CC
or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
5. Values for these conditions are examples of the I
CC
formula. These limits are guaranteed but not tested.
6. I
C
= I
QUIESCENT
+I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
∆I
CC
D
H
N
T
+ I
CCD
(f
CP
/2 + f
i
N
i
)
I
CC
= Quiescent Current
∆I
CC
= Power Supply Current for a TTL High Input (V
IN
= 3.4V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
f
CP
= Clock Frequency for Register Devices (Zero for Non-Register Devices)
f
i
= Input Frequency
N
i
= Number of Inputs at f
i
All currents are in milliamps and all frequencies are in megahertz.
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
FCT863A
Symbol
t
PLH
t
PHL
Parameter
Propagation Delay
I
R
I
to T
I
or T
I
to R
Condition
(1)
C
L
= 50pF
R
L
= 500Ω
C
L
= 300pF
(3)
R
L
= 500Ω
C
L
= 50pF
R
L
= 500Ω
C
L
= 300pF
(3)
R
L
= 500Ω
C
L
= 5pF
(3)
R
L
= 500Ω
C
L
= 50pF
R
L
= 500Ω
Min
.
(2)
1.5
1.5
1.5
1.5
1.5
1.5
Max.
8
15
12
20
9
10
Min
.
(2)
1.5
1.5
1.5
1.5
1.5
1.5
FCT863B
Max.
6
13
8
15
6
7
ns
ns
Unit
ns
t
PZH
t
PZL
Output Enable Time
OET
to T
I
or
OER
to R
I
t
PHZ
t
PLZ
Output Disable Time
OET
to T
I
or
OER
to R
I
NOTES:
1. See test circuits and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. This condition guaranteed but not tested.
4
IDT74FCT863A/B
HIGH-PERFORMANCE CMOS 9-BIT NON-INVERTING TRANSCEIVER
COMMERCIAL TEMPERATURE RANGE
TEST CIRCUITS AND WAVEFORMS
V
CC
500Ω
V
IN
Pulse
Generator
R
T
D.U.T
.
V
OUT
7.0V
SWITCH POSITION
Test
Open Drain
Disable Low
Enable Low
Switch
Closed
Open
50pF
C
L
500Ω
All Other Tests
DEFINITIONS:
C
L
= Load capacitance: includes jig and probe capacitance.
R
T
= Termination resistance: should be equal to Z
OUT
of the Pulse Generator.
Octal link
Test Circuits for All Outputs
DATA
INPUT
TIMING
INPUT
ASYNCHRONOUS CONTROL
PRESET
CLEAR
ETC.
SYNCHRONOUS CONTROL
PRESET
CLEAR
CLOCK ENABLE
ETC.
t
SU
t
H
t
REM
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
Octal link
LOW-HIGH-LOW
PULSE
t
W
HIGH-LOW-HIGH
PULSE
Octal link
1.5V
1.5V
t
SU
t
H
Pulse Width
Set-Up, Hold, and Release Times
ENABLE
SAME PHASE
INPUT TRANSITION
t
PLH
OUTPUT
t
PLH
OPPOSITE PHASE
INPUT TRANSITION
t
PHL
t
PHL
3V
1.5V
0V
V
OH
1.5V
V
OL
3V
1.5V
0V
Octal link
DISABLE
3V
1.5V
0V
3.5V
0.3V
t
PHZ
0.3V
1.5V
0V
V
OH
0V
Octal link
CONTROL
INPUT
t
PZL
OUTPUT
NORMALLY
LOW
OUTPUT
NORMALLY
HIGH
SWITCH
CLOSED
t
PZH
SWITCH
OPEN
3.5V
1.5V
t
PLZ
V
OL
Propagation Delay
Enable and Disable Times
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
2. Pulse Generator for All Pulses: Rate
≤
1.0MHz; Z
O
≤
50Ω; t
F
≤
2.5ns; t
R
≤
2.5ns.
5
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