FemtoClock
™
Crystal-to-LVCMOS/LVTTL
Clock Generator
ICS840021I
DATA SHEET
General Description
The ICS840021I is a Gigabit Ethernet Clock
Generator. The ICS840021I uses a 25MHz crystal to
HiPerClockS™
synthesize 125MHz. The ICS840021I has excellent
phase jitter performance, over the 1.875MHz – 20MHz
integration range. The ICS840021I is packaged in a
small 8-pin TSSOP and 16-pin VFQFN, making it ideal for use in
systems with limited board space.
Features
•
•
•
•
•
•
•
One LVCMOS/LVTTL output, 15Ω output impedance
Crystal oscillator interface designed for 25MHz,
18pF parallel resonant crystal
Output frequency: 125MHz
VCO range: 560MHz to 680MHz
RMS phase jitter @ 125MHz, using a 25MHz crystal
(1.875MHz - 20MHz): 0.48ps (typical) 3.3V
RMS phase noise at 125MHz (typical)
Phase noise:
Noise Power
Offset
100Hz ................-97.8 dBc/Hz
1kHz ..............-124.6 dBc/Hz
10kHz ..............-132.5 dBc/Hz
100Hz ..............-131.1 dBc/Hz
ICS
Pin Assignments
V
DDA
OE
XTAL_OUT
XTAL_IN
1
2
3
4
8
7
6
5
V
DD
Q0
GND
RESERVED
•
•
•
Voltage Supply Modes:
V
DD
/V
DDA
= 3.3V
V
DD
/V
DDA
= 2.5V
-40°C to 85°C ambient operating temperature
Available in both standard (RoHS 5) and lead-free (RoHS 6)
packages
ICS840021I
8-Lead TSSOP
4.40mm x 3.0mm x 0.925mm package body
G Package
Top View
Block Diagram
OE
Pullup
25MHz
V
DDA
V
DD
nc
nc
XTAL_IN
XTAL_OUT
OSC
16 15 14 13
OE 1
12 Q0
XTAL_OUT
2
11 V
DD
10 GND
9 GND
5
nc
Phase
Detector
VCO
÷5
Q0
XTAL_IN 3
nc 4
6
nc
÷25
(fixed)
7
nc
8
nc
ICS840021I
16-Lead VFQFN
3.0mm x 3.0mm x 0.925mm package body
K Package
Top View
ICS840021AGI REVISION C JANUARY 27, 2010
1
©2010 Integrated Device Technology, Inc.
ICS840021I Data Sheet
FEMTOCLOCK™ CRYSTAL-TO-LVCMOS/LVTTL CLOCK GENERATOR
Table 1. Pin Descriptions
Name
V
DDA
OE
XTAL_OUT,
XTAL_IN
nc
RESERVED
GND
Q0
V
DD
Type
Power
Input
Input
Unused
Reserved
Power
Output
Power
Pullup
Description
Analog supply pin.
Output enable pin. When HIGH, Q0 output is enabled. When LOW, forces Q0 to high-impedance
state. LVCMOS/LVTTL interface levels.
Crystal oscillator interface. XTAL_IN is the input, XTAL_OUT is the output.
No connect.
Reserved pin.
Power supply ground.
Single-ended clock output. LVCMOS/LVTTL interface levels. 15
Ω
output impedance.
Core supply pin.
NOTE:
Pullup
refers to internal input resistors. See Table 1,
Pin Characteristics,
for typical values.
Table 2. Pin Characteristics
Symbol
C
IN
C
PD
R
PULLUP
R
OUT
Parameter
Input Capacitance
Power Dissipation Capacitance
Input Pullup Resistor
Output Impedance
V
DD
= 3.465V
V
DD
= 2.625V
Test Conditions
Minimum
Typical
4
7
7
51
15
Maximum
Units
pF
pF
pF
k
Ω
Ω
Function Table
Table 3. Control Function Table
Control Input
OE
0
1
Output
Q0
High-Impedance
Active
ICS840021AGI REVISION C JANUARY 27, 2010
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©2010 Integrated Device Technology, Inc.
ICS840021I Data Sheet
FEMTOCLOCK™ CRYSTAL-TO-LVCMOS/LVTTL CLOCK GENERATOR
Absolute Maximum Ratings
NOTE: Stresses beyond those listed under
Absolute Maximum
Ratings
may cause permanent damage to the device.
These ratings are stress specifications only. Functional operation of
product at these conditions or any conditions beyond
Item
Supply Voltage, V
DD
Inputs, V
I
Outputs, V
O
Package Thermal Impedance,
θ
JA
8 TSSOP
16 VFQFN
Storage Temperature, T
STG
those listed in the
DC Characteristics or AC Characteristics
is not
implied. Exposure to absolute maximum rating conditions for
extended periods may affect product reliability.
Rating
4.6V
-0.5V to V
DD
+ 0.5V
-0.5V to V
DD
+ 0.5V
101.7°C/W (0 mps)
74.9°C/W (0 mps)
-65°C to 150°C
DC Electrical Characteristics
Table 4A. Power Supply DC Characteristics,
V
DD
= 3.3V ± 5%, T
A
= -40°C to 85°C
Symbol
V
DD
V
DDA
I
DD
I
DDA
Parameter
Core Supply Voltage
Analog Supply Voltage
Power Supply Current
Analog Supply Current
Test Conditions
Minimum
3.135
3.135
Typical
3.3
3.3
Maximum
3.465
3.465
65
10
Units
V
V
mA
mA
Table 4B. Power Supply DC Characteristics,
V
DD
= 2.5V ± 5%, T
A
= -40°C to 85°C
Symbol
V
DD
V
DDA
I
DD
I
DDA
Parameter
Core Supply Voltage
Analog Supply Voltage
Power Supply Current
Analog Supply Current
Test Conditions
Minimum
2.375
2.375
Typical
2.5
2.5
Maximum
2.625
2.625
60
10
Units
V
V
mA
mA
ICS840021AGI REVISION C JANUARY 27, 2010
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©2010 Integrated Device Technology, Inc.
ICS840021I Data Sheet
FEMTOCLOCK™ CRYSTAL-TO-LVCMOS/LVTTL CLOCK GENERATOR
Table 4C. LVCMOS/LVTTL DC Characteristics,
V
DD
= 3.3V ± 5%
OR
2.5V ± 5%, T
A
= -40°C to 85°C
Symbol
V
IH
Parameter
Input High Voltage
Test Conditions
Minimum
2
1.7
-0.3
-0.3
Typical
Maximum
Units
V
V
V
V
µA
µA
V
V
0.5
V
V
DD
= 3.3V
V
DD
= 2.5V
V
DD
= 3.3V
V
DD
= 2.5V
OE
OE
V
DD
+ 0.3
V
DD
+ 0.3
0.8
0.7
5
V
IL
I
IH
I
IL
V
OH
V
OL
Input Low Voltage
Input High Current
Input Low Current
V
DD
= V
IN
= 3.465V
OR
2.625V
V
DD
=3.465V
OR
2.625V, V
IN
= 0V
V
DD
= 3.465V
V
DD
= 2.625V
V
DD
= 3.465V
OR
2.625V
-150
2.6
1.8
Output High Voltage; NOTE 1
Output High Voltage; NOTE 1
NOTE 1: Outputs terminated with 50Ω to V
DD
/2. See Parameter Measurement Information Section, "3.3V Output Load Test Circuit" diagrams.
Table 5. Crystal Characteristics
Parameter
Mode of Oscillation
Frequency
Equivalent Series Resistance (ESR)
Shunt Capacitance
Drive Level
Test Conditions
Minimum
Typical
Fundamental
25
50
7
1
MHz
Maximum
Units
Ω
pF
mW
ICS840021AGI REVISION C JANUARY 27, 2010
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©2010 Integrated Device Technology, Inc.
ICS840021I Data Sheet
FEMTOCLOCK™ CRYSTAL-TO-LVCMOS/LVTTL CLOCK GENERATOR
AC Electrical Characteristics
Table 6A. AC Characteristics,
V
DD
= 3.3V ± 5%, T
A
= -40°C to 85°C
Symbol
f
OUT
tjit(Ø)
t
R
/ t
F
odc
Parameter
Output Frequency
RMS Phase Jitter, Random;
NOTE 1
Output Rise/Fall Time
Output Duty Cycle
Integration Range: 1.875MHz – 20MHz
20% to 80%
200
48
Test Conditions
Minimum
Typical
125
0.48
500
52
Maximum
Units
MHz
ps
ps
%
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device is
mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal equilibrium
has been reached under these conditions.
NOTE 1: Please refer to Phase Noise Plots.
Table 6B. AC Characteristics,
V
DD
= 2.5V ± 5%, T
A
= -40°C to 85°C
Symbol
f
OUT
tjit(Ø)
t
R
/ t
F
odc
Parameter
Output Frequency
RMS Phase Jitter, Random;
NOTE 1
Output Rise/Fall Time
Output Duty Cycle
Integration Range: 1.875MHz – 20MHz
20% to 80%
250
48
Test Conditions
Minimum
Typical
125
0.50
550
52
Maximum
Units
MHz
ps
ps
%
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device is
mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal equilibrium
has been reached under these conditions.
NOTE 1: Please refer to Phase Noise Plots.
ICS840021AGI REVISION C JANUARY 27, 2010
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©2010 Integrated Device Technology, Inc.